| /Zephyr-latest/dts/arm/st/mp1/ |
| D | stm32mp157.dtsi | 23 #address-cells = <1>;
43 compatible = "st,stm32mp157", "st,stm32mp1", "simple-bus";
46 compatible = "st,stm32mp1-rcc";
51 compatible = "st,stm32-rcc-rctl";
52 #reset-cells = <1>;
58 compatible = "st,stm32g0-exti", "st,stm32-exti";
60 #interrupt-cells = <1>;
61 #address-cells = <1>;
72 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
73 <4 1>, <5 1>, <6 1>, <7 1>,
[all …]
|
| /Zephyr-latest/dts/arm/st/wba/ |
| D | stm32wba.dtsi | 25 st,lptim-stdby-timer = &rtc;
30 #address-cells = <1>;
39 #address-cells = <1>;
40 #size-cells = <1>;
52 substate-id = <1>;
64 substate-id = <1>;
87 compatible = "st,stm32wba-hse-clock";
101 compatible = "st,stm32-lse-clock";
103 driving-capability = <1>;
116 compatible = "st,stm32wba-pll-clock";
[all …]
|
| /Zephyr-latest/dts/arm/st/h7rs/ |
| D | stm32h7rs.dtsi | 31 #address-cells = <1>;
38 #address-cells = <1>;
39 #size-cells = <1>;
88 #address-cells = <1>;
93 compatible = "st,stm32-hse-clock";
99 compatible = "st,stm32h7-hsi-clock";
100 hsi-div = <1>; /* HSI RC: 64MHz, hsi_clk = 64MHz */
121 compatible = "st,stm32-lse-clock";
136 compatible = "st,stm32h7rs-pll-clock";
141 pll2: pll@1 {
[all …]
|
| /Zephyr-latest/dts/arm/st/h5/ |
| D | stm32h5.dtsi | 26 #address-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <1>;
47 compatible = "st,stm32-hse-clock";
53 compatible = "st,stm32h7-hsi-clock";
54 hsi-div = <1>; /* HSI RC: 64MHz, hsi_clk = 64MHz */
75 compatible = "st,stm32-lse-clock";
90 compatible = "st,stm32u5-pll-clock";
96 compatible = "st,stm32u5-pll-clock";
103 compatible = "st,stm32-clock-mco";
[all …]
|
| D | stm32h562.dtsi | 7 #include <st/h5/stm32h5.dtsi>
18 compatible = "st,stm32u5-pll-clock";
24 compatible = "st,stm32h562", "st,stm32h5", "simple-bus";
28 compatible = "st,stm32-gpio";
36 compatible = "st,stm32-gpio";
44 compatible = "st,stm32-gpio";
52 compatible = "st,stm32-gpio";
83 compatible = "st,stm32-lptim";
85 #address-cells = <1>;
88 interrupts = <127 1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/f1/ |
| D | stm32f1.dtsi | 26 #address-cells = <1>;
43 compatible = "st,stm32-hse-clock";
70 compatible = "st,stm32f1-pll-clock";
77 compatible = "st,stm32f1-clock-mco";
85 compatible = "st,stm32-flash-controller", "st,stm32f1-flash-controller";
90 #address-cells = <1>;
91 #size-cells = <1>;
94 compatible = "st,stm32-nv-flash", "soc-nv-flash";
103 compatible = "st,stm32f1-rcc";
108 compatible = "st,stm32-rcc-rctl";
[all …]
|
| /Zephyr-latest/dts/arm/st/f7/ |
| D | stm32f7.dtsi | 31 #address-cells = <1>;
38 #address-cells = <1>;
39 #size-cells = <1>;
58 compatible = "st,stm32-hse-clock";
71 compatible = "st,stm32-lse-clock";
86 compatible = "st,stm32f7-pll-clock";
93 compatible = "st,stm32-clock-mco";
98 compatible = "st,stm32-clock-mco";
105 compatible = "st,stm32-fmc";
111 compatible = "st,stm32-fmc-sdram";
[all …]
|
| /Zephyr-latest/dts/arm/st/l1/ |
| D | stm32l1.dtsi | 27 #address-cells = <1>;
44 compatible = "st,stm32-hse-clock";
57 compatible = "st,stm32l0-msi-clock";
78 compatible = "st,stm32l0-pll-clock";
86 compatible = "st,stm32-flash-controller", "st,stm32f1-flash-controller";
91 #address-cells = <1>;
92 #size-cells = <1>;
95 compatible = "st,stm32f4-nv-flash", "st,stm32-nv-flash",
106 compatible = "st,stm32-rcc";
111 compatible = "st,stm32-rcc-rctl";
[all …]
|
| /Zephyr-latest/dts/arm/st/h7/ |
| D | stm32h7.dtsi | 32 #address-cells = <1>;
39 #address-cells = <1>;
40 #size-cells = <1>;
57 #address-cells = <1>;
62 compatible = "st,stm32-hse-clock";
68 compatible = "st,stm32h7-hsi-clock";
69 hsi-div = <1>; /* HSI RC: 64MHz, hsi_clk = 64MHz */
90 compatible = "st,stm32-lse-clock";
105 compatible = "st,stm32h7-pll-clock";
110 pll2: pll@1 {
[all …]
|
| /Zephyr-latest/dts/arm/st/l5/ |
| D | stm32l5.dtsi | 30 #address-cells = <1>;
37 #address-cells = <1>;
38 #size-cells = <1>;
51 substate-id = <1>;
76 compatible = "st,stm32-hse-clock";
96 compatible = "st,stm32-msi-clock";
103 compatible = "st,stm32-lse-clock";
118 compatible = "st,stm32l4-pll-clock";
125 compatible = "st,stm32-flash-controller", "st,stm32l5-flash-controller";
130 #address-cells = <1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/f4/ |
| D | stm32f4.dtsi | 30 #address-cells = <1>;
63 compatible = "st,stm32-hse-clock";
90 compatible = "st,stm32f4-pll-clock";
97 compatible = "st,stm32-clock-mco";
102 compatible = "st,stm32-clock-mco";
109 compatible = "st,stm32-flash-controller", "st,stm32f4-flash-controller";
113 #address-cells = <1>;
114 #size-cells = <1>;
117 compatible = "st,stm32f4-nv-flash", "st,stm32-nv-flash",
120 write-block-size = <1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/l4/ |
| D | stm32l451.dtsi | 7 #include <st/l4/stm32l4.dtsi>
21 compatible = "st,stm32l451", "st,stm32l4", "simple-bus";
25 compatible = "st,stm32-gpio";
33 compatible = "st,stm32-gpio";
47 compatible = "st,stm32-i2c-v2";
49 #address-cells = <1>;
59 compatible = "st,stm32-i2c-v2";
61 #address-cells = <1>;
64 clocks = <&rcc STM32_CLOCK(APB1_2, 1U)>;
71 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
[all …]
|
| D | stm32l4.dtsi | 30 #address-cells = <1>;
44 substate-id = <1>;
69 compatible = "st,stm32-hse-clock";
82 compatible = "st,stm32-msi-clock";
89 compatible = "st,stm32-lse-clock";
104 compatible = "st,stm32l4-pll-clock";
111 compatible = "st,stm32-clock-mco";
118 compatible = "st,stm32-flash-controller", "st,stm32l4-flash-controller";
123 #address-cells = <1>;
124 #size-cells = <1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/f2/ |
| D | stm32f2.dtsi | 28 #address-cells = <1>;
45 compatible = "st,stm32-hse-clock";
72 compatible = "st,stm32f2-pll-clock";
79 compatible = "st,stm32-flash-controller", "st,stm32f2-flash-controller";
83 #address-cells = <1>;
84 #size-cells = <1>;
87 compatible = "st,stm32-nv-flash", "soc-nv-flash";
89 write-block-size = <1>;
96 compatible = "st,stm32-rcc";
101 compatible = "st,stm32-rcc-rctl";
[all …]
|
| /Zephyr-latest/dts/arm/st/f3/ |
| D | stm32f3.dtsi | 26 #address-cells = <1>;
44 compatible = "st,stm32-hse-clock";
57 compatible = "st,stm32-lse-clock";
72 compatible = "st,stm32f0-pll-clock";
79 compatible = "st,stm32-flash-controller", "st,stm32f1-flash-controller";
84 #address-cells = <1>;
85 #size-cells = <1>;
88 compatible = "st,stm32-nv-flash", "soc-nv-flash";
98 compatible = "st,stm32f3-rcc";
103 compatible = "st,stm32-rcc-rctl";
[all …]
|
| D | stm32f302.dtsi | 7 #include <st/f3/stm32f3.dtsi>
12 compatible = "st,stm32f302", "st,stm32f3", "simple-bus";
20 compatible = "st,stm32-i2c-v2";
22 #address-cells = <1>;
29 <&rcc STM32_SRC_SYSCLK I2C2_SEL(1)>;
36 compatible = "st,stm32-i2c-v2";
38 #address-cells = <1>;
45 <&rcc STM32_SRC_SYSCLK I2C3_SEL(1)>;
52 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
53 #address-cells = <1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/c0/ |
| D | stm32c0.dtsi | 26 #address-cells = <1>;
43 compatible = "st,stm32-hse-clock";
49 compatible = "st,stm32c0-hsi-clock";
50 hsi-div = <1>;
57 compatible = "st,stm32-lse-clock";
73 compatible = "st,stm32-clock-mco";
78 compatible = "st,stm32-clock-mco";
85 compatible = "st,stm32-flash-controller" , "st,stm32g0-flash-controller";
90 #address-cells = <1>;
91 #size-cells = <1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/g4/ |
| D | stm32g4.dtsi | 29 #address-cells = <1>;
43 substate-id = <1>;
62 compatible = "st,stm32-hse-clock";
82 compatible = "st,stm32-lse-clock";
97 compatible = "st,stm32g4-pll-clock";
107 compatible = "st,stm32-adc";
112 #io-channel-cells = <1>;
118 st,adc-sequencer = "FULLY_CONFIGURABLE";
119 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
123 compatible = "st,stm32-adc";
[all …]
|
| D | stm32g473.dtsi | 7 #include <st/g4/stm32g491.dtsi>
11 compatible = "st,stm32g473", "st,stm32g4", "simple-bus";
14 compatible = "st,stm32-timers";
20 st,prescaler = <0>;
24 compatible = "st,stm32-pwm";
31 compatible = "st,stm32-adc";
36 #io-channel-cells = <1>;
42 st,adc-sequencer = "FULLY_CONFIGURABLE";
43 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
47 compatible = "st,stm32-adc";
[all …]
|
| /Zephyr-latest/dts/arm/st/u5/ |
| D | stm32u5.dtsi | 32 #address-cells = <1>;
39 #address-cells = <1>;
40 #size-cells = <1>;
53 substate-id = <1>;
85 compatible = "st,stm32-hse-clock";
105 compatible = "st,stm32u5-msi-clock";
112 compatible = "st,stm32u5-msi-clock";
119 compatible = "st,stm32-lse-clock";
134 compatible = "st,stm32u5-pll-clock";
140 compatible = "st,stm32u5-pll-clock";
[all …]
|
| D | stm32u595.dtsi | 8 #include <st/u5/stm32u5.dtsi>
13 compatible = "st,stm32u595", "st,stm32u5", "simple-bus";
16 compatible = "st,stm32-pinctrl";
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "st,stm32-gpio";
31 compatible = "st,stm32-usart", "st,stm32-uart";
40 compatible = "st,stm32-i2c-v2";
42 #address-cells = <1>;
52 compatible = "st,stm32-i2c-v2";
[all …]
|
| /Zephyr-latest/dts/arm/st/u0/ |
| D | stm32u0.dtsi | 27 #address-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <1>;
46 compatible = "st,stm32-hse-clock";
66 compatible = "st,stm32-msi-clock";
73 compatible = "st,stm32-lse-clock";
88 compatible = "st,stm32u0-pll-clock";
95 compatible = "st,stm32-flash-controller", "st,stm32g0-flash-controller";
99 #address-cells = <1>;
100 #size-cells = <1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/g0/ |
| D | stm32g0.dtsi | 29 #address-cells = <1>;
43 substate-id = <1>;
62 compatible = "st,stm32-hse-clock";
68 compatible = "st,stm32g0-hsi-clock";
69 hsi-div = <1>;
76 compatible = "st,stm32-lse-clock";
91 compatible = "st,stm32g0-pll-clock";
98 compatible = "st,stm32-flash-controller", "st,stm32g0-flash-controller";
103 #address-cells = <1>;
104 #size-cells = <1>;
[all …]
|
| /Zephyr-latest/dts/arm/st/f0/ |
| D | stm32f0.dtsi | 27 #address-cells = <1>;
44 compatible = "st,stm32-hse-clock";
64 compatible = "st,stm32-lse-clock";
79 compatible = "st,stm32f0-pll-clock";
86 compatible = "st,stm32-flash-controller", "st,stm32f1-flash-controller";
91 #address-cells = <1>;
92 #size-cells = <1>;
95 compatible = "st,stm32-nv-flash", "soc-nv-flash";
104 compatible = "st,stm32f0-rcc";
109 compatible = "st,stm32-rcc-rctl";
[all …]
|
| /Zephyr-latest/dts/arm/st/wl/ |
| D | stm32wl.dtsi | 28 #address-cells = <1>;
42 substate-id = <1>;
67 compatible = "st,stm32wl-hse-clock";
82 compatible = "st,stm32-msi-clock";
89 compatible = "st,stm32-lse-clock";
104 compatible = "st,stm32wb-pll-clock";
111 compatible = "st,stm32-flash-controller", "st,stm32l4-flash-controller";
115 #address-cells = <1>;
116 #size-cells = <1>;
119 compatible = "st,stm32-nv-flash", "soc-nv-flash";
[all …]
|
