Lines Matching +full:1 +full:st
27 #address-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <1>;
46 compatible = "st,stm32-hse-clock";
66 compatible = "st,stm32-msi-clock";
73 compatible = "st,stm32-lse-clock";
88 compatible = "st,stm32u0-pll-clock";
95 compatible = "st,stm32-flash-controller", "st,stm32g0-flash-controller";
99 #address-cells = <1>;
100 #size-cells = <1>;
103 compatible = "st,stm32-nv-flash", "soc-nv-flash";
113 compatible = "st,stm32f0-rcc";
119 compatible = "st,stm32-rcc-rctl";
120 #reset-cells = <1>;
125 compatible = "st,stm32g0-exti","st,stm32-exti";
127 #interrupt-cells = <1>;
128 #address-cells = <1>;
132 interrupt-names = "line0-1", "line2-3", "line4-15";
137 compatible = "st,stm32-pinctrl";
138 #address-cells = <1>;
139 #size-cells = <1>;
143 compatible = "st,stm32-gpio";
151 compatible = "st,stm32-gpio";
155 clocks = <&rcc STM32_CLOCK(IOP, 1U)>;
159 compatible = "st,stm32-gpio";
167 compatible = "st,stm32-gpio";
175 compatible = "st,stm32-gpio";
183 compatible = "st,stm32-gpio";
192 compatible = "st,stm32-usart", "st,stm32-uart";
201 compatible = "st,stm32-usart", "st,stm32-uart";
210 compatible = "st,stm32-usart", "st,stm32-uart";
219 compatible = "st,stm32-lpuart", "st,stm32-uart";
228 compatible = "st,stm32-lpuart", "st,stm32-uart";
237 compatible = "st,stm32-watchdog";
243 compatible = "st,stm32-window-watchdog";
251 compatible = "st,stm32-adc";
256 #io-channel-cells = <1>;
263 st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
264 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
268 compatible = "st,stm32-dac";
272 #io-channel-cells = <1>;
276 compatible = "st,stm32-i2c-v2";
278 #address-cells = <1>;
288 compatible = "st,stm32-i2c-v2";
290 #address-cells = <1>;
300 compatible = "st,stm32-i2c-v2";
302 #address-cells = <1>;
312 compatible = "st,stm32-dma-v2";
323 compatible = "st,stm32-dmamux";
334 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
335 #address-cells = <1>;
344 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
345 #address-cells = <1>;
354 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
355 #address-cells = <1>;
364 compatible = "st,stm32-rng";
372 compatible = "st,stm32-aes";
382 compatible = "st,stm32-rtc";
393 compatible = "st,stm32-timers";
399 st,prescaler = <0>;
403 compatible = "st,stm32-pwm";
409 compatible = "st,stm32-counter";
415 compatible = "st,stm32-timers";
421 st,prescaler = <0>;
425 compatible = "st,stm32-pwm";
431 compatible = "st,stm32-counter";
437 compatible = "st,stm32-timers";
439 clocks = <&rcc STM32_CLOCK(APB1, 1U)>;
440 resets = <&rctl STM32_RESET(APB1L, 1U)>;
443 st,prescaler = <0>;
447 compatible = "st,stm32-pwm";
453 compatible = "st,stm32-counter";
459 compatible = "st,stm32-timers";
465 st,prescaler = <0>;
470 compatible = "st,stm32-timers";
476 st,prescaler = <0>;
481 compatible = "st,stm32-timers";
487 st,prescaler = <0>;
491 compatible = "st,stm32-pwm";
497 compatible = "st,stm32-counter";
503 compatible = "st,stm32-timers";
509 st,prescaler = <0>;
513 compatible = "st,stm32-pwm";
519 compatible = "st,stm32-counter";
525 compatible = "st,stm32-lptim";
527 #address-cells = <1>;
530 interrupts = <17 1>;
537 compatible = "st,stm32-lptim";
539 #address-cells = <1>;
542 interrupts = <18 1>;