Lines Matching +full:1 +full:st
25 st,lptim-stdby-timer = &rtc;
30 #address-cells = <1>;
39 #address-cells = <1>;
40 #size-cells = <1>;
52 substate-id = <1>;
64 substate-id = <1>;
87 compatible = "st,stm32wba-hse-clock";
101 compatible = "st,stm32-lse-clock";
103 driving-capability = <1>;
116 compatible = "st,stm32wba-pll-clock";
123 compatible = "st,stm32-flash-controller", "st,stm32wba-flash-controller";
127 #address-cells = <1>;
128 #size-cells = <1>;
131 compatible = "st,stm32-nv-flash", "soc-nv-flash";
141 compatible = "st,stm32wba-rcc";
147 compatible = "st,stm32-rcc-rctl";
148 #reset-cells = <1>;
153 compatible = "st,stm32g0-exti", "st,stm32-exti";
155 #interrupt-cells = <1>;
166 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
167 <4 1>, <5 1>, <6 1>, <7 1>,
168 <8 1>, <9 1>, <10 1>, <11 1>,
169 <12 1>, <13 1>, <14 1>, <15 1>;
173 compatible = "st,stm32-pinctrl";
174 #address-cells = <1>;
175 #size-cells = <1>;
179 compatible = "st,stm32-gpio";
187 compatible = "st,stm32-gpio";
191 clocks = <&rcc STM32_CLOCK(AHB2, 1U)>;
195 compatible = "st,stm32-gpio";
203 compatible = "st,stm32-gpio";
212 compatible = "st,stm32-rtc";
221 compatible = "st,stm32-watchdog";
227 compatible = "st,stm32-window-watchdog";
235 compatible = "st,stm32-usart", "st,stm32-uart";
244 compatible = "st,stm32-usart", "st,stm32-uart";
253 compatible = "st,stm32-lpuart", "st,stm32-uart";
262 compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
263 #address-cells = <1>;
272 compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
273 #address-cells = <1>;
282 compatible = "st,stm32-i2c-v2";
284 #address-cells = <1>;
294 compatible = "st,stm32-i2c-v2";
296 #address-cells = <1>;
306 compatible = "st,stm32-timers";
312 st,prescaler = <0>;
316 compatible = "st,stm32-counter";
321 compatible = "st,stm32-pwm";
328 compatible = "st,stm32-timers";
334 st,prescaler = <0>;
338 compatible = "st,stm32-counter";
343 compatible = "st,stm32-pwm";
350 compatible = "st,stm32-timers";
352 clocks = <&rcc STM32_CLOCK(APB1, 1U)>;
353 resets = <&rctl STM32_RESET(APB1L, 1U)>;
356 st,prescaler = <0>;
360 compatible = "st,stm32-counter";
365 compatible = "st,stm32-pwm";
372 compatible = "st,stm32-timers";
381 compatible = "st,stm32-counter";
386 compatible = "st,stm32-pwm";
393 compatible = "st,stm32-timers";
402 compatible = "st,stm32-counter";
407 compatible = "st,stm32-pwm";
414 compatible = "st,stm32-adc";
420 #io-channel-cells = <1>;
427 st,adc-clock-source = "ASYNC";
428 st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
429 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
433 compatible = "st,stm32-lptim";
434 #address-cells = <1>;
438 interrupts = <49 1>;
444 compatible = "st,stm32-lptim";
445 #address-cells = <1>;
449 interrupts = <50 1>;
455 compatible = "st,stm32-rng";
466 compatible = "st,stm32u5-dma";
479 compatible = "st,stm32-temp-cal";
490 compatible = "st,hci-stm32wba";
499 pinctrl-1 = <&analog_pa13 &analog_pa14 &analog_pa15
505 compatible = "st,stm32-smbus";
506 #address-cells = <1>;
513 compatible = "st,stm32-smbus";
514 #address-cells = <1>;