Lines Matching +full:1 +full:st
30 #address-cells = <1>;
63 compatible = "st,stm32-hse-clock";
90 compatible = "st,stm32f4-pll-clock";
97 compatible = "st,stm32-clock-mco";
102 compatible = "st,stm32-clock-mco";
109 compatible = "st,stm32-flash-controller", "st,stm32f4-flash-controller";
113 #address-cells = <1>;
114 #size-cells = <1>;
117 compatible = "st,stm32f4-nv-flash", "st,stm32-nv-flash",
120 write-block-size = <1>;
127 compatible = "st,stm32-rcc";
132 compatible = "st,stm32-rcc-rctl";
133 #reset-cells = <1>;
138 compatible = "st,stm32-exti";
140 #interrupt-cells = <1>;
141 #address-cells = <1>;
148 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
149 <4 1>, <5 5>, <10 6>;
153 compatible = "st,stm32-pinctrl";
154 #address-cells = <1>;
155 #size-cells = <1>;
159 compatible = "st,stm32-gpio";
167 compatible = "st,stm32-gpio";
171 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
175 compatible = "st,stm32-gpio";
183 compatible = "st,stm32-gpio";
191 compatible = "st,stm32-gpio";
199 compatible = "st,stm32-gpio";
207 compatible = "st,stm32-gpio";
215 compatible = "st,stm32-gpio";
224 compatible = "st,stm32-watchdog";
230 compatible = "st,stm32-window-watchdog";
238 compatible = "st,stm32-usart", "st,stm32-uart";
247 compatible = "st,stm32-usart", "st,stm32-uart";
256 compatible = "st,stm32-usart", "st,stm32-uart";
265 compatible = "st,stm32-i2c-v1";
267 #address-cells = <1>;
277 compatible = "st,stm32-i2c-v1";
279 #address-cells = <1>;
289 compatible = "st,stm32-i2c-v1";
291 #address-cells = <1>;
301 compatible = "st,stm32-spi";
302 #address-cells = <1>;
311 compatible = "st,stm32-otgfs";
325 compatible = "st,stm32-timers";
331 st,prescaler = <0>;
335 compatible = "st,stm32-pwm";
341 compatible = "st,stm32-qdec";
343 st,input-filter-level = <NO_FILTER>;
348 compatible = "st,stm32-timers";
354 st,prescaler = <0>;
358 compatible = "st,stm32-pwm";
364 compatible = "st,stm32-counter";
369 compatible = "st,stm32-qdec";
371 st,input-filter-level = <NO_FILTER>;
376 compatible = "st,stm32-timers";
378 clocks = <&rcc STM32_CLOCK(APB1, 1U)>;
379 resets = <&rctl STM32_RESET(APB1, 1U)>;
382 st,prescaler = <0>;
386 compatible = "st,stm32-pwm";
392 compatible = "st,stm32-counter";
397 compatible = "st,stm32-qdec";
399 st,input-filter-level = <NO_FILTER>;
404 compatible = "st,stm32-timers";
410 st,prescaler = <0>;
414 compatible = "st,stm32-pwm";
420 compatible = "st,stm32-counter";
425 compatible = "st,stm32-qdec";
427 st,input-filter-level = <NO_FILTER>;
432 compatible = "st,stm32-timers";
438 st,prescaler = <0>;
442 compatible = "st,stm32-pwm";
448 compatible = "st,stm32-counter";
453 compatible = "st,stm32-qdec";
455 st,input-filter-level = <NO_FILTER>;
460 compatible = "st,stm32-timers";
466 st,prescaler = <0>;
470 compatible = "st,stm32-pwm";
476 compatible = "st,stm32-counter";
482 compatible = "st,stm32-timers";
488 st,prescaler = <0>;
492 compatible = "st,stm32-pwm";
498 compatible = "st,stm32-counter";
504 compatible = "st,stm32-timers";
510 st,prescaler = <0>;
514 compatible = "st,stm32-pwm";
520 compatible = "st,stm32-counter";
526 compatible = "st,stm32-rtc";
536 compatible = "st,stm32-bbram";
537 st,backup-regs = <20>;
543 compatible = "st,stm32f4-adc", "st,stm32-adc";
548 #io-channel-cells = <1>;
554 st,adc-clock-source = "SYNC";
555 st,adc-sequencer = "FULLY_CONFIGURABLE";
556 st,adc-oversampler = "OVERSAMPLER_NONE";
560 compatible = "st,stm32-dma-v1";
569 compatible = "st,stm32-dma-v1";
574 st,mem2mem;
579 compatible = "st,stm32-sdmmc";
590 compatible = "st,stm32-temp-cal";
601 compatible = "st,stm32-vref";
609 compatible = "st,stm32-vbat";
621 compatible = "st,stm32-smbus";
622 #address-cells = <1>;
629 compatible = "st,stm32-smbus";
630 #address-cells = <1>;
637 compatible = "st,stm32-smbus";
638 #address-cells = <1>;