Home
last modified time | relevance | path

Searched refs:Periphs (Results 1 – 25 of 47) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_bus.h566 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs) in LL_AHB3_GRP1_EnableClock() argument
569 SET_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
571 tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
616 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB3_GRP1_IsEnabledClock() argument
618 return ((READ_BIT(RCC->AHB3ENR, Periphs) == Periphs) ? 1U : 0U); in LL_AHB3_GRP1_IsEnabledClock()
662 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs) in LL_AHB3_GRP1_DisableClock() argument
664 CLEAR_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_DisableClock()
698 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) in LL_AHB3_GRP1_ForceReset() argument
700 SET_BIT(RCC->AHB3RSTR, Periphs); in LL_AHB3_GRP1_ForceReset()
734 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB3_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h287 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
290 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
292 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
309 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
311 return ((READ_BIT(RCC->AHB1ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
327 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
329 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
346 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
348 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
365 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_bus.h334 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) in LL_AHB2_GRP1_EnableClock() argument
337 WRITE_REG(RCC->MC_AHB2ENSETR, Periphs); in LL_AHB2_GRP1_EnableClock()
339 tmpreg = READ_BIT(RCC->MC_AHB2ENSETR, Periphs); in LL_AHB2_GRP1_EnableClock()
360 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClock() argument
362 return (READ_BIT(RCC->MC_AHB2ENSETR, Periphs) == Periphs); in LL_AHB2_GRP1_IsEnabledClock()
382 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) in LL_AHB2_GRP1_DisableClock() argument
384 WRITE_REG(RCC->MC_AHB2ENCLRR, Periphs); in LL_AHB2_GRP1_DisableClock()
405 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) in LL_AHB2_GRP1_ForceReset() argument
407 WRITE_REG(RCC->AHB2RSTSETR, Periphs); in LL_AHB2_GRP1_ForceReset()
428 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB2_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h364 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
367 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
369 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
389 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
391 return ((READ_BIT(RCC->AHB1ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
410 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
412 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
432 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
434 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
454 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_bus.h234 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
237 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
239 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
265 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
267 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
292 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
294 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
312 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
314 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
332 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h322 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
325 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
327 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
354 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
356 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1U : 0U); in LL_AHB1_GRP1_IsEnabledClock()
382 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
384 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
406 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
408 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
430 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h879 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
882 WRITE_REG(RCC->AHB1ENSR, Periphs); in LL_AHB1_GRP1_EnableClock()
897 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
899 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
911 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
913 WRITE_REG(RCC->AHB1ENCR, Periphs); in LL_AHB1_GRP1_DisableClock()
925 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
927 WRITE_REG(RCC->AHB1RSTSR, Periphs); in LL_AHB1_GRP1_ForceReset()
939 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
941 WRITE_REG(RCC->AHB1RSTCR, Periphs); in LL_AHB1_GRP1_ReleaseReset()
[all …]
Dstm32n6xx_ll_system.h455 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_FreezePeriph() argument
457 SET_BIT(DBGMCU->APB1LFZ1, Periphs); in LL_DBGMCU_APB1_GRP1_FreezePeriph()
484 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_UnFreezePeriph() argument
486 CLEAR_BIT(DBGMCU->APB1LFZ1, Periphs); in LL_DBGMCU_APB1_GRP1_UnFreezePeriph()
496 __STATIC_INLINE void LL_DBGMCU_APB1_GRP2_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP2_FreezePeriph() argument
498 CLEAR_BIT(DBGMCU->APB1HFZ1, Periphs); in LL_DBGMCU_APB1_GRP2_FreezePeriph()
508 __STATIC_INLINE void LL_DBGMCU_APB1_GRP2_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP2_UnFreezePeriph() argument
510 CLEAR_BIT(DBGMCU->APB1HFZ1, Periphs); in LL_DBGMCU_APB1_GRP2_UnFreezePeriph()
526 __STATIC_INLINE void LL_DBGMCU_APB2_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB2_FreezePeriph() argument
528 SET_BIT(DBGMCU->APB2FZ1, Periphs); in LL_DBGMCU_APB2_FreezePeriph()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_bus.h425 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
428 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
430 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
476 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
478 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
534 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
536 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
570 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
572 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
607 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_bus.h560 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
563 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
565 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
605 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
607 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
646 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
648 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
675 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
677 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
704 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_bus.h221 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
224 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
226 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
249 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
251 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
274 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
276 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
297 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
299 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
320 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_bus.h243 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
246 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
248 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
271 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
273 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
295 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
297 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
320 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
322 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
345 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_bus.h327 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
330 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
332 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
359 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
361 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
387 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
389 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
416 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
418 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
445 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_bus.h238 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
241 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
243 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
292 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
294 return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
342 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
344 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
383 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
385 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
424 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_bus.h309 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
312 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
314 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
371 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
373 return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
429 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
431 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
476 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
478 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
523 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_bus.h409 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
412 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
414 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
473 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
475 return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
533 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
535 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
582 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
584 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
631 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_bus.h222 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
225 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
227 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
250 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
252 return ((READ_BIT(RCC->AHBENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
274 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
276 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
299 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
301 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
324 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_bus.h183 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
186 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
188 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
203 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
205 return ((READ_BIT(RCC->AHBENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
219 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
221 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
236 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
238 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
253 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_bus.h211 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
214 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
216 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
242 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
244 return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
269 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
271 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
297 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
299 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
326 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_bus.h250 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
253 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
255 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
275 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
277 return ((READ_BIT(RCC->AHBENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
296 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
298 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
318 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
320 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
340 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_bus.h214 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
217 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
219 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
258 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
260 return ((READ_BIT(RCC->AHBENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
298 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
300 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
339 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
341 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
380 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_bus.h229 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
232 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
234 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
256 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
258 return ((READ_BIT(RCC->AHBENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
279 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
281 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
302 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
304 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
325 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_bus.h225 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
228 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
230 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
265 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
267 return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
301 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
303 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
328 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
330 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
355 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_bus.h285 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
288 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
290 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
337 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
339 return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
385 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
387 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
424 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
426 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
463 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_bus.h267 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
270 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
272 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
305 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
307 return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
339 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
341 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
357 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
359 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
374 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
[all …]

12