Lines Matching refs:Periphs

560 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClock()  argument
563 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
565 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
605 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
607 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
646 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
648 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
675 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
677 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
704 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
706 CLEAR_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ReleaseReset()
745 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_EnableClockSleep() argument
748 SET_BIT(RCC->AHB1LPENR, Periphs); in LL_AHB1_GRP1_EnableClockSleep()
750 tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs); in LL_AHB1_GRP1_EnableClockSleep()
790 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClockSleep() argument
792 return ((READ_BIT(RCC->AHB1LPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClockSleep()
831 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_DisableClockSleep() argument
833 CLEAR_BIT(RCC->AHB1LPENR, Periphs); in LL_AHB1_GRP1_DisableClockSleep()
889 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) in LL_AHB2_GRP1_EnableClock() argument
892 SET_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
894 tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
944 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClock() argument
946 return ((READ_BIT(RCC->AHB2ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClock()
995 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) in LL_AHB2_GRP1_DisableClock() argument
997 CLEAR_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_DisableClock()
1042 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) in LL_AHB2_GRP1_ForceReset() argument
1044 SET_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ForceReset()
1089 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB2_GRP1_ReleaseReset() argument
1091 CLEAR_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ReleaseReset()
1140 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockSleep(uint32_t Periphs) in LL_AHB2_GRP1_EnableClockSleep() argument
1143 SET_BIT(RCC->AHB2LPENR, Periphs); in LL_AHB2_GRP1_EnableClockSleep()
1145 tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs); in LL_AHB2_GRP1_EnableClockSleep()
1195 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClockSleep() argument
1197 return ((READ_BIT(RCC->AHB2LPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClockSleep()
1246 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockSleep(uint32_t Periphs) in LL_AHB2_GRP1_DisableClockSleep() argument
1248 CLEAR_BIT(RCC->AHB2LPENR, Periphs); in LL_AHB2_GRP1_DisableClockSleep()
1277 __STATIC_INLINE void LL_AHB4_GRP1_EnableClock(uint32_t Periphs) in LL_AHB4_GRP1_EnableClock() argument
1280 SET_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
1282 tmpreg = READ_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
1302 __STATIC_INLINE uint32_t LL_AHB4_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB4_GRP1_IsEnabledClock() argument
1304 return ((READ_BIT(RCC->AHB4ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB4_GRP1_IsEnabledClock()
1323 __STATIC_INLINE void LL_AHB4_GRP1_DisableClock(uint32_t Periphs) in LL_AHB4_GRP1_DisableClock() argument
1325 CLEAR_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_DisableClock()
1343 __STATIC_INLINE void LL_AHB4_GRP1_ForceReset(uint32_t Periphs) in LL_AHB4_GRP1_ForceReset() argument
1345 SET_BIT(RCC->AHB4RSTR, Periphs); in LL_AHB4_GRP1_ForceReset()
1364 __STATIC_INLINE void LL_AHB4_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB4_GRP1_ReleaseReset() argument
1366 CLEAR_BIT(RCC->AHB4RSTR, Periphs); in LL_AHB4_GRP1_ReleaseReset()
1385 __STATIC_INLINE void LL_AHB4_GRP1_EnableClockSleep(uint32_t Periphs) in LL_AHB4_GRP1_EnableClockSleep() argument
1388 SET_BIT(RCC->AHB4LPENR, Periphs); in LL_AHB4_GRP1_EnableClockSleep()
1390 tmpreg = READ_BIT(RCC->AHB4LPENR, Periphs); in LL_AHB4_GRP1_EnableClockSleep()
1410 __STATIC_INLINE uint32_t LL_AHB4_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_AHB4_GRP1_IsEnabledClockSleep() argument
1412 return ((READ_BIT(RCC->AHB4LPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB4_GRP1_IsEnabledClockSleep()
1431 __STATIC_INLINE void LL_AHB4_GRP1_DisableClockSleep(uint32_t Periphs) in LL_AHB4_GRP1_DisableClockSleep() argument
1433 CLEAR_BIT(RCC->AHB4LPENR, Periphs); in LL_AHB4_GRP1_DisableClockSleep()
1507 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) in LL_APB1_GRP1_EnableClock() argument
1510 SET_BIT(RCC->APB1LENR, Periphs); in LL_APB1_GRP1_EnableClock()
1512 tmpreg = READ_BIT(RCC->APB1LENR, Periphs); in LL_APB1_GRP1_EnableClock()
1537 __STATIC_INLINE void LL_APB1_GRP2_EnableClock(uint32_t Periphs) in LL_APB1_GRP2_EnableClock() argument
1540 SET_BIT(RCC->APB1HENR, Periphs); in LL_APB1_GRP2_EnableClock()
1542 tmpreg = READ_BIT(RCC->APB1HENR, Periphs); in LL_APB1_GRP2_EnableClock()
1605 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClock() argument
1607 return ((READ_BIT(RCC->APB1LENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1630 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP2_IsEnabledClock() argument
1632 return ((READ_BIT(RCC->APB1HENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1694 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) in LL_APB1_GRP1_DisableClock() argument
1696 CLEAR_BIT(RCC->APB1LENR, Periphs); in LL_APB1_GRP1_DisableClock()
1719 __STATIC_INLINE void LL_APB1_GRP2_DisableClock(uint32_t Periphs) in LL_APB1_GRP2_DisableClock() argument
1721 CLEAR_BIT(RCC->APB1HENR, Periphs); in LL_APB1_GRP2_DisableClock()
1781 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) in LL_APB1_GRP1_ForceReset() argument
1783 SET_BIT(RCC->APB1LRSTR, Periphs); in LL_APB1_GRP1_ForceReset()
1806 __STATIC_INLINE void LL_APB1_GRP2_ForceReset(uint32_t Periphs) in LL_APB1_GRP2_ForceReset() argument
1808 SET_BIT(RCC->APB1HRSTR, Periphs); in LL_APB1_GRP2_ForceReset()
1868 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP1_ReleaseReset() argument
1870 CLEAR_BIT(RCC->APB1LRSTR, Periphs); in LL_APB1_GRP1_ReleaseReset()
1893 __STATIC_INLINE void LL_APB1_GRP2_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP2_ReleaseReset() argument
1895 CLEAR_BIT(RCC->APB1HRSTR, Periphs); in LL_APB1_GRP2_ReleaseReset()
1957 __STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB1_GRP1_EnableClockSleep() argument
1960 SET_BIT(RCC->APB1LLPENR, Periphs); in LL_APB1_GRP1_EnableClockSleep()
1962 tmpreg = READ_BIT(RCC->APB1LLPENR, Periphs); in LL_APB1_GRP1_EnableClockSleep()
2025 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClockSleep() argument
2027 return ((READ_BIT(RCC->APB1LLPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClockSleep()
2089 __STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB1_GRP1_DisableClockSleep() argument
2091 CLEAR_BIT(RCC->APB1LLPENR, Periphs); in LL_APB1_GRP1_DisableClockSleep()
2115 __STATIC_INLINE void LL_APB1_GRP2_EnableClockSleep(uint32_t Periphs) in LL_APB1_GRP2_EnableClockSleep() argument
2118 SET_BIT(RCC->APB1HLPENR, Periphs); in LL_APB1_GRP2_EnableClockSleep()
2120 tmpreg = READ_BIT(RCC->APB1HLPENR, Periphs); in LL_APB1_GRP2_EnableClockSleep()
2145 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClockSleep(uint32_t Periphs) in LL_APB1_GRP2_IsEnabledClockSleep() argument
2147 return ((READ_BIT(RCC->APB1HLPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClockSleep()
2171 __STATIC_INLINE void LL_APB1_GRP2_DisableClockSleep(uint32_t Periphs) in LL_APB1_GRP2_DisableClockSleep() argument
2173 CLEAR_BIT(RCC->APB1HLPENR, Periphs); in LL_APB1_GRP2_DisableClockSleep()
2216 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) in LL_APB2_GRP1_EnableClock() argument
2219 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
2221 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
2257 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClock() argument
2259 return ((READ_BIT(RCC->APB2ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClock()
2294 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) in LL_APB2_GRP1_DisableClock() argument
2296 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
2331 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) in LL_APB2_GRP1_ForceReset() argument
2333 SET_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ForceReset()
2368 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB2_GRP1_ReleaseReset() argument
2370 CLEAR_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ReleaseReset()
2405 __STATIC_INLINE void LL_APB2_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB2_GRP1_EnableClockSleep() argument
2408 SET_BIT(RCC->APB2LPENR, Periphs); in LL_APB2_GRP1_EnableClockSleep()
2410 tmpreg = READ_BIT(RCC->APB2LPENR, Periphs); in LL_APB2_GRP1_EnableClockSleep()
2447 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClockSleep() argument
2449 return ((READ_BIT(RCC->APB2LPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClockSleep()
2484 __STATIC_INLINE void LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB2_GRP1_DisableClockSleep() argument
2486 CLEAR_BIT(RCC->APB2LPENR, Periphs); in LL_APB2_GRP1_DisableClockSleep()
2529 __STATIC_INLINE void LL_APB3_GRP1_EnableClock(uint32_t Periphs) in LL_APB3_GRP1_EnableClock() argument
2532 SET_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
2534 tmpreg = READ_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
2570 __STATIC_INLINE uint32_t LL_APB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB3_GRP1_IsEnabledClock() argument
2572 return ((READ_BIT(RCC->APB3ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB3_GRP1_IsEnabledClock()
2607 __STATIC_INLINE void LL_APB3_GRP1_DisableClock(uint32_t Periphs) in LL_APB3_GRP1_DisableClock() argument
2609 CLEAR_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_DisableClock()
2641 __STATIC_INLINE void LL_APB3_GRP1_ForceReset(uint32_t Periphs) in LL_APB3_GRP1_ForceReset() argument
2643 SET_BIT(RCC->APB3RSTR, Periphs); in LL_APB3_GRP1_ForceReset()
2675 __STATIC_INLINE void LL_APB3_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB3_GRP1_ReleaseReset() argument
2677 CLEAR_BIT(RCC->APB3RSTR, Periphs); in LL_APB3_GRP1_ReleaseReset()
2712 __STATIC_INLINE void LL_APB3_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB3_GRP1_EnableClockSleep() argument
2715 SET_BIT(RCC->APB3LPENR, Periphs); in LL_APB3_GRP1_EnableClockSleep()
2717 tmpreg = READ_BIT(RCC->APB3LPENR, Periphs); in LL_APB3_GRP1_EnableClockSleep()
2754 __STATIC_INLINE uint32_t LL_APB3_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_APB3_GRP1_IsEnabledClockSleep() argument
2756 return ((READ_BIT(RCC->APB3LPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB3_GRP1_IsEnabledClockSleep()
2791 __STATIC_INLINE void LL_APB3_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB3_GRP1_DisableClockSleep() argument
2793 CLEAR_BIT(RCC->APB3LPENR, Periphs); in LL_APB3_GRP1_DisableClockSleep()