Lines Matching refs:Periphs
327 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
330 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
332 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
359 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
361 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
387 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
389 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
416 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
418 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
445 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
447 CLEAR_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ReleaseReset()
475 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_AHB1_GRP1_EnableClockStopSleep() argument
478 SET_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_EnableClockStopSleep()
480 tmpreg = READ_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_EnableClockStopSleep()
509 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_AHB1_GRP1_DisableClockStopSleep() argument
511 CLEAR_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_DisableClockStopSleep()
563 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) in LL_AHB2_GRP1_EnableClock() argument
566 SET_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
568 tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
613 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClock() argument
615 return ((READ_BIT(RCC->AHB2ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClock()
659 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) in LL_AHB2_GRP1_DisableClock() argument
661 CLEAR_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_DisableClock()
706 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) in LL_AHB2_GRP1_ForceReset() argument
708 SET_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ForceReset()
753 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB2_GRP1_ReleaseReset() argument
755 CLEAR_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ReleaseReset()
803 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_AHB2_GRP1_EnableClockStopSleep() argument
806 SET_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_EnableClockStopSleep()
808 tmpreg = READ_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_EnableClockStopSleep()
857 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_AHB2_GRP1_DisableClockStopSleep() argument
859 CLEAR_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_DisableClockStopSleep()
885 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs) in LL_AHB3_GRP1_EnableClock() argument
888 SET_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
890 tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
909 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB3_GRP1_IsEnabledClock() argument
911 return ((READ_BIT(RCC->AHB3ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB3_GRP1_IsEnabledClock()
929 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs) in LL_AHB3_GRP1_DisableClock() argument
931 CLEAR_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_DisableClock()
950 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) in LL_AHB3_GRP1_ForceReset() argument
952 SET_BIT(RCC->AHB3RSTR, Periphs); in LL_AHB3_GRP1_ForceReset()
971 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB3_GRP1_ReleaseReset() argument
973 CLEAR_BIT(RCC->AHB3RSTR, Periphs); in LL_AHB3_GRP1_ReleaseReset()
991 __STATIC_INLINE void LL_AHB3_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_AHB3_GRP1_EnableClockStopSleep() argument
994 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
996 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
1015 __STATIC_INLINE void LL_AHB3_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_AHB3_GRP1_DisableClockStopSleep() argument
1017 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockStopSleep()
1087 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) in LL_APB1_GRP1_EnableClock() argument
1090 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1092 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1111 __STATIC_INLINE void LL_APB1_GRP2_EnableClock(uint32_t Periphs) in LL_APB1_GRP2_EnableClock() argument
1114 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1116 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1179 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClock() argument
1181 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1199 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP2_IsEnabledClock() argument
1201 return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1263 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) in LL_APB1_GRP1_DisableClock() argument
1265 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
1283 __STATIC_INLINE void LL_APB1_GRP2_DisableClock(uint32_t Periphs) in LL_APB1_GRP2_DisableClock() argument
1285 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
1344 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) in LL_APB1_GRP1_ForceReset() argument
1346 SET_BIT(RCC->APB1RSTR1, Periphs); in LL_APB1_GRP1_ForceReset()
1365 __STATIC_INLINE void LL_APB1_GRP2_ForceReset(uint32_t Periphs) in LL_APB1_GRP2_ForceReset() argument
1367 SET_BIT(RCC->APB1RSTR2, Periphs); in LL_APB1_GRP2_ForceReset()
1426 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP1_ReleaseReset() argument
1428 CLEAR_BIT(RCC->APB1RSTR1, Periphs); in LL_APB1_GRP1_ReleaseReset()
1447 __STATIC_INLINE void LL_APB1_GRP2_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP2_ReleaseReset() argument
1449 CLEAR_BIT(RCC->APB1RSTR2, Periphs); in LL_APB1_GRP2_ReleaseReset()
1511 __STATIC_INLINE void LL_APB1_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP1_EnableClockStopSleep() argument
1514 SET_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_EnableClockStopSleep()
1516 tmpreg = READ_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_EnableClockStopSleep()
1535 __STATIC_INLINE void LL_APB1_GRP2_EnableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP2_EnableClockStopSleep() argument
1538 SET_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
1540 tmpreg = READ_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
1603 __STATIC_INLINE void LL_APB1_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP1_DisableClockStopSleep() argument
1605 CLEAR_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_DisableClockStopSleep()
1623 __STATIC_INLINE void LL_APB1_GRP2_DisableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP2_DisableClockStopSleep() argument
1625 CLEAR_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_DisableClockStopSleep()
1673 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) in LL_APB2_GRP1_EnableClock() argument
1676 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1678 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1719 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClock() argument
1721 return ((READ_BIT(RCC->APB2ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClock()
1759 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) in LL_APB2_GRP1_DisableClock() argument
1761 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
1800 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) in LL_APB2_GRP1_ForceReset() argument
1802 SET_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ForceReset()
1841 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB2_GRP1_ReleaseReset() argument
1843 CLEAR_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ReleaseReset()
1881 __STATIC_INLINE void LL_APB2_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_APB2_GRP1_EnableClockStopSleep() argument
1884 SET_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockStopSleep()
1886 tmpreg = READ_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockStopSleep()
1925 __STATIC_INLINE void LL_APB2_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_APB2_GRP1_DisableClockStopSleep() argument
1927 CLEAR_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_DisableClockStopSleep()