238 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClock()  argument
241   SET_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
243   tmpreg = READ_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
292 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB1_GRP1_IsEnabledClock()  argument
294   return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs);  in LL_AHB1_GRP1_IsEnabledClock()
342 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClock()  argument
344   CLEAR_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_DisableClock()
383 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB1_GRP1_ForceReset()  argument
385   SET_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ForceReset()
424 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB1_GRP1_ReleaseReset()  argument
426   CLEAR_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ReleaseReset()
481 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClockLowPower()  argument
484   SET_BIT(RCC->AHB1LPENR, Periphs);  in LL_AHB1_GRP1_EnableClockLowPower()
486   tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs);  in LL_AHB1_GRP1_EnableClockLowPower()
542 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClockLowPower()  argument
544   CLEAR_BIT(RCC->AHB1LPENR, Periphs);  in LL_AHB1_GRP1_DisableClockLowPower()
572 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClock()  argument
575   SET_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_EnableClock()
577   tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_EnableClock()
598 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB2_GRP1_IsEnabledClock()  argument
600   return (READ_BIT(RCC->AHB2ENR, Periphs) == Periphs);  in LL_AHB2_GRP1_IsEnabledClock()
620 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClock()  argument
622   CLEAR_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_DisableClock()
643 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB2_GRP1_ForceReset()  argument
645   SET_BIT(RCC->AHB2RSTR, Periphs);  in LL_AHB2_GRP1_ForceReset()
666 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB2_GRP1_ReleaseReset()  argument
668   CLEAR_BIT(RCC->AHB2RSTR, Periphs);  in LL_AHB2_GRP1_ReleaseReset()
688 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClockLowPower()  argument
691   SET_BIT(RCC->AHB2LPENR, Periphs);  in LL_AHB2_GRP1_EnableClockLowPower()
693   tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs);  in LL_AHB2_GRP1_EnableClockLowPower()
714 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClockLowPower()  argument
716   CLEAR_BIT(RCC->AHB2LPENR, Periphs);  in LL_AHB2_GRP1_DisableClockLowPower()
734 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClock()  argument
737   SET_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
739   tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
750 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB3_GRP1_IsEnabledClock()  argument
752   return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs);  in LL_AHB3_GRP1_IsEnabledClock()
762 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClock()  argument
764   CLEAR_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_DisableClock()
775 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB3_GRP1_ForceReset()  argument
777   SET_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ForceReset()
788 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB3_GRP1_ReleaseReset()  argument
790   CLEAR_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ReleaseReset()
800 __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClockLowPower()  argument
803   SET_BIT(RCC->AHB3LPENR, Periphs);  in LL_AHB3_GRP1_EnableClockLowPower()
805   tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs);  in LL_AHB3_GRP1_EnableClockLowPower()
816 __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClockLowPower()  argument
818   CLEAR_BIT(RCC->AHB3LPENR, Periphs);  in LL_AHB3_GRP1_DisableClockLowPower()
880 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)  in LL_APB1_GRP1_EnableClock()  argument
883   SET_BIT(RCC->APB1ENR, Periphs);  in LL_APB1_GRP1_EnableClock()
885   tmpreg = READ_BIT(RCC->APB1ENR, Periphs);  in LL_APB1_GRP1_EnableClock()
940 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB1_GRP1_IsEnabledClock()  argument
942   return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);  in LL_APB1_GRP1_IsEnabledClock()
996 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)  in LL_APB1_GRP1_DisableClock()  argument
998   CLEAR_BIT(RCC->APB1ENR, Periphs);  in LL_APB1_GRP1_DisableClock()
1053 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)  in LL_APB1_GRP1_ForceReset()  argument
1055   SET_BIT(RCC->APB1RSTR, Periphs);  in LL_APB1_GRP1_ForceReset()
1110 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB1_GRP1_ReleaseReset()  argument
1112   CLEAR_BIT(RCC->APB1RSTR, Periphs);  in LL_APB1_GRP1_ReleaseReset()
1166 __STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_APB1_GRP1_EnableClockLowPower()  argument
1169   SET_BIT(RCC->APB1LPENR, Periphs);  in LL_APB1_GRP1_EnableClockLowPower()
1171   tmpreg = READ_BIT(RCC->APB1LPENR, Periphs);  in LL_APB1_GRP1_EnableClockLowPower()
1226 __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_APB1_GRP1_DisableClockLowPower()  argument
1228   CLEAR_BIT(RCC->APB1LPENR, Periphs);  in LL_APB1_GRP1_DisableClockLowPower()
1270 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)  in LL_APB2_GRP1_EnableClock()  argument
1273   SET_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
1275   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
1310 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB2_GRP1_IsEnabledClock()  argument
1312   return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs);  in LL_APB2_GRP1_IsEnabledClock()
1346 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)  in LL_APB2_GRP1_DisableClock()  argument
1348   CLEAR_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_DisableClock()
1379 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)  in LL_APB2_GRP1_ForceReset()  argument
1381   SET_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ForceReset()
1412 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB2_GRP1_ReleaseReset()  argument
1414   CLEAR_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ReleaseReset()
1449 __STATIC_INLINE void LL_APB2_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_APB2_GRP1_EnableClockLowPower()  argument
1452   SET_BIT(RCC->APB2LPENR, Periphs);  in LL_APB2_GRP1_EnableClockLowPower()
1454   tmpreg = READ_BIT(RCC->APB2LPENR, Periphs);  in LL_APB2_GRP1_EnableClockLowPower()
1489 __STATIC_INLINE void LL_APB2_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_APB2_GRP1_DisableClockLowPower()  argument
1491   CLEAR_BIT(RCC->APB2LPENR, Periphs);  in LL_APB2_GRP1_DisableClockLowPower()