Lines Matching refs:Periphs
287 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
290 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
292 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
309 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
311 return ((READ_BIT(RCC->AHB1ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
327 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
329 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
346 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
348 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
365 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
367 CLEAR_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ReleaseReset()
383 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_EnableClockSleep() argument
386 SET_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_EnableClockSleep()
388 tmpreg = READ_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_EnableClockSleep()
405 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClockSleep() argument
407 return ((READ_BIT(RCC->AHB1SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClockSleep()
423 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_DisableClockSleep() argument
425 CLEAR_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_DisableClockSleep()
449 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) in LL_AHB2_GRP1_EnableClock() argument
452 SET_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
454 tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
471 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClock() argument
473 return ((READ_BIT(RCC->AHB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClock()
489 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) in LL_AHB2_GRP1_DisableClock() argument
491 CLEAR_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_DisableClock()
508 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) in LL_AHB2_GRP1_ForceReset() argument
510 SET_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ForceReset()
527 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB2_GRP1_ReleaseReset() argument
529 CLEAR_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ReleaseReset()
545 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockSleep(uint32_t Periphs) in LL_AHB2_GRP1_EnableClockSleep() argument
548 SET_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_EnableClockSleep()
550 tmpreg = READ_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_EnableClockSleep()
567 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClockSleep() argument
569 return ((READ_BIT(RCC->AHB2SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClockSleep()
585 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockSleep(uint32_t Periphs) in LL_AHB2_GRP1_DisableClockSleep() argument
587 CLEAR_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_DisableClockSleep()
634 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs) in LL_AHB3_GRP1_EnableClock() argument
637 SET_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
639 tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
679 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB3_GRP1_IsEnabledClock() argument
681 return ((READ_BIT(RCC->AHB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB3_GRP1_IsEnabledClock()
720 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs) in LL_AHB3_GRP1_DisableClock() argument
722 CLEAR_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_DisableClock()
763 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) in LL_AHB3_GRP1_ForceReset() argument
765 SET_BIT(RCC->AHB3RSTR, Periphs); in LL_AHB3_GRP1_ForceReset()
806 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB3_GRP1_ReleaseReset() argument
808 CLEAR_BIT(RCC->AHB3RSTR, Periphs); in LL_AHB3_GRP1_ReleaseReset()
828 __STATIC_INLINE void LL_AHB3_GRP1_EnableClockSleep(uint32_t Periphs) in LL_AHB3_GRP1_EnableClockSleep() argument
831 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
833 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
854 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_AHB3_GRP1_IsEnabledClockSleep() argument
856 return ((READ_BIT(RCC->AHB3SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB3_GRP1_IsEnabledClockSleep()
876 __STATIC_INLINE void LL_AHB3_GRP1_DisableClockSleep(uint32_t Periphs) in LL_AHB3_GRP1_DisableClockSleep() argument
878 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockSleep()
914 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) in LL_APB1_GRP1_EnableClock() argument
917 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
919 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
935 __STATIC_INLINE void LL_APB1_GRP2_EnableClock(uint32_t Periphs) in LL_APB1_GRP2_EnableClock() argument
938 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
940 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
971 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClock() argument
973 return ((READ_BIT(RCC->APB1ENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
987 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP2_IsEnabledClock() argument
989 return ((READ_BIT(RCC->APB1ENR2, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1018 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) in LL_APB1_GRP1_DisableClock() argument
1020 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
1034 __STATIC_INLINE void LL_APB1_GRP2_DisableClock(uint32_t Periphs) in LL_APB1_GRP2_DisableClock() argument
1036 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
1062 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) in LL_APB1_GRP1_ForceReset() argument
1064 SET_BIT(RCC->APB1RSTR1, Periphs); in LL_APB1_GRP1_ForceReset()
1079 __STATIC_INLINE void LL_APB1_GRP2_ForceReset(uint32_t Periphs) in LL_APB1_GRP2_ForceReset() argument
1081 SET_BIT(RCC->APB1RSTR2, Periphs); in LL_APB1_GRP2_ForceReset()
1107 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP1_ReleaseReset() argument
1109 CLEAR_BIT(RCC->APB1RSTR1, Periphs); in LL_APB1_GRP1_ReleaseReset()
1124 __STATIC_INLINE void LL_APB1_GRP2_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP2_ReleaseReset() argument
1126 CLEAR_BIT(RCC->APB1RSTR2, Periphs); in LL_APB1_GRP2_ReleaseReset()
1155 __STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB1_GRP1_EnableClockSleep() argument
1158 SET_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_EnableClockSleep()
1160 tmpreg = READ_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_EnableClockSleep()
1175 __STATIC_INLINE void LL_APB1_GRP2_EnableClockSleep(uint32_t Periphs) in LL_APB1_GRP2_EnableClockSleep() argument
1178 SET_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_EnableClockSleep()
1180 tmpreg = READ_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_EnableClockSleep()
1210 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClockSleep() argument
1212 return ((READ_BIT(RCC->APB1SMENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClockSleep()
1226 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClockSleep(uint32_t Periphs) in LL_APB1_GRP2_IsEnabledClockSleep() argument
1228 return ((READ_BIT(RCC->APB1SMENR2, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClockSleep()
1257 __STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB1_GRP1_DisableClockSleep() argument
1259 CLEAR_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_DisableClockSleep()
1273 __STATIC_INLINE void LL_APB1_GRP2_DisableClockSleep(uint32_t Periphs) in LL_APB1_GRP2_DisableClockSleep() argument
1275 CLEAR_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_DisableClockSleep()
1303 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) in LL_APB2_GRP1_EnableClock() argument
1306 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1308 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1329 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClock() argument
1331 return ((READ_BIT(RCC->APB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClock()
1351 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) in LL_APB2_GRP1_DisableClock() argument
1353 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
1374 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) in LL_APB2_GRP1_ForceReset() argument
1376 SET_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ForceReset()
1397 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB2_GRP1_ReleaseReset() argument
1399 CLEAR_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ReleaseReset()
1419 __STATIC_INLINE void LL_APB2_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB2_GRP1_EnableClockSleep() argument
1422 SET_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockSleep()
1424 tmpreg = READ_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockSleep()
1446 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClockSleep() argument
1448 return ((READ_BIT(RCC->APB2SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClockSleep()
1468 __STATIC_INLINE void LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB2_GRP1_DisableClockSleep() argument
1470 CLEAR_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_DisableClockSleep()
1488 __STATIC_INLINE void LL_APB3_GRP1_EnableClock(uint32_t Periphs) in LL_APB3_GRP1_EnableClock() argument
1491 SET_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
1493 tmpreg = READ_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
1504 __STATIC_INLINE uint32_t LL_APB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB3_GRP1_IsEnabledClock() argument
1506 return ((READ_BIT(RCC->APB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB3_GRP1_IsEnabledClock()
1516 __STATIC_INLINE void LL_APB3_GRP1_DisableClock(uint32_t Periphs) in LL_APB3_GRP1_DisableClock() argument
1518 CLEAR_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_DisableClock()
1529 __STATIC_INLINE void LL_APB3_GRP1_ForceReset(uint32_t Periphs) in LL_APB3_GRP1_ForceReset() argument
1531 SET_BIT(RCC->APB3RSTR, Periphs); in LL_APB3_GRP1_ForceReset()
1541 __STATIC_INLINE void LL_APB3_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB3_GRP1_ReleaseReset() argument
1543 CLEAR_BIT(RCC->APB3RSTR, Periphs); in LL_APB3_GRP1_ReleaseReset()
1553 __STATIC_INLINE void LL_APB3_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB3_GRP1_EnableClockSleep() argument
1556 SET_BIT(RCC->APB3SMENR, Periphs); in LL_APB3_GRP1_EnableClockSleep()
1558 tmpreg = READ_BIT(RCC->APB3SMENR, Periphs); in LL_APB3_GRP1_EnableClockSleep()
1569 __STATIC_INLINE uint32_t LL_APB3_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_APB3_GRP1_IsEnabledClockSleep() argument
1571 return ((READ_BIT(RCC->APB3SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB3_GRP1_IsEnabledClockSleep()
1581 __STATIC_INLINE void LL_APB3_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB3_GRP1_DisableClockSleep() argument
1583 CLEAR_BIT(RCC->APB3SMENR, Periphs); in LL_APB3_GRP1_DisableClockSleep()
1608 __STATIC_INLINE void LL_C2_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_C2_AHB1_GRP1_EnableClock() argument
1611 SET_BIT(RCC->C2AHB1ENR, Periphs); in LL_C2_AHB1_GRP1_EnableClock()
1613 tmpreg = READ_BIT(RCC->C2AHB1ENR, Periphs); in LL_C2_AHB1_GRP1_EnableClock()
1630 __STATIC_INLINE uint32_t LL_C2_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_C2_AHB1_GRP1_IsEnabledClock() argument
1632 return ((READ_BIT(RCC->C2AHB1ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_AHB1_GRP1_IsEnabledClock()
1648 __STATIC_INLINE void LL_C2_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_C2_AHB1_GRP1_DisableClock() argument
1650 CLEAR_BIT(RCC->C2AHB1ENR, Periphs); in LL_C2_AHB1_GRP1_DisableClock()
1666 __STATIC_INLINE void LL_C2_AHB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_C2_AHB1_GRP1_EnableClockSleep() argument
1669 SET_BIT(RCC->C2AHB1SMENR, Periphs); in LL_C2_AHB1_GRP1_EnableClockSleep()
1671 tmpreg = READ_BIT(RCC->C2AHB1SMENR, Periphs); in LL_C2_AHB1_GRP1_EnableClockSleep()
1688 __STATIC_INLINE uint32_t LL_C2_AHB1_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_C2_AHB1_GRP1_IsEnabledClockSleep() argument
1690 return ((READ_BIT(RCC->C2AHB1SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_AHB1_GRP1_IsEnabledClockSleep()
1706 __STATIC_INLINE void LL_C2_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_C2_AHB1_GRP1_DisableClockSleep() argument
1708 CLEAR_BIT(RCC->C2AHB1SMENR, Periphs); in LL_C2_AHB1_GRP1_DisableClockSleep()
1732 __STATIC_INLINE void LL_C2_AHB2_GRP1_EnableClock(uint32_t Periphs) in LL_C2_AHB2_GRP1_EnableClock() argument
1735 SET_BIT(RCC->C2AHB2ENR, Periphs); in LL_C2_AHB2_GRP1_EnableClock()
1737 tmpreg = READ_BIT(RCC->C2AHB2ENR, Periphs); in LL_C2_AHB2_GRP1_EnableClock()
1754 __STATIC_INLINE uint32_t LL_C2_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_C2_AHB2_GRP1_IsEnabledClock() argument
1756 return ((READ_BIT(RCC->C2AHB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_AHB2_GRP1_IsEnabledClock()
1772 __STATIC_INLINE void LL_C2_AHB2_GRP1_DisableClock(uint32_t Periphs) in LL_C2_AHB2_GRP1_DisableClock() argument
1774 CLEAR_BIT(RCC->C2AHB2ENR, Periphs); in LL_C2_AHB2_GRP1_DisableClock()
1790 __STATIC_INLINE void LL_C2_AHB2_GRP1_EnableClockSleep(uint32_t Periphs) in LL_C2_AHB2_GRP1_EnableClockSleep() argument
1793 SET_BIT(RCC->C2AHB2SMENR, Periphs); in LL_C2_AHB2_GRP1_EnableClockSleep()
1795 tmpreg = READ_BIT(RCC->C2AHB2SMENR, Periphs); in LL_C2_AHB2_GRP1_EnableClockSleep()
1812 __STATIC_INLINE uint32_t LL_C2_AHB2_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_C2_AHB2_GRP1_IsEnabledClockSleep() argument
1814 return ((READ_BIT(RCC->C2AHB2SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_AHB2_GRP1_IsEnabledClockSleep()
1831 __STATIC_INLINE void LL_C2_AHB2_GRP1_DisableClockSleep(uint32_t Periphs) in LL_C2_AHB2_GRP1_DisableClockSleep() argument
1833 CLEAR_BIT(RCC->C2AHB2SMENR, Periphs); in LL_C2_AHB2_GRP1_DisableClockSleep()
1861 __STATIC_INLINE void LL_C2_AHB3_GRP1_EnableClock(uint32_t Periphs) in LL_C2_AHB3_GRP1_EnableClock() argument
1864 SET_BIT(RCC->C2AHB3ENR, Periphs); in LL_C2_AHB3_GRP1_EnableClock()
1866 tmpreg = READ_BIT(RCC->C2AHB3ENR, Periphs); in LL_C2_AHB3_GRP1_EnableClock()
1887 __STATIC_INLINE uint32_t LL_C2_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_C2_AHB3_GRP1_IsEnabledClock() argument
1889 return ((READ_BIT(RCC->C2AHB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_AHB3_GRP1_IsEnabledClock()
1909 __STATIC_INLINE void LL_C2_AHB3_GRP1_DisableClock(uint32_t Periphs) in LL_C2_AHB3_GRP1_DisableClock() argument
1911 CLEAR_BIT(RCC->C2AHB3ENR, Periphs); in LL_C2_AHB3_GRP1_DisableClock()
1931 __STATIC_INLINE void LL_C2_AHB3_GRP1_EnableClockSleep(uint32_t Periphs) in LL_C2_AHB3_GRP1_EnableClockSleep() argument
1934 SET_BIT(RCC->C2AHB3SMENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
1936 tmpreg = READ_BIT(RCC->C2AHB3SMENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
1957 __STATIC_INLINE uint32_t LL_C2_AHB3_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_C2_AHB3_GRP1_IsEnabledClockSleep() argument
1959 return ((READ_BIT(RCC->C2AHB3SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_AHB3_GRP1_IsEnabledClockSleep()
1977 __STATIC_INLINE void LL_C2_AHB3_GRP1_DisableClockSleep(uint32_t Periphs) in LL_C2_AHB3_GRP1_DisableClockSleep() argument
1979 CLEAR_BIT(RCC->C2AHB3SMENR, Periphs); in LL_C2_AHB3_GRP1_DisableClockSleep()
2014 __STATIC_INLINE void LL_C2_APB1_GRP1_EnableClock(uint32_t Periphs) in LL_C2_APB1_GRP1_EnableClock() argument
2017 SET_BIT(RCC->C2APB1ENR1, Periphs); in LL_C2_APB1_GRP1_EnableClock()
2019 tmpreg = READ_BIT(RCC->C2APB1ENR1, Periphs); in LL_C2_APB1_GRP1_EnableClock()
2032 __STATIC_INLINE void LL_C2_APB1_GRP2_EnableClock(uint32_t Periphs) in LL_C2_APB1_GRP2_EnableClock() argument
2035 SET_BIT(RCC->C2APB1ENR2, Periphs); in LL_C2_APB1_GRP2_EnableClock()
2037 tmpreg = READ_BIT(RCC->C2APB1ENR2, Periphs); in LL_C2_APB1_GRP2_EnableClock()
2065 __STATIC_INLINE uint32_t LL_C2_APB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_C2_APB1_GRP1_IsEnabledClock() argument
2067 return ((READ_BIT(RCC->C2APB1ENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB1_GRP1_IsEnabledClock()
2079 __STATIC_INLINE uint32_t LL_C2_APB1_GRP2_IsEnabledClock(uint32_t Periphs) in LL_C2_APB1_GRP2_IsEnabledClock() argument
2081 return ((READ_BIT(RCC->C2APB1ENR2, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB1_GRP2_IsEnabledClock()
2108 __STATIC_INLINE void LL_C2_APB1_GRP1_DisableClock(uint32_t Periphs) in LL_C2_APB1_GRP1_DisableClock() argument
2110 CLEAR_BIT(RCC->C2APB1ENR1, Periphs); in LL_C2_APB1_GRP1_DisableClock()
2122 __STATIC_INLINE void LL_C2_APB1_GRP2_DisableClock(uint32_t Periphs) in LL_C2_APB1_GRP2_DisableClock() argument
2124 CLEAR_BIT(RCC->C2APB1ENR2, Periphs); in LL_C2_APB1_GRP2_DisableClock()
2150 __STATIC_INLINE void LL_C2_APB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_C2_APB1_GRP1_EnableClockSleep() argument
2153 SET_BIT(RCC->C2APB1SMENR1, Periphs); in LL_C2_APB1_GRP1_EnableClockSleep()
2155 tmpreg = READ_BIT(RCC->C2APB1SMENR1, Periphs); in LL_C2_APB1_GRP1_EnableClockSleep()
2170 __STATIC_INLINE void LL_C2_APB1_GRP2_EnableClockSleep(uint32_t Periphs) in LL_C2_APB1_GRP2_EnableClockSleep() argument
2173 SET_BIT(RCC->C2APB1SMENR2, Periphs); in LL_C2_APB1_GRP2_EnableClockSleep()
2175 tmpreg = READ_BIT(RCC->C2APB1SMENR2, Periphs); in LL_C2_APB1_GRP2_EnableClockSleep()
2202 __STATIC_INLINE uint32_t LL_C2_APB1_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_C2_APB1_GRP1_IsEnabledClockSleep() argument
2204 return ((READ_BIT(RCC->C2APB1SMENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB1_GRP1_IsEnabledClockSleep()
2218 __STATIC_INLINE uint32_t LL_C2_APB1_GRP2_IsEnabledClockSleep(uint32_t Periphs) in LL_C2_APB1_GRP2_IsEnabledClockSleep() argument
2220 return ((READ_BIT(RCC->C2APB1SMENR2, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB1_GRP2_IsEnabledClockSleep()
2247 __STATIC_INLINE void LL_C2_APB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_C2_APB1_GRP1_DisableClockSleep() argument
2249 CLEAR_BIT(RCC->C2APB1SMENR1, Periphs); in LL_C2_APB1_GRP1_DisableClockSleep()
2261 __STATIC_INLINE void LL_C2_APB1_GRP2_DisableClockSleep(uint32_t Periphs) in LL_C2_APB1_GRP2_DisableClockSleep() argument
2263 CLEAR_BIT(RCC->C2APB1SMENR2, Periphs); in LL_C2_APB1_GRP2_DisableClockSleep()
2291 __STATIC_INLINE void LL_C2_APB2_GRP1_EnableClock(uint32_t Periphs) in LL_C2_APB2_GRP1_EnableClock() argument
2294 SET_BIT(RCC->C2APB2ENR, Periphs); in LL_C2_APB2_GRP1_EnableClock()
2296 tmpreg = READ_BIT(RCC->C2APB2ENR, Periphs); in LL_C2_APB2_GRP1_EnableClock()
2317 __STATIC_INLINE uint32_t LL_C2_APB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_C2_APB2_GRP1_IsEnabledClock() argument
2319 return ((READ_BIT(RCC->C2APB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB2_GRP1_IsEnabledClock()
2339 __STATIC_INLINE void LL_C2_APB2_GRP1_DisableClock(uint32_t Periphs) in LL_C2_APB2_GRP1_DisableClock() argument
2341 CLEAR_BIT(RCC->C2APB2ENR, Periphs); in LL_C2_APB2_GRP1_DisableClock()
2361 __STATIC_INLINE void LL_C2_APB2_GRP1_EnableClockSleep(uint32_t Periphs) in LL_C2_APB2_GRP1_EnableClockSleep() argument
2364 SET_BIT(RCC->C2APB2SMENR, Periphs); in LL_C2_APB2_GRP1_EnableClockSleep()
2366 tmpreg = READ_BIT(RCC->C2APB2SMENR, Periphs); in LL_C2_APB2_GRP1_EnableClockSleep()
2387 __STATIC_INLINE uint32_t LL_C2_APB2_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_C2_APB2_GRP1_IsEnabledClockSleep() argument
2389 return ((READ_BIT(RCC->C2APB2SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB2_GRP1_IsEnabledClockSleep()
2409 __STATIC_INLINE void LL_C2_APB2_GRP1_DisableClockSleep(uint32_t Periphs) in LL_C2_APB2_GRP1_DisableClockSleep() argument
2411 CLEAR_BIT(RCC->C2APB2SMENR, Periphs); in LL_C2_APB2_GRP1_DisableClockSleep()
2429 __STATIC_INLINE void LL_C2_APB3_GRP1_EnableClock(uint32_t Periphs) in LL_C2_APB3_GRP1_EnableClock() argument
2432 SET_BIT(RCC->C2APB3ENR, Periphs); in LL_C2_APB3_GRP1_EnableClock()
2434 tmpreg = READ_BIT(RCC->C2APB3ENR, Periphs); in LL_C2_APB3_GRP1_EnableClock()
2445 __STATIC_INLINE uint32_t LL_C2_APB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_C2_APB3_GRP1_IsEnabledClock() argument
2447 return ((READ_BIT(RCC->C2APB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB3_GRP1_IsEnabledClock()
2457 __STATIC_INLINE void LL_C2_APB3_GRP1_DisableClock(uint32_t Periphs) in LL_C2_APB3_GRP1_DisableClock() argument
2459 CLEAR_BIT(RCC->C2APB3ENR, Periphs); in LL_C2_APB3_GRP1_DisableClock()
2469 __STATIC_INLINE void LL_C2_APB3_GRP1_EnableClockSleep(uint32_t Periphs) in LL_C2_APB3_GRP1_EnableClockSleep() argument
2472 SET_BIT(RCC->C2APB3SMENR, Periphs); in LL_C2_APB3_GRP1_EnableClockSleep()
2474 tmpreg = READ_BIT(RCC->C2APB3SMENR, Periphs); in LL_C2_APB3_GRP1_EnableClockSleep()
2485 __STATIC_INLINE uint32_t LL_C2_APB3_GRP1_IsEnabledClockSleep(uint32_t Periphs) in LL_C2_APB3_GRP1_IsEnabledClockSleep() argument
2487 return ((READ_BIT(RCC->C2APB3SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_C2_APB3_GRP1_IsEnabledClockSleep()
2497 __STATIC_INLINE void LL_C2_APB3_GRP1_DisableClockSleep(uint32_t Periphs) in LL_C2_APB3_GRP1_DisableClockSleep() argument
2499 CLEAR_BIT(RCC->C2APB3SMENR, Periphs); in LL_C2_APB3_GRP1_DisableClockSleep()