409 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClock()  argument
412   SET_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
414   tmpreg = READ_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
473 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB1_GRP1_IsEnabledClock()  argument
475   return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs);  in LL_AHB1_GRP1_IsEnabledClock()
533 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClock()  argument
535   CLEAR_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_DisableClock()
582 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB1_GRP1_ForceReset()  argument
584   SET_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ForceReset()
631 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB1_GRP1_ReleaseReset()  argument
633   CLEAR_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ReleaseReset()
698 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClockLowPower()  argument
701   SET_BIT(RCC->AHB1LPENR, Periphs);  in LL_AHB1_GRP1_EnableClockLowPower()
703   tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs);  in LL_AHB1_GRP1_EnableClockLowPower()
769 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClockLowPower()  argument
771   CLEAR_BIT(RCC->AHB1LPENR, Periphs);  in LL_AHB1_GRP1_DisableClockLowPower()
802 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClock()  argument
805   SET_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_EnableClock()
807   tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_EnableClock()
830 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB2_GRP1_IsEnabledClock()  argument
832   return (READ_BIT(RCC->AHB2ENR, Periphs) == Periphs);  in LL_AHB2_GRP1_IsEnabledClock()
854 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClock()  argument
856   CLEAR_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_DisableClock()
879 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB2_GRP1_ForceReset()  argument
881   SET_BIT(RCC->AHB2RSTR, Periphs);  in LL_AHB2_GRP1_ForceReset()
904 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB2_GRP1_ReleaseReset()  argument
906   CLEAR_BIT(RCC->AHB2RSTR, Periphs);  in LL_AHB2_GRP1_ReleaseReset()
928 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClockLowPower()  argument
931   SET_BIT(RCC->AHB2LPENR, Periphs);  in LL_AHB2_GRP1_EnableClockLowPower()
933   tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs);  in LL_AHB2_GRP1_EnableClockLowPower()
956 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClockLowPower()  argument
958   CLEAR_BIT(RCC->AHB2LPENR, Periphs);  in LL_AHB2_GRP1_DisableClockLowPower()
984 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClock()  argument
987   SET_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
989   tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
1006 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB3_GRP1_IsEnabledClock()  argument
1008   return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs);  in LL_AHB3_GRP1_IsEnabledClock()
1024 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClock()  argument
1026   CLEAR_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_DisableClock()
1043 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB3_GRP1_ForceReset()  argument
1045   SET_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ForceReset()
1062 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB3_GRP1_ReleaseReset()  argument
1064   CLEAR_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ReleaseReset()
1080 __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClockLowPower()  argument
1083   SET_BIT(RCC->AHB3LPENR, Periphs);  in LL_AHB3_GRP1_EnableClockLowPower()
1085   tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs);  in LL_AHB3_GRP1_EnableClockLowPower()
1102 __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClockLowPower()  argument
1104   CLEAR_BIT(RCC->AHB3LPENR, Periphs);  in LL_AHB3_GRP1_DisableClockLowPower()
1185 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)  in LL_APB1_GRP1_EnableClock()  argument
1188   SET_BIT(RCC->APB1ENR, Periphs);  in LL_APB1_GRP1_EnableClock()
1190   tmpreg = READ_BIT(RCC->APB1ENR, Periphs);  in LL_APB1_GRP1_EnableClock()
1263 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB1_GRP1_IsEnabledClock()  argument
1265   return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);  in LL_APB1_GRP1_IsEnabledClock()
1337 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)  in LL_APB1_GRP1_DisableClock()  argument
1339   CLEAR_BIT(RCC->APB1ENR, Periphs);  in LL_APB1_GRP1_DisableClock()
1409 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)  in LL_APB1_GRP1_ForceReset()  argument
1411   SET_BIT(RCC->APB1RSTR, Periphs);  in LL_APB1_GRP1_ForceReset()
1481 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB1_GRP1_ReleaseReset()  argument
1483   CLEAR_BIT(RCC->APB1RSTR, Periphs);  in LL_APB1_GRP1_ReleaseReset()
1555 __STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_APB1_GRP1_EnableClockLowPower()  argument
1558   SET_BIT(RCC->APB1LPENR, Periphs);  in LL_APB1_GRP1_EnableClockLowPower()
1560   tmpreg = READ_BIT(RCC->APB1LPENR, Periphs);  in LL_APB1_GRP1_EnableClockLowPower()
1633 __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_APB1_GRP1_DisableClockLowPower()  argument
1635   CLEAR_BIT(RCC->APB1LPENR, Periphs);  in LL_APB1_GRP1_DisableClockLowPower()
1704 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)  in LL_APB2_GRP1_EnableClock()  argument
1707   SET_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
1709   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
1770 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB2_GRP1_IsEnabledClock()  argument
1772   return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs);  in LL_APB2_GRP1_IsEnabledClock()
1832 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)  in LL_APB2_GRP1_DisableClock()  argument
1834   CLEAR_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_DisableClock()
1889 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)  in LL_APB2_GRP1_ForceReset()  argument
1891   SET_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ForceReset()
1947 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB2_GRP1_ReleaseReset()  argument
1949   CLEAR_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ReleaseReset()
2010 __STATIC_INLINE void LL_APB2_GRP1_EnableClockLowPower(uint32_t Periphs)  in LL_APB2_GRP1_EnableClockLowPower()  argument
2013   SET_BIT(RCC->APB2LPENR, Periphs);  in LL_APB2_GRP1_EnableClockLowPower()
2015   tmpreg = READ_BIT(RCC->APB2LPENR, Periphs);  in LL_APB2_GRP1_EnableClockLowPower()
2077 __STATIC_INLINE void LL_APB2_GRP1_DisableClockLowPower(uint32_t Periphs)  in LL_APB2_GRP1_DisableClockLowPower()  argument
2079   CLEAR_BIT(RCC->APB2LPENR, Periphs);  in LL_APB2_GRP1_DisableClockLowPower()