364 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClock()  argument
367   SET_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
369   tmpreg = READ_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
389 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB1_GRP1_IsEnabledClock()  argument
391   return ((READ_BIT(RCC->AHB1ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_AHB1_GRP1_IsEnabledClock()
410 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClock()  argument
412   CLEAR_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_DisableClock()
432 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB1_GRP1_ForceReset()  argument
434   SET_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ForceReset()
454 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB1_GRP1_ReleaseReset()  argument
456   CLEAR_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ReleaseReset()
477 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClockSleep()  argument
480   SET_BIT(RCC->AHB1SMENR, Periphs);  in LL_AHB1_GRP1_EnableClockSleep()
482   tmpreg = READ_BIT(RCC->AHB1SMENR, Periphs);  in LL_AHB1_GRP1_EnableClockSleep()
504 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClockSleep()  argument
506   CLEAR_BIT(RCC->AHB1SMENR, Periphs);  in LL_AHB1_GRP1_DisableClockSleep()
539 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClock()  argument
542   SET_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_EnableClock()
544   tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_EnableClock()
570 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB2_GRP1_IsEnabledClock()  argument
572   return ((READ_BIT(RCC->AHB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_AHB2_GRP1_IsEnabledClock()
597 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClock()  argument
599   CLEAR_BIT(RCC->AHB2ENR, Periphs);  in LL_AHB2_GRP1_DisableClock()
625 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB2_GRP1_ForceReset()  argument
627   SET_BIT(RCC->AHB2RSTR, Periphs);  in LL_AHB2_GRP1_ForceReset()
653 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB2_GRP1_ReleaseReset()  argument
655   CLEAR_BIT(RCC->AHB2RSTR, Periphs);  in LL_AHB2_GRP1_ReleaseReset()
680 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClockSleep()  argument
683   SET_BIT(RCC->AHB2SMENR, Periphs);  in LL_AHB2_GRP1_EnableClockSleep()
685   tmpreg = READ_BIT(RCC->AHB2SMENR, Periphs);  in LL_AHB2_GRP1_EnableClockSleep()
711 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClockSleep()  argument
713   CLEAR_BIT(RCC->AHB2SMENR, Periphs);  in LL_AHB2_GRP1_DisableClockSleep()
744 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClock()  argument
747   SET_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
749   tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
773 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB3_GRP1_IsEnabledClock()  argument
775   return ((READ_BIT(RCC->AHB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_AHB3_GRP1_IsEnabledClock()
798 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClock()  argument
800   CLEAR_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_DisableClock()
824 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB3_GRP1_ForceReset()  argument
826   SET_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ForceReset()
850 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB3_GRP1_ReleaseReset()  argument
852   CLEAR_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ReleaseReset()
873 __STATIC_INLINE void LL_AHB3_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClockSleep()  argument
876   SET_BIT(RCC->AHB3SMENR, Periphs);  in LL_AHB3_GRP1_EnableClockSleep()
878   tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs);  in LL_AHB3_GRP1_EnableClockSleep()
900 __STATIC_INLINE void LL_AHB3_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClockSleep()  argument
902   CLEAR_BIT(RCC->AHB3SMENR, Periphs);  in LL_AHB3_GRP1_DisableClockSleep()
939 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)  in LL_APB1_GRP1_EnableClock()  argument
942   SET_BIT(RCC->APB1ENR1, Periphs);  in LL_APB1_GRP1_EnableClock()
944   tmpreg = READ_BIT(RCC->APB1ENR1, Periphs);  in LL_APB1_GRP1_EnableClock()
958 __STATIC_INLINE void LL_APB1_GRP2_EnableClock(uint32_t Periphs)  in LL_APB1_GRP2_EnableClock()  argument
961   SET_BIT(RCC->APB1ENR2, Periphs);  in LL_APB1_GRP2_EnableClock()
963   tmpreg = READ_BIT(RCC->APB1ENR2, Periphs);  in LL_APB1_GRP2_EnableClock()
993 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB1_GRP1_IsEnabledClock()  argument
995   return ((READ_BIT(RCC->APB1ENR1, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_APB1_GRP1_IsEnabledClock()
1008 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs)  in LL_APB1_GRP2_IsEnabledClock()  argument
1010   return ((READ_BIT(RCC->APB1ENR2, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_APB1_GRP2_IsEnabledClock()
1038 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)  in LL_APB1_GRP1_DisableClock()  argument
1040   CLEAR_BIT(RCC->APB1ENR1, Periphs);  in LL_APB1_GRP1_DisableClock()
1053 __STATIC_INLINE void LL_APB1_GRP2_DisableClock(uint32_t Periphs)  in LL_APB1_GRP2_DisableClock()  argument
1055   CLEAR_BIT(RCC->APB1ENR2, Periphs);  in LL_APB1_GRP2_DisableClock()
1081 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)  in LL_APB1_GRP1_ForceReset()  argument
1083   SET_BIT(RCC->APB1RSTR1, Periphs);  in LL_APB1_GRP1_ForceReset()
1097 __STATIC_INLINE void LL_APB1_GRP2_ForceReset(uint32_t Periphs)  in LL_APB1_GRP2_ForceReset()  argument
1099   SET_BIT(RCC->APB1RSTR2, Periphs);  in LL_APB1_GRP2_ForceReset()
1125 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB1_GRP1_ReleaseReset()  argument
1127   CLEAR_BIT(RCC->APB1RSTR1, Periphs);  in LL_APB1_GRP1_ReleaseReset()
1141 __STATIC_INLINE void LL_APB1_GRP2_ReleaseReset(uint32_t Periphs)  in LL_APB1_GRP2_ReleaseReset()  argument
1143   CLEAR_BIT(RCC->APB1RSTR2, Periphs);  in LL_APB1_GRP2_ReleaseReset()
1172 __STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_APB1_GRP1_EnableClockSleep()  argument
1175   SET_BIT(RCC->APB1SMENR1, Periphs);  in LL_APB1_GRP1_EnableClockSleep()
1177   tmpreg = READ_BIT(RCC->APB1SMENR1, Periphs);  in LL_APB1_GRP1_EnableClockSleep()
1191 __STATIC_INLINE void LL_APB1_GRP2_EnableClockSleep(uint32_t Periphs)  in LL_APB1_GRP2_EnableClockSleep()  argument
1194   SET_BIT(RCC->APB1SMENR2, Periphs);  in LL_APB1_GRP2_EnableClockSleep()
1196   tmpreg = READ_BIT(RCC->APB1SMENR2, Periphs);  in LL_APB1_GRP2_EnableClockSleep()
1226 __STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_APB1_GRP1_DisableClockSleep()  argument
1228   CLEAR_BIT(RCC->APB1SMENR1, Periphs);  in LL_APB1_GRP1_DisableClockSleep()
1241 __STATIC_INLINE void LL_APB1_GRP2_DisableClockSleep(uint32_t Periphs)  in LL_APB1_GRP2_DisableClockSleep()  argument
1243   CLEAR_BIT(RCC->APB1SMENR2, Periphs);  in LL_APB1_GRP2_DisableClockSleep()
1274 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)  in LL_APB2_GRP1_EnableClock()  argument
1277   SET_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
1279   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
1303 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB2_GRP1_IsEnabledClock()  argument
1305   return ((READ_BIT(RCC->APB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_APB2_GRP1_IsEnabledClock()
1328 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)  in LL_APB2_GRP1_DisableClock()  argument
1330   CLEAR_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_DisableClock()
1354 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)  in LL_APB2_GRP1_ForceReset()  argument
1356   SET_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ForceReset()
1380 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB2_GRP1_ReleaseReset()  argument
1382   CLEAR_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ReleaseReset()
1405 __STATIC_INLINE void LL_APB2_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_APB2_GRP1_EnableClockSleep()  argument
1408   SET_BIT(RCC->APB2SMENR, Periphs);  in LL_APB2_GRP1_EnableClockSleep()
1410   tmpreg = READ_BIT(RCC->APB2SMENR, Periphs);  in LL_APB2_GRP1_EnableClockSleep()
1434 __STATIC_INLINE void LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_APB2_GRP1_DisableClockSleep()  argument
1436   CLEAR_BIT(RCC->APB2SMENR, Periphs);  in LL_APB2_GRP1_DisableClockSleep()
1454 __STATIC_INLINE void LL_APB3_GRP1_ForceReset(uint32_t Periphs)  in LL_APB3_GRP1_ForceReset()  argument
1456   SET_BIT(RCC->APB3RSTR, Periphs);  in LL_APB3_GRP1_ForceReset()
1466 __STATIC_INLINE void LL_APB3_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB3_GRP1_ReleaseReset()  argument
1468   CLEAR_BIT(RCC->APB3RSTR, Periphs);  in LL_APB3_GRP1_ReleaseReset()
1497 __STATIC_INLINE void LL_C2_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_C2_AHB1_GRP1_EnableClock()  argument
1500   SET_BIT(RCC->C2AHB1ENR, Periphs);  in LL_C2_AHB1_GRP1_EnableClock()
1502   tmpreg = READ_BIT(RCC->C2AHB1ENR, Periphs);  in LL_C2_AHB1_GRP1_EnableClock()
1525 __STATIC_INLINE uint32_t LL_C2_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_C2_AHB1_GRP1_IsEnabledClock()  argument
1527   return ((READ_BIT(RCC->C2AHB1ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_C2_AHB1_GRP1_IsEnabledClock()
1549 __STATIC_INLINE void LL_C2_AHB1_GRP1_DisableClock(uint32_t Periphs)  in LL_C2_AHB1_GRP1_DisableClock()  argument
1551   CLEAR_BIT(RCC->C2AHB1ENR, Periphs);  in LL_C2_AHB1_GRP1_DisableClock()
1573 __STATIC_INLINE void LL_C2_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_C2_AHB1_GRP1_EnableClockSleep()  argument
1576   SET_BIT(RCC->C2AHB1SMENR, Periphs);  in LL_C2_AHB1_GRP1_EnableClockSleep()
1578   tmpreg = READ_BIT(RCC->C2AHB1SMENR, Periphs);  in LL_C2_AHB1_GRP1_EnableClockSleep()
1601 __STATIC_INLINE void LL_C2_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_C2_AHB1_GRP1_DisableClockSleep()  argument
1603   CLEAR_BIT(RCC->C2AHB1SMENR, Periphs);  in LL_C2_AHB1_GRP1_DisableClockSleep()
1636 __STATIC_INLINE void LL_C2_AHB2_GRP1_EnableClock(uint32_t Periphs)  in LL_C2_AHB2_GRP1_EnableClock()  argument
1639   SET_BIT(RCC->C2AHB2ENR, Periphs);  in LL_C2_AHB2_GRP1_EnableClock()
1641   tmpreg = READ_BIT(RCC->C2AHB2ENR, Periphs);  in LL_C2_AHB2_GRP1_EnableClock()
1667 __STATIC_INLINE uint32_t LL_C2_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_C2_AHB2_GRP1_IsEnabledClock()  argument
1669   return ((READ_BIT(RCC->C2AHB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_C2_AHB2_GRP1_IsEnabledClock()
1694 __STATIC_INLINE void LL_C2_AHB2_GRP1_DisableClock(uint32_t Periphs)  in LL_C2_AHB2_GRP1_DisableClock()  argument
1696   CLEAR_BIT(RCC->C2AHB2ENR, Periphs);  in LL_C2_AHB2_GRP1_DisableClock()
1721 __STATIC_INLINE void LL_C2_AHB2_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_C2_AHB2_GRP1_EnableClockSleep()  argument
1724   SET_BIT(RCC->C2AHB2SMENR, Periphs);  in LL_C2_AHB2_GRP1_EnableClockSleep()
1726   tmpreg = READ_BIT(RCC->C2AHB2SMENR, Periphs);  in LL_C2_AHB2_GRP1_EnableClockSleep()
1752 __STATIC_INLINE void LL_C2_AHB2_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_C2_AHB2_GRP1_DisableClockSleep()  argument
1754   CLEAR_BIT(RCC->C2AHB2SMENR, Periphs);  in LL_C2_AHB2_GRP1_DisableClockSleep()
1782 __STATIC_INLINE void LL_C2_AHB3_GRP1_EnableClock(uint32_t Periphs)  in LL_C2_AHB3_GRP1_EnableClock()  argument
1785   SET_BIT(RCC->C2AHB3ENR, Periphs);  in LL_C2_AHB3_GRP1_EnableClock()
1787   tmpreg = READ_BIT(RCC->C2AHB3ENR, Periphs);  in LL_C2_AHB3_GRP1_EnableClock()
1808 __STATIC_INLINE uint32_t LL_C2_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_C2_AHB3_GRP1_IsEnabledClock()  argument
1810   return ((READ_BIT(RCC->C2AHB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_C2_AHB3_GRP1_IsEnabledClock()
1830 __STATIC_INLINE void LL_C2_AHB3_GRP1_DisableClock(uint32_t Periphs)  in LL_C2_AHB3_GRP1_DisableClock()  argument
1832   CLEAR_BIT(RCC->C2AHB3ENR, Periphs);  in LL_C2_AHB3_GRP1_DisableClock()
1850 __STATIC_INLINE void LL_C2_AHB3_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_C2_AHB3_GRP1_EnableClockSleep()  argument
1853   SET_BIT(RCC->C2AHB3SMENR, Periphs);  in LL_C2_AHB3_GRP1_EnableClockSleep()
1855   tmpreg = READ_BIT(RCC->C2AHB3SMENR, Periphs);  in LL_C2_AHB3_GRP1_EnableClockSleep()
1874 __STATIC_INLINE void LL_C2_AHB3_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_C2_AHB3_GRP1_DisableClockSleep()  argument
1876   CLEAR_BIT(RCC->C2AHB3SMENR, Periphs);  in LL_C2_AHB3_GRP1_DisableClockSleep()
1911 __STATIC_INLINE void LL_C2_APB1_GRP1_EnableClock(uint32_t Periphs)  in LL_C2_APB1_GRP1_EnableClock()  argument
1914   SET_BIT(RCC->C2APB1ENR1, Periphs);  in LL_C2_APB1_GRP1_EnableClock()
1916   tmpreg = READ_BIT(RCC->C2APB1ENR1, Periphs);  in LL_C2_APB1_GRP1_EnableClock()
1930 __STATIC_INLINE void LL_C2_APB1_GRP2_EnableClock(uint32_t Periphs)  in LL_C2_APB1_GRP2_EnableClock()  argument
1933   SET_BIT(RCC->C2APB1ENR2, Periphs);  in LL_C2_APB1_GRP2_EnableClock()
1935   tmpreg = READ_BIT(RCC->C2APB1ENR2, Periphs);  in LL_C2_APB1_GRP2_EnableClock()
1963 __STATIC_INLINE uint32_t LL_C2_APB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_C2_APB1_GRP1_IsEnabledClock()  argument
1965   return ((READ_BIT(RCC->C2APB1ENR1, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_C2_APB1_GRP1_IsEnabledClock()
1978 __STATIC_INLINE uint32_t LL_C2_APB1_GRP2_IsEnabledClock(uint32_t Periphs)  in LL_C2_APB1_GRP2_IsEnabledClock()  argument
1980   return ((READ_BIT(RCC->C2APB1ENR2, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_C2_APB1_GRP2_IsEnabledClock()
2007 __STATIC_INLINE void LL_C2_APB1_GRP1_DisableClock(uint32_t Periphs)  in LL_C2_APB1_GRP1_DisableClock()  argument
2009   CLEAR_BIT(RCC->C2APB1ENR1, Periphs);  in LL_C2_APB1_GRP1_DisableClock()
2022 __STATIC_INLINE void LL_C2_APB1_GRP2_DisableClock(uint32_t Periphs)  in LL_C2_APB1_GRP2_DisableClock()  argument
2024   CLEAR_BIT(RCC->C2APB1ENR2, Periphs);  in LL_C2_APB1_GRP2_DisableClock()
2051 __STATIC_INLINE void LL_C2_APB1_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_C2_APB1_GRP1_EnableClockSleep()  argument
2054   SET_BIT(RCC->C2APB1SMENR1, Periphs);  in LL_C2_APB1_GRP1_EnableClockSleep()
2056   tmpreg = READ_BIT(RCC->C2APB1SMENR1, Periphs);  in LL_C2_APB1_GRP1_EnableClockSleep()
2070 __STATIC_INLINE void LL_C2_APB1_GRP2_EnableClockSleep(uint32_t Periphs)  in LL_C2_APB1_GRP2_EnableClockSleep()  argument
2073   SET_BIT(RCC->C2APB1SMENR2, Periphs);  in LL_C2_APB1_GRP2_EnableClockSleep()
2075   tmpreg = READ_BIT(RCC->C2APB1SMENR2, Periphs);  in LL_C2_APB1_GRP2_EnableClockSleep()
2103 __STATIC_INLINE void LL_C2_APB1_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_C2_APB1_GRP1_DisableClockSleep()  argument
2105   CLEAR_BIT(RCC->C2APB1SMENR1, Periphs);  in LL_C2_APB1_GRP1_DisableClockSleep()
2118 __STATIC_INLINE void LL_C2_APB1_GRP2_DisableClockSleep(uint32_t Periphs)  in LL_C2_APB1_GRP2_DisableClockSleep()  argument
2120   CLEAR_BIT(RCC->C2APB1SMENR2, Periphs);  in LL_C2_APB1_GRP2_DisableClockSleep()
2151 __STATIC_INLINE void LL_C2_APB2_GRP1_EnableClock(uint32_t Periphs)  in LL_C2_APB2_GRP1_EnableClock()  argument
2154   SET_BIT(RCC->C2APB2ENR, Periphs);  in LL_C2_APB2_GRP1_EnableClock()
2156   tmpreg = READ_BIT(RCC->C2APB2ENR, Periphs);  in LL_C2_APB2_GRP1_EnableClock()
2180 __STATIC_INLINE uint32_t LL_C2_APB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_C2_APB2_GRP1_IsEnabledClock()  argument
2182   return ((READ_BIT(RCC->C2APB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_C2_APB2_GRP1_IsEnabledClock()
2205 __STATIC_INLINE void LL_C2_APB2_GRP1_DisableClock(uint32_t Periphs)  in LL_C2_APB2_GRP1_DisableClock()  argument
2207   CLEAR_BIT(RCC->C2APB2ENR, Periphs);  in LL_C2_APB2_GRP1_DisableClock()
2230 __STATIC_INLINE void LL_C2_APB2_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_C2_APB2_GRP1_EnableClockSleep()  argument
2233   SET_BIT(RCC->C2APB2SMENR, Periphs);  in LL_C2_APB2_GRP1_EnableClockSleep()
2235   tmpreg = READ_BIT(RCC->C2APB2SMENR, Periphs);  in LL_C2_APB2_GRP1_EnableClockSleep()
2259 __STATIC_INLINE void LL_C2_APB2_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_C2_APB2_GRP1_DisableClockSleep()  argument
2261   CLEAR_BIT(RCC->C2APB2SMENR, Periphs);  in LL_C2_APB2_GRP1_DisableClockSleep()
2282 __STATIC_INLINE void LL_C2_APB3_GRP1_EnableClock(uint32_t Periphs)  in LL_C2_APB3_GRP1_EnableClock()  argument
2285   SET_BIT(RCC->C2APB3ENR, Periphs);  in LL_C2_APB3_GRP1_EnableClock()
2287   tmpreg = READ_BIT(RCC->C2APB3ENR, Periphs);  in LL_C2_APB3_GRP1_EnableClock()
2301 __STATIC_INLINE uint32_t LL_C2_APB3_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_C2_APB3_GRP1_IsEnabledClock()  argument
2303   return ((READ_BIT(RCC->C2APB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL);  in LL_C2_APB3_GRP1_IsEnabledClock()
2316 __STATIC_INLINE void LL_C2_APB3_GRP1_DisableClock(uint32_t Periphs)  in LL_C2_APB3_GRP1_DisableClock()  argument
2318   CLEAR_BIT(RCC->C2APB3ENR, Periphs);  in LL_C2_APB3_GRP1_DisableClock()
2331 __STATIC_INLINE void LL_C2_APB3_GRP1_EnableClockSleep(uint32_t Periphs)  in LL_C2_APB3_GRP1_EnableClockSleep()  argument
2334   SET_BIT(RCC->C2APB3SMENR, Periphs);  in LL_C2_APB3_GRP1_EnableClockSleep()
2336   tmpreg = READ_BIT(RCC->C2APB3SMENR, Periphs);  in LL_C2_APB3_GRP1_EnableClockSleep()
2350 __STATIC_INLINE void LL_C2_APB3_GRP1_DisableClockSleep(uint32_t Periphs)  in LL_C2_APB3_GRP1_DisableClockSleep()  argument
2352   CLEAR_BIT(RCC->C2APB3SMENR, Periphs);  in LL_C2_APB3_GRP1_DisableClockSleep()