425 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClock()  argument
428   SET_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
430   tmpreg = READ_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_EnableClock()
476 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB1_GRP1_IsEnabledClock()  argument
478   return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB1_GRP1_IsEnabledClock()
534 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClock()  argument
536   CLEAR_BIT(RCC->AHB1ENR, Periphs);  in LL_AHB1_GRP1_DisableClock()
570 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB1_GRP1_ForceReset()  argument
572   SET_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ForceReset()
607 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB1_GRP1_ReleaseReset()  argument
609   CLEAR_BIT(RCC->AHB1RSTR, Periphs);  in LL_AHB1_GRP1_ReleaseReset()
656 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockStopSleep(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClockStopSleep()  argument
659   SET_BIT(RCC->AHB1SMENR, Periphs);  in LL_AHB1_GRP1_EnableClockStopSleep()
661   tmpreg = READ_BIT(RCC->AHB1SMENR, Periphs);  in LL_AHB1_GRP1_EnableClockStopSleep()
709 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_AHB1_GRP1_IsEnabledClockStopSleep()  argument
711   return ((READ_BIT(RCC->AHB1SMENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB1_GRP1_IsEnabledClockStopSleep()
758 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockStopSleep(uint32_t Periphs)  in LL_AHB1_GRP1_DisableClockStopSleep()  argument
760   CLEAR_BIT(RCC->AHB1SMENR, Periphs);  in LL_AHB1_GRP1_DisableClockStopSleep()
845 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClock()  argument
848   SET_BIT(RCC->AHB2ENR1, Periphs);  in LL_AHB2_GRP1_EnableClock()
850   tmpreg = READ_BIT(RCC->AHB2ENR1, Periphs);  in LL_AHB2_GRP1_EnableClock()
915 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB2_GRP1_IsEnabledClock()  argument
917   return ((READ_BIT(RCC->AHB2ENR1, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB2_GRP1_IsEnabledClock()
992 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClock()  argument
994   CLEAR_BIT(RCC->AHB2ENR1, Periphs);  in LL_AHB2_GRP1_DisableClock()
1054 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB2_GRP1_ForceReset()  argument
1056   SET_BIT(RCC->AHB2RSTR1, Periphs);  in LL_AHB2_GRP1_ForceReset()
1116 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB2_GRP1_ReleaseReset()  argument
1118   CLEAR_BIT(RCC->AHB2RSTR1, Periphs);  in LL_AHB2_GRP1_ReleaseReset()
1182 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockStopSleep(uint32_t Periphs)  in LL_AHB2_GRP1_EnableClockStopSleep()  argument
1185   SET_BIT(RCC->AHB2SMENR1, Periphs);  in LL_AHB2_GRP1_EnableClockStopSleep()
1187   tmpreg = READ_BIT(RCC->AHB2SMENR1, Periphs);  in LL_AHB2_GRP1_EnableClockStopSleep()
1252 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_AHB2_GRP1_IsEnabledClockStopSleep()  argument
1254   return ((READ_BIT(RCC->AHB2SMENR1, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB2_GRP1_IsEnabledClockStopSleep()
1318 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockStopSleep(uint32_t Periphs)  in LL_AHB2_GRP1_DisableClockStopSleep()  argument
1320   CLEAR_BIT(RCC->AHB2SMENR1, Periphs);  in LL_AHB2_GRP1_DisableClockStopSleep()
1366 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClock()  argument
1369   SET_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
1371   tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_EnableClock()
1397 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_AHB3_GRP1_IsEnabledClock()  argument
1399   return ((READ_BIT(RCC->AHB3ENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB3_GRP1_IsEnabledClock()
1434 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClock()  argument
1436   CLEAR_BIT(RCC->AHB3ENR, Periphs);  in LL_AHB3_GRP1_DisableClock()
1459 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs)  in LL_AHB3_GRP1_ForceReset()  argument
1461   SET_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ForceReset()
1484 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)  in LL_AHB3_GRP1_ReleaseReset()  argument
1486   CLEAR_BIT(RCC->AHB3RSTR, Periphs);  in LL_AHB3_GRP1_ReleaseReset()
1511 __STATIC_INLINE void LL_AHB3_GRP1_EnableClockStopSleep(uint32_t Periphs)  in LL_AHB3_GRP1_EnableClockStopSleep()  argument
1514   SET_BIT(RCC->AHB3SMENR, Periphs);  in LL_AHB3_GRP1_EnableClockStopSleep()
1516   tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs);  in LL_AHB3_GRP1_EnableClockStopSleep()
1542 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_AHB3_GRP1_IsEnabledClockStopSleep()  argument
1544   return ((READ_BIT(RCC->AHB3SMENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB3_GRP1_IsEnabledClockStopSleep()
1569 __STATIC_INLINE void LL_AHB3_GRP1_DisableClockStopSleep(uint32_t Periphs)  in LL_AHB3_GRP1_DisableClockStopSleep()  argument
1571   CLEAR_BIT(RCC->AHB3SMENR, Periphs);  in LL_AHB3_GRP1_DisableClockStopSleep()
1616 __STATIC_INLINE void LL_AHB2_GRP2_EnableClock(uint32_t Periphs)  in LL_AHB2_GRP2_EnableClock()  argument
1619   SET_BIT(RCC->AHB2ENR2, Periphs);  in LL_AHB2_GRP2_EnableClock()
1621   tmpreg = READ_BIT(RCC->AHB2ENR2, Periphs);  in LL_AHB2_GRP2_EnableClock()
1646 __STATIC_INLINE uint32_t LL_AHB2_GRP2_IsEnabledClock(uint32_t Periphs)  in LL_AHB2_GRP2_IsEnabledClock()  argument
1648   return ((READ_BIT(RCC->AHB2ENR2, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB2_GRP2_IsEnabledClock()
1681 __STATIC_INLINE void LL_AHB2_GRP2_DisableClock(uint32_t Periphs)  in LL_AHB2_GRP2_DisableClock()  argument
1683   CLEAR_BIT(RCC->AHB2ENR2, Periphs);  in LL_AHB2_GRP2_DisableClock()
1702 __STATIC_INLINE void LL_AHB2_GRP2_ForceReset(uint32_t Periphs)  in LL_AHB2_GRP2_ForceReset()  argument
1704   SET_BIT(RCC->AHB2RSTR2, Periphs);  in LL_AHB2_GRP2_ForceReset()
1723 __STATIC_INLINE void LL_AHB2_GRP2_ReleaseReset(uint32_t Periphs)  in LL_AHB2_GRP2_ReleaseReset()  argument
1725   CLEAR_BIT(RCC->AHB2RSTR2, Periphs);  in LL_AHB2_GRP2_ReleaseReset()
1748 __STATIC_INLINE void LL_AHB2_GRP2_EnableClockStopSleep(uint32_t Periphs)  in LL_AHB2_GRP2_EnableClockStopSleep()  argument
1751   SET_BIT(RCC->AHB2SMENR2, Periphs);  in LL_AHB2_GRP2_EnableClockStopSleep()
1753   tmpreg = READ_BIT(RCC->AHB2SMENR2, Periphs);  in LL_AHB2_GRP2_EnableClockStopSleep()
1777 __STATIC_INLINE uint32_t LL_AHB2_GRP2_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_AHB2_GRP2_IsEnabledClockStopSleep()  argument
1779   return ((READ_BIT(RCC->AHB2SMENR2, Periphs) == Periphs) ? 1UL : 0UL);  in LL_AHB2_GRP2_IsEnabledClockStopSleep()
1802 __STATIC_INLINE void LL_AHB2_GRP2_DisableClockStopSleep(uint32_t Periphs)  in LL_AHB2_GRP2_DisableClockStopSleep()  argument
1804   CLEAR_BIT(RCC->AHB2SMENR2, Periphs);  in LL_AHB2_GRP2_DisableClockStopSleep()
1868 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)  in LL_APB1_GRP1_EnableClock()  argument
1871   SET_BIT(RCC->APB1ENR1, Periphs);  in LL_APB1_GRP1_EnableClock()
1873   tmpreg = READ_BIT(RCC->APB1ENR1, Periphs);  in LL_APB1_GRP1_EnableClock()
1895 __STATIC_INLINE void LL_APB1_GRP2_EnableClock(uint32_t Periphs)  in LL_APB1_GRP2_EnableClock()  argument
1898   SET_BIT(RCC->APB1ENR2, Periphs);  in LL_APB1_GRP2_EnableClock()
1900   tmpreg = READ_BIT(RCC->APB1ENR2, Periphs);  in LL_APB1_GRP2_EnableClock()
1944 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB1_GRP1_IsEnabledClock()  argument
1946   return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB1_GRP1_IsEnabledClock()
1967 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs)  in LL_APB1_GRP2_IsEnabledClock()  argument
1969   return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB1_GRP2_IsEnabledClock()
2023 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)  in LL_APB1_GRP1_DisableClock()  argument
2025   CLEAR_BIT(RCC->APB1ENR1, Periphs);  in LL_APB1_GRP1_DisableClock()
2046 __STATIC_INLINE void LL_APB1_GRP2_DisableClock(uint32_t Periphs)  in LL_APB1_GRP2_DisableClock()  argument
2048   CLEAR_BIT(RCC->APB1ENR2, Periphs);  in LL_APB1_GRP2_DisableClock()
2089 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)  in LL_APB1_GRP1_ForceReset()  argument
2091   SET_BIT(RCC->APB1RSTR1, Periphs);  in LL_APB1_GRP1_ForceReset()
2114 __STATIC_INLINE void LL_APB1_GRP2_ForceReset(uint32_t Periphs)  in LL_APB1_GRP2_ForceReset()  argument
2116   SET_BIT(RCC->APB1RSTR2, Periphs);  in LL_APB1_GRP2_ForceReset()
2157 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB1_GRP1_ReleaseReset()  argument
2159   CLEAR_BIT(RCC->APB1RSTR1, Periphs);  in LL_APB1_GRP1_ReleaseReset()
2182 __STATIC_INLINE void LL_APB1_GRP2_ReleaseReset(uint32_t Periphs)  in LL_APB1_GRP2_ReleaseReset()  argument
2184   CLEAR_BIT(RCC->APB1RSTR2, Periphs);  in LL_APB1_GRP2_ReleaseReset()
2225 __STATIC_INLINE void LL_APB1_GRP1_EnableClockStopSleep(uint32_t Periphs)  in LL_APB1_GRP1_EnableClockStopSleep()  argument
2228   SET_BIT(RCC->APB1SMENR1, Periphs);  in LL_APB1_GRP1_EnableClockStopSleep()
2230   tmpreg = READ_BIT(RCC->APB1SMENR1, Periphs);  in LL_APB1_GRP1_EnableClockStopSleep()
2272 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_APB1_GRP1_IsEnabledClockStopSleep()  argument
2274   return ((READ_BIT(RCC->APB1SMENR1, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB1_GRP1_IsEnabledClockStopSleep()
2315 __STATIC_INLINE void LL_APB1_GRP1_DisableClockStopSleep(uint32_t Periphs)  in LL_APB1_GRP1_DisableClockStopSleep()  argument
2317   CLEAR_BIT(RCC->APB1SMENR1, Periphs);  in LL_APB1_GRP1_DisableClockStopSleep()
2340 __STATIC_INLINE void LL_APB1_GRP2_EnableClockStopSleep(uint32_t Periphs)  in LL_APB1_GRP2_EnableClockStopSleep()  argument
2343   SET_BIT(RCC->APB1SMENR2, Periphs);  in LL_APB1_GRP2_EnableClockStopSleep()
2345   tmpreg = READ_BIT(RCC->APB1SMENR2, Periphs);  in LL_APB1_GRP2_EnableClockStopSleep()
2369 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_APB1_GRP2_IsEnabledClockStopSleep()  argument
2371   return ((READ_BIT(RCC->APB1SMENR2, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB1_GRP2_IsEnabledClockStopSleep()
2394 __STATIC_INLINE void LL_APB1_GRP2_DisableClockStopSleep(uint32_t Periphs)  in LL_APB1_GRP2_DisableClockStopSleep()  argument
2396   CLEAR_BIT(RCC->APB1SMENR2, Periphs);  in LL_APB1_GRP2_DisableClockStopSleep()
2454 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)  in LL_APB2_GRP1_EnableClock()  argument
2457   SET_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
2459   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_EnableClock()
2497 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB2_GRP1_IsEnabledClock()  argument
2499   return ((READ_BIT(RCC->APB2ENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB2_GRP1_IsEnabledClock()
2546 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)  in LL_APB2_GRP1_DisableClock()  argument
2548   CLEAR_BIT(RCC->APB2ENR, Periphs);  in LL_APB2_GRP1_DisableClock()
2586 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)  in LL_APB2_GRP1_ForceReset()  argument
2588   SET_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ForceReset()
2626 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB2_GRP1_ReleaseReset()  argument
2628   CLEAR_BIT(RCC->APB2RSTR, Periphs);  in LL_APB2_GRP1_ReleaseReset()
2667 __STATIC_INLINE void LL_APB2_GRP1_EnableClockStopSleep(uint32_t Periphs)  in LL_APB2_GRP1_EnableClockStopSleep()  argument
2670   SET_BIT(RCC->APB2SMENR, Periphs);  in LL_APB2_GRP1_EnableClockStopSleep()
2672   tmpreg = READ_BIT(RCC->APB2SMENR, Periphs);  in LL_APB2_GRP1_EnableClockStopSleep()
2711 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_APB2_GRP1_IsEnabledClockStopSleep()  argument
2713   return ((READ_BIT(RCC->APB2SMENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB2_GRP1_IsEnabledClockStopSleep()
2750 __STATIC_INLINE void LL_APB2_GRP1_DisableClockStopSleep(uint32_t Periphs)  in LL_APB2_GRP1_DisableClockStopSleep()  argument
2752   CLEAR_BIT(RCC->APB2SMENR, Periphs);  in LL_APB2_GRP1_DisableClockStopSleep()
2805 __STATIC_INLINE void LL_APB3_GRP1_EnableClock(uint32_t Periphs)  in LL_APB3_GRP1_EnableClock()  argument
2808   SET_BIT(RCC->APB3ENR, Periphs);  in LL_APB3_GRP1_EnableClock()
2810   tmpreg = READ_BIT(RCC->APB3ENR, Periphs);  in LL_APB3_GRP1_EnableClock()
2842 __STATIC_INLINE uint32_t LL_APB3_GRP1_IsEnabledClock(uint32_t Periphs)  in LL_APB3_GRP1_IsEnabledClock()  argument
2844   return ((READ_BIT(RCC->APB3ENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB3_GRP1_IsEnabledClock()
2885 __STATIC_INLINE void LL_APB3_GRP1_DisableClock(uint32_t Periphs)  in LL_APB3_GRP1_DisableClock()  argument
2887   CLEAR_BIT(RCC->APB3ENR, Periphs);  in LL_APB3_GRP1_DisableClock()
2918 __STATIC_INLINE void LL_APB3_GRP1_ForceReset(uint32_t Periphs)  in LL_APB3_GRP1_ForceReset()  argument
2920   SET_BIT(RCC->APB3RSTR, Periphs);  in LL_APB3_GRP1_ForceReset()
2951 __STATIC_INLINE void LL_APB3_GRP1_ReleaseReset(uint32_t Periphs)  in LL_APB3_GRP1_ReleaseReset()  argument
2953   CLEAR_BIT(RCC->APB3RSTR, Periphs);  in LL_APB3_GRP1_ReleaseReset()
2984 __STATIC_INLINE void LL_APB3_GRP1_EnableClockStopSleep(uint32_t Periphs)  in LL_APB3_GRP1_EnableClockStopSleep()  argument
2987   SET_BIT(RCC->APB3SMENR, Periphs);  in LL_APB3_GRP1_EnableClockStopSleep()
2989   tmpreg = READ_BIT(RCC->APB3SMENR, Periphs);  in LL_APB3_GRP1_EnableClockStopSleep()
3022 __STATIC_INLINE uint32_t LL_APB3_GRP1_IsEnabledClockStopSleep(uint32_t Periphs)  in LL_APB3_GRP1_IsEnabledClockStopSleep()  argument
3024   return ((READ_BIT(RCC->APB3SMENR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_APB3_GRP1_IsEnabledClockStopSleep()
3055 __STATIC_INLINE void LL_APB3_GRP1_DisableClockStopSleep(uint32_t Periphs)  in LL_APB3_GRP1_DisableClockStopSleep()  argument
3057   CLEAR_BIT(RCC->APB3SMENR, Periphs);  in LL_APB3_GRP1_DisableClockStopSleep()
3107 __STATIC_INLINE void LL_SRDAMR_GRP1_EnableAutonomousClock(uint32_t Periphs)  in LL_SRDAMR_GRP1_EnableAutonomousClock()  argument
3110   SET_BIT(RCC->SRDAMR, Periphs);  in LL_SRDAMR_GRP1_EnableAutonomousClock()
3112   tmpreg = READ_BIT(RCC->SRDAMR, Periphs);  in LL_SRDAMR_GRP1_EnableAutonomousClock()
3155 __STATIC_INLINE uint32_t LL_SRDAMR_GRP1_IsEnabledAutonomousClock(uint32_t Periphs)  in LL_SRDAMR_GRP1_IsEnabledAutonomousClock()  argument
3157   return ((READ_BIT(RCC->SRDAMR, Periphs) == Periphs) ? 1UL : 0UL);  in LL_SRDAMR_GRP1_IsEnabledAutonomousClock()
3199 __STATIC_INLINE void LL_SRDAMR_GRP1_DisableAutonomousClock(uint32_t Periphs)  in LL_SRDAMR_GRP1_DisableAutonomousClock()  argument
3201   CLEAR_BIT(RCC->SRDAMR, Periphs);  in LL_SRDAMR_GRP1_DisableAutonomousClock()