Lines Matching refs:Periphs

222 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClock()  argument
225 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
227 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
250 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
252 return ((READ_BIT(RCC->AHBENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
274 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
276 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
299 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
301 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
324 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
326 CLEAR_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ReleaseReset()
350 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_EnableClockSleep() argument
353 SET_BIT(RCC->AHBSMENR, Periphs); in LL_AHB1_GRP1_EnableClockSleep()
355 tmpreg = READ_BIT(RCC->AHBSMENR, Periphs); in LL_AHB1_GRP1_EnableClockSleep()
380 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_AHB1_GRP1_DisableClockSleep() argument
382 CLEAR_BIT(RCC->AHBSMENR, Periphs); in LL_AHB1_GRP1_DisableClockSleep()
438 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) in LL_APB1_GRP1_EnableClock() argument
441 SET_BIT(RCC->APB1ENR, Periphs); in LL_APB1_GRP1_EnableClock()
443 tmpreg = READ_BIT(RCC->APB1ENR, Periphs); in LL_APB1_GRP1_EnableClock()
492 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClock() argument
494 return ((READ_BIT(RCC->APB1ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
542 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) in LL_APB1_GRP1_DisableClock() argument
544 CLEAR_BIT(RCC->APB1ENR, Periphs); in LL_APB1_GRP1_DisableClock()
593 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) in LL_APB1_GRP1_ForceReset() argument
595 SET_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ForceReset()
644 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP1_ReleaseReset() argument
646 CLEAR_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ReleaseReset()
694 __STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB1_GRP1_EnableClockSleep() argument
697 SET_BIT(RCC->APB1SMENR, Periphs); in LL_APB1_GRP1_EnableClockSleep()
699 tmpreg = READ_BIT(RCC->APB1SMENR, Periphs); in LL_APB1_GRP1_EnableClockSleep()
748 __STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB1_GRP1_DisableClockSleep() argument
750 CLEAR_BIT(RCC->APB1SMENR, Periphs); in LL_APB1_GRP1_DisableClockSleep()
784 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) in LL_APB2_GRP1_EnableClock() argument
787 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
789 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
816 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClock() argument
818 return ((READ_BIT(RCC->APB2ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClock()
844 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) in LL_APB2_GRP1_DisableClock() argument
846 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
871 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) in LL_APB2_GRP1_ForceReset() argument
873 SET_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ForceReset()
898 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB2_GRP1_ReleaseReset() argument
900 CLEAR_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ReleaseReset()
924 __STATIC_INLINE void LL_APB2_GRP1_EnableClockSleep(uint32_t Periphs) in LL_APB2_GRP1_EnableClockSleep() argument
927 SET_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockSleep()
929 tmpreg = READ_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockSleep()
954 __STATIC_INLINE void LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs) in LL_APB2_GRP1_DisableClockSleep() argument
956 CLEAR_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_DisableClockSleep()
985 __STATIC_INLINE void LL_IOP_GRP1_EnableClock(uint32_t Periphs) in LL_IOP_GRP1_EnableClock() argument
988 SET_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
990 tmpreg = READ_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
1013 __STATIC_INLINE uint32_t LL_IOP_GRP1_IsEnabledClock(uint32_t Periphs) in LL_IOP_GRP1_IsEnabledClock() argument
1015 return ((READ_BIT(RCC->IOPENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_IOP_GRP1_IsEnabledClock()
1037 __STATIC_INLINE void LL_IOP_GRP1_DisableClock(uint32_t Periphs) in LL_IOP_GRP1_DisableClock() argument
1039 CLEAR_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_DisableClock()
1062 __STATIC_INLINE void LL_IOP_GRP1_ForceReset(uint32_t Periphs) in LL_IOP_GRP1_ForceReset() argument
1064 SET_BIT(RCC->IOPRSTR, Periphs); in LL_IOP_GRP1_ForceReset()
1087 __STATIC_INLINE void LL_IOP_GRP1_ReleaseReset(uint32_t Periphs) in LL_IOP_GRP1_ReleaseReset() argument
1089 CLEAR_BIT(RCC->IOPRSTR, Periphs); in LL_IOP_GRP1_ReleaseReset()
1111 __STATIC_INLINE void LL_IOP_GRP1_EnableClockSleep(uint32_t Periphs) in LL_IOP_GRP1_EnableClockSleep() argument
1114 SET_BIT(RCC->IOPSMENR, Periphs); in LL_IOP_GRP1_EnableClockSleep()
1116 tmpreg = READ_BIT(RCC->IOPSMENR, Periphs); in LL_IOP_GRP1_EnableClockSleep()
1139 __STATIC_INLINE void LL_IOP_GRP1_DisableClockSleep(uint32_t Periphs) in LL_IOP_GRP1_DisableClockSleep() argument
1141 CLEAR_BIT(RCC->IOPSMENR, Periphs); in LL_IOP_GRP1_DisableClockSleep()