Lines Matching refs:Periphs

234 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)  in LL_AHB1_GRP1_EnableClock()  argument
237 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
239 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
265 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
267 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
292 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
294 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
312 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
314 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
332 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
334 CLEAR_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ReleaseReset()
360 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_AHB1_GRP1_EnableClockStopSleep() argument
363 SET_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_EnableClockStopSleep()
365 tmpreg = READ_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_EnableClockStopSleep()
392 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClockStopSleep(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClockStopSleep() argument
394 return ((READ_BIT(RCC->AHB1SMENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClockStopSleep()
420 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_AHB1_GRP1_DisableClockStopSleep() argument
422 CLEAR_BIT(RCC->AHB1SMENR, Periphs); in LL_AHB1_GRP1_DisableClockStopSleep()
462 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) in LL_AHB2_GRP1_EnableClock() argument
465 SET_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
467 tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
501 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClock() argument
503 return ((READ_BIT(RCC->AHB2ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClock()
536 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) in LL_AHB2_GRP1_DisableClock() argument
538 CLEAR_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_DisableClock()
569 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) in LL_AHB2_GRP1_ForceReset() argument
571 SET_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ForceReset()
603 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB2_GRP1_ReleaseReset() argument
605 CLEAR_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ReleaseReset()
635 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_AHB2_GRP1_EnableClockStopSleep() argument
638 SET_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_EnableClockStopSleep()
640 tmpreg = READ_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_EnableClockStopSleep()
671 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClockStopSleep(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClockStopSleep() argument
673 return ((READ_BIT(RCC->AHB2SMENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClockStopSleep()
703 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_AHB2_GRP1_DisableClockStopSleep() argument
705 CLEAR_BIT(RCC->AHB2SMENR, Periphs); in LL_AHB2_GRP1_DisableClockStopSleep()
725 __STATIC_INLINE void LL_AHB4_GRP1_EnableClock(uint32_t Periphs) in LL_AHB4_GRP1_EnableClock() argument
728 SET_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
730 tmpreg = READ_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
744 __STATIC_INLINE uint32_t LL_AHB4_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB4_GRP1_IsEnabledClock() argument
746 return ((READ_BIT(RCC->AHB4ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB4_GRP1_IsEnabledClock()
759 __STATIC_INLINE void LL_AHB4_GRP1_DisableClock(uint32_t Periphs) in LL_AHB4_GRP1_DisableClock() argument
761 CLEAR_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_DisableClock()
772 __STATIC_INLINE void LL_AHB4_GRP1_ForceReset(uint32_t Periphs) in LL_AHB4_GRP1_ForceReset() argument
774 SET_BIT(RCC->AHB4RSTR, Periphs); in LL_AHB4_GRP1_ForceReset()
785 __STATIC_INLINE void LL_AHB4_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB4_GRP1_ReleaseReset() argument
787 CLEAR_BIT(RCC->AHB4RSTR, Periphs); in LL_AHB4_GRP1_ReleaseReset()
800 __STATIC_INLINE void LL_AHB4_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_AHB4_GRP1_EnableClockStopSleep() argument
803 SET_BIT(RCC->AHB4SMENR, Periphs); in LL_AHB4_GRP1_EnableClockStopSleep()
805 tmpreg = READ_BIT(RCC->AHB4SMENR, Periphs); in LL_AHB4_GRP1_EnableClockStopSleep()
819 __STATIC_INLINE uint32_t LL_AHB4_GRP1_IsEnabledClockStopSleep(uint32_t Periphs) in LL_AHB4_GRP1_IsEnabledClockStopSleep() argument
821 return ((READ_BIT(RCC->AHB4SMENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB4_GRP1_IsEnabledClockStopSleep()
834 __STATIC_INLINE void LL_AHB4_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_AHB4_GRP1_DisableClockStopSleep() argument
836 CLEAR_BIT(RCC->AHB4SMENR, Periphs); in LL_AHB4_GRP1_DisableClockStopSleep()
858 __STATIC_INLINE void LL_AHB5_GRP1_EnableClock(uint32_t Periphs) in LL_AHB5_GRP1_EnableClock() argument
861 SET_BIT(RCC->AHB5ENR, Periphs); in LL_AHB5_GRP1_EnableClock()
863 tmpreg = READ_BIT(RCC->AHB5ENR, Periphs); in LL_AHB5_GRP1_EnableClock()
879 __STATIC_INLINE uint32_t LL_AHB5_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB5_GRP1_IsEnabledClock() argument
881 return ((READ_BIT(RCC->AHB5ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB5_GRP1_IsEnabledClock()
896 __STATIC_INLINE void LL_AHB5_GRP1_DisableClock(uint32_t Periphs) in LL_AHB5_GRP1_DisableClock() argument
898 CLEAR_BIT(RCC->AHB5ENR, Periphs); in LL_AHB5_GRP1_DisableClock()
913 __STATIC_INLINE void LL_AHB5_GRP1_ForceReset(uint32_t Periphs) in LL_AHB5_GRP1_ForceReset() argument
915 SET_BIT(RCC->AHB5RSTR, Periphs); in LL_AHB5_GRP1_ForceReset()
930 __STATIC_INLINE void LL_AHB5_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB5_GRP1_ReleaseReset() argument
932 CLEAR_BIT(RCC->AHB5RSTR, Periphs); in LL_AHB5_GRP1_ReleaseReset()
947 __STATIC_INLINE void LL_AHB5_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_AHB5_GRP1_EnableClockStopSleep() argument
950 SET_BIT(RCC->AHB5SMENR, Periphs); in LL_AHB5_GRP1_EnableClockStopSleep()
952 tmpreg = READ_BIT(RCC->AHB5SMENR, Periphs); in LL_AHB5_GRP1_EnableClockStopSleep()
968 __STATIC_INLINE uint32_t LL_AHB5_GRP1_IsEnabledClockStopSleep(uint32_t Periphs) in LL_AHB5_GRP1_IsEnabledClockStopSleep() argument
970 return ((READ_BIT(RCC->AHB5SMENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB5_GRP1_IsEnabledClockStopSleep()
985 __STATIC_INLINE void LL_AHB5_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_AHB5_GRP1_DisableClockStopSleep() argument
987 CLEAR_BIT(RCC->AHB5SMENR, Periphs); in LL_AHB5_GRP1_DisableClockStopSleep()
1020 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) in LL_APB1_GRP1_EnableClock() argument
1023 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1025 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1037 __STATIC_INLINE void LL_APB1_GRP2_EnableClock(uint32_t Periphs) in LL_APB1_GRP2_EnableClock() argument
1040 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1042 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1068 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClock() argument
1070 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1081 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP2_IsEnabledClock() argument
1083 return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1106 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) in LL_APB1_GRP1_DisableClock() argument
1108 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
1119 __STATIC_INLINE void LL_APB1_GRP2_DisableClock(uint32_t Periphs) in LL_APB1_GRP2_DisableClock() argument
1121 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
1140 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) in LL_APB1_GRP1_ForceReset() argument
1142 SET_BIT(RCC->APB1RSTR1, Periphs); in LL_APB1_GRP1_ForceReset()
1153 __STATIC_INLINE void LL_APB1_GRP2_ForceReset(uint32_t Periphs) in LL_APB1_GRP2_ForceReset() argument
1155 SET_BIT(RCC->APB1RSTR2, Periphs); in LL_APB1_GRP2_ForceReset()
1174 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP1_ReleaseReset() argument
1176 CLEAR_BIT(RCC->APB1RSTR1, Periphs); in LL_APB1_GRP1_ReleaseReset()
1187 __STATIC_INLINE void LL_APB1_GRP2_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP2_ReleaseReset() argument
1189 CLEAR_BIT(RCC->APB1RSTR2, Periphs); in LL_APB1_GRP2_ReleaseReset()
1214 __STATIC_INLINE void LL_APB1_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP1_EnableClockStopSleep() argument
1217 SET_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_EnableClockStopSleep()
1219 tmpreg = READ_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_EnableClockStopSleep()
1245 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClockStopSleep(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClockStopSleep() argument
1247 return ((READ_BIT(RCC->APB1SMENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClockStopSleep()
1272 __STATIC_INLINE void LL_APB1_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP1_DisableClockStopSleep() argument
1274 CLEAR_BIT(RCC->APB1SMENR1, Periphs); in LL_APB1_GRP1_DisableClockStopSleep()
1285 __STATIC_INLINE void LL_APB1_GRP2_EnableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP2_EnableClockStopSleep() argument
1288 SET_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
1290 tmpreg = READ_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
1302 __STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClockStopSleep(uint32_t Periphs) in LL_APB1_GRP2_IsEnabledClockStopSleep() argument
1304 return ((READ_BIT(RCC->APB1SMENR2, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClockStopSleep()
1314 __STATIC_INLINE void LL_APB1_GRP2_DisableClockStopSleep(uint32_t Periphs) in LL_APB1_GRP2_DisableClockStopSleep() argument
1316 CLEAR_BIT(RCC->APB1SMENR2, Periphs); in LL_APB1_GRP2_DisableClockStopSleep()
1347 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) in LL_APB2_GRP1_EnableClock() argument
1350 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1352 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1376 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClock() argument
1378 return ((READ_BIT(RCC->APB2ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClock()
1401 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) in LL_APB2_GRP1_DisableClock() argument
1403 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
1426 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) in LL_APB2_GRP1_ForceReset() argument
1428 SET_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ForceReset()
1451 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB2_GRP1_ReleaseReset() argument
1453 CLEAR_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ReleaseReset()
1476 __STATIC_INLINE void LL_APB2_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_APB2_GRP1_EnableClockStopSleep() argument
1479 SET_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockStopSleep()
1481 tmpreg = READ_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_EnableClockStopSleep()
1506 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClockStopSleep(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClockStopSleep() argument
1508 return ((READ_BIT(RCC->APB2SMENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB2_GRP1_IsEnabledClockStopSleep()
1531 __STATIC_INLINE void LL_APB2_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_APB2_GRP1_DisableClockStopSleep() argument
1533 CLEAR_BIT(RCC->APB2SMENR, Periphs); in LL_APB2_GRP1_DisableClockStopSleep()
1567 __STATIC_INLINE void LL_APB7_GRP1_EnableClock(uint32_t Periphs) in LL_APB7_GRP1_EnableClock() argument
1570 SET_BIT(RCC->APB7ENR, Periphs); in LL_APB7_GRP1_EnableClock()
1572 tmpreg = READ_BIT(RCC->APB7ENR, Periphs); in LL_APB7_GRP1_EnableClock()
1598 __STATIC_INLINE uint32_t LL_APB7_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB7_GRP1_IsEnabledClock() argument
1600 return ((READ_BIT(RCC->APB7ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB7_GRP1_IsEnabledClock()
1625 __STATIC_INLINE void LL_APB7_GRP1_DisableClock(uint32_t Periphs) in LL_APB7_GRP1_DisableClock() argument
1627 CLEAR_BIT(RCC->APB7ENR, Periphs); in LL_APB7_GRP1_DisableClock()
1650 __STATIC_INLINE void LL_APB7_GRP1_ForceReset(uint32_t Periphs) in LL_APB7_GRP1_ForceReset() argument
1652 SET_BIT(RCC->APB7RSTR, Periphs); in LL_APB7_GRP1_ForceReset()
1675 __STATIC_INLINE void LL_APB7_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB7_GRP1_ReleaseReset() argument
1677 CLEAR_BIT(RCC->APB7RSTR, Periphs); in LL_APB7_GRP1_ReleaseReset()
1702 __STATIC_INLINE void LL_APB7_GRP1_EnableClockStopSleep(uint32_t Periphs) in LL_APB7_GRP1_EnableClockStopSleep() argument
1705 SET_BIT(RCC->APB7SMENR, Periphs); in LL_APB7_GRP1_EnableClockStopSleep()
1707 tmpreg = READ_BIT(RCC->APB7SMENR, Periphs); in LL_APB7_GRP1_EnableClockStopSleep()
1734 __STATIC_INLINE uint32_t LL_APB7_GRP1_IsEnabledClockStopSleep(uint32_t Periphs) in LL_APB7_GRP1_IsEnabledClockStopSleep() argument
1736 return ((READ_BIT(RCC->APB7SMENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB7_GRP1_IsEnabledClockStopSleep()
1761 __STATIC_INLINE void LL_APB7_GRP1_DisableClockStopSleep(uint32_t Periphs) in LL_APB7_GRP1_DisableClockStopSleep() argument
1763 CLEAR_BIT(RCC->APB7SMENR, Periphs); in LL_APB7_GRP1_DisableClockStopSleep()