Lines Matching refs:Periphs
309 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
312 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
314 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
371 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
373 return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
429 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
431 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
476 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
478 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
523 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
525 CLEAR_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ReleaseReset()
589 __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs) in LL_AHB1_GRP1_EnableClockLowPower() argument
592 SET_BIT(RCC->AHB1LPENR, Periphs); in LL_AHB1_GRP1_EnableClockLowPower()
594 tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs); in LL_AHB1_GRP1_EnableClockLowPower()
659 __STATIC_INLINE void LL_AHB1_GRP1_DisableClockLowPower(uint32_t Periphs) in LL_AHB1_GRP1_DisableClockLowPower() argument
661 CLEAR_BIT(RCC->AHB1LPENR, Periphs); in LL_AHB1_GRP1_DisableClockLowPower()
693 __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) in LL_AHB2_GRP1_EnableClock() argument
696 SET_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
698 tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_EnableClock()
723 __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB2_GRP1_IsEnabledClock() argument
725 return (READ_BIT(RCC->AHB2ENR, Periphs) == Periphs); in LL_AHB2_GRP1_IsEnabledClock()
749 __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) in LL_AHB2_GRP1_DisableClock() argument
751 CLEAR_BIT(RCC->AHB2ENR, Periphs); in LL_AHB2_GRP1_DisableClock()
776 __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) in LL_AHB2_GRP1_ForceReset() argument
778 SET_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ForceReset()
803 __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB2_GRP1_ReleaseReset() argument
805 CLEAR_BIT(RCC->AHB2RSTR, Periphs); in LL_AHB2_GRP1_ReleaseReset()
829 __STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower(uint32_t Periphs) in LL_AHB2_GRP1_EnableClockLowPower() argument
832 SET_BIT(RCC->AHB2LPENR, Periphs); in LL_AHB2_GRP1_EnableClockLowPower()
834 tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs); in LL_AHB2_GRP1_EnableClockLowPower()
859 __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs) in LL_AHB2_GRP1_DisableClockLowPower() argument
861 CLEAR_BIT(RCC->AHB2LPENR, Periphs); in LL_AHB2_GRP1_DisableClockLowPower()
883 __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs) in LL_AHB3_GRP1_EnableClock() argument
886 SET_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
888 tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
903 __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB3_GRP1_IsEnabledClock() argument
905 return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs); in LL_AHB3_GRP1_IsEnabledClock()
919 __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs) in LL_AHB3_GRP1_DisableClock() argument
921 CLEAR_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_DisableClock()
936 __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) in LL_AHB3_GRP1_ForceReset() argument
938 SET_BIT(RCC->AHB3RSTR, Periphs); in LL_AHB3_GRP1_ForceReset()
953 __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB3_GRP1_ReleaseReset() argument
955 CLEAR_BIT(RCC->AHB3RSTR, Periphs); in LL_AHB3_GRP1_ReleaseReset()
969 __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs) in LL_AHB3_GRP1_EnableClockLowPower() argument
972 SET_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
974 tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
989 __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs) in LL_AHB3_GRP1_DisableClockLowPower() argument
991 CLEAR_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_DisableClockLowPower()
1071 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) in LL_APB1_GRP1_EnableClock() argument
1074 SET_BIT(RCC->APB1ENR, Periphs); in LL_APB1_GRP1_EnableClock()
1076 tmpreg = READ_BIT(RCC->APB1ENR, Periphs); in LL_APB1_GRP1_EnableClock()
1149 __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB1_GRP1_IsEnabledClock() argument
1151 return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs); in LL_APB1_GRP1_IsEnabledClock()
1223 __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) in LL_APB1_GRP1_DisableClock() argument
1225 CLEAR_BIT(RCC->APB1ENR, Periphs); in LL_APB1_GRP1_DisableClock()
1295 __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) in LL_APB1_GRP1_ForceReset() argument
1297 SET_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ForceReset()
1367 __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB1_GRP1_ReleaseReset() argument
1369 CLEAR_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ReleaseReset()
1441 __STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs) in LL_APB1_GRP1_EnableClockLowPower() argument
1444 SET_BIT(RCC->APB1LPENR, Periphs); in LL_APB1_GRP1_EnableClockLowPower()
1446 tmpreg = READ_BIT(RCC->APB1LPENR, Periphs); in LL_APB1_GRP1_EnableClockLowPower()
1519 __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs) in LL_APB1_GRP1_DisableClockLowPower() argument
1521 CLEAR_BIT(RCC->APB1LPENR, Periphs); in LL_APB1_GRP1_DisableClockLowPower()
1587 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) in LL_APB2_GRP1_EnableClock() argument
1590 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1592 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
1651 __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) in LL_APB2_GRP1_IsEnabledClock() argument
1653 return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); in LL_APB2_GRP1_IsEnabledClock()
1711 __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) in LL_APB2_GRP1_DisableClock() argument
1713 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
1768 __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) in LL_APB2_GRP1_ForceReset() argument
1770 SET_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ForceReset()
1825 __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) in LL_APB2_GRP1_ReleaseReset() argument
1827 CLEAR_BIT(RCC->APB2RSTR, Periphs); in LL_APB2_GRP1_ReleaseReset()
1883 __STATIC_INLINE void LL_APB2_GRP1_EnableClockLowPower(uint32_t Periphs) in LL_APB2_GRP1_EnableClockLowPower() argument
1886 SET_BIT(RCC->APB2LPENR, Periphs); in LL_APB2_GRP1_EnableClockLowPower()
1888 tmpreg = READ_BIT(RCC->APB2LPENR, Periphs); in LL_APB2_GRP1_EnableClockLowPower()
1945 __STATIC_INLINE void LL_APB2_GRP1_DisableClockLowPower(uint32_t Periphs) in LL_APB2_GRP1_DisableClockLowPower() argument
1947 CLEAR_BIT(RCC->APB2LPENR, Periphs); in LL_APB2_GRP1_DisableClockLowPower()