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Searched refs:TIMx (Results 1 – 25 of 119) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_tim.h1747 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1749 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1758 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1760 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1769 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1771 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1780 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1782 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1791 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1793 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_tim.h1650 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1652 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1661 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1663 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1672 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1674 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1683 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1685 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1694 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1696 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_tim.h1663 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1665 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1674 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1676 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1685 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1687 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1696 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1698 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1707 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1709 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_tim.h1418 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1420 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1429 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1431 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1440 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1442 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1451 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1453 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1462 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1464 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_tim.h1463 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1465 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1474 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1476 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1485 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1487 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1496 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1498 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1507 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1509 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_tim.h1461 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1463 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1472 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1474 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1483 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1485 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1494 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1496 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1505 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1507 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_tim.h1388 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1390 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1399 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1401 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1410 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1412 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1421 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1423 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1432 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1434 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_tim.h1073 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1075 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1084 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1086 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1095 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1097 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1106 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1108 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1117 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1119 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_tim.h1116 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1118 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1127 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1129 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1138 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1140 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1149 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1151 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1160 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1162 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_tim.h1094 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1096 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1105 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1107 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1116 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1118 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1127 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1129 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1138 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1140 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_tim.h1277 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1279 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1288 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1290 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1299 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1301 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1310 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1312 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1321 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1323 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_tim.h1054 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1056 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1065 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1067 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1076 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1078 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1087 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1089 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1098 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1100 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_tim.h1959 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1961 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1970 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1972 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1981 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1983 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1992 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1994 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
2003 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
2005 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_tim.h1890 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1892 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1901 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1903 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1912 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1914 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1923 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1925 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1934 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1936 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_tim.h1313 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1315 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1324 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1326 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1335 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1337 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1346 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1348 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1357 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1359 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_tim.h2023 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
2025 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
2034 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
2036 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
2045 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
2047 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
2056 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
2058 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
2067 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
2069 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_tim.h1586 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1588 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1597 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1599 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1608 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1610 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1619 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1621 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1630 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1632 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_tim.h1523 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1525 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1534 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1536 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1545 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1547 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1556 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1558 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1567 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1569 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_tim.h1430 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1432 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1441 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1443 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1452 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1454 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1463 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1465 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1474 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1476 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_tim.h1460 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1462 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1471 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1473 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1482 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1484 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1493 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1495 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1504 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1506 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_tim.h1487 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1489 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1498 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1500 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1509 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1511 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1520 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1522 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1531 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1533 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_tim.h1422 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1424 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1433 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1435 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1444 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1446 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1455 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1457 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1466 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1468 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_tim.h883 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
885 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
894 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
896 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
905 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
907 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
916 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
918 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
927 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
929 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_tim.h901 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
903 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
912 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
914 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
923 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
925 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
934 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
936 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
945 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
947 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_tim.c186 static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
187 static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
188 static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
189 static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
190 static ErrorStatus OC5Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
191 static ErrorStatus OC6Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
192 static ErrorStatus IC1Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
193 static ErrorStatus IC2Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
194 static ErrorStatus IC3Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
195 static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
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