Lines Matching refs:TIMx
883 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
885 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
894 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
896 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
905 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
907 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
916 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
918 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
927 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
929 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
938 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledUpdateEvent() argument
940 return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL); in LL_TIM_IsEnabledUpdateEvent()
959 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource) in LL_TIM_SetUpdateSource() argument
961 MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource); in LL_TIM_SetUpdateSource()
972 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx) in LL_TIM_GetUpdateSource() argument
974 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS)); in LL_TIM_GetUpdateSource()
986 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) in LL_TIM_SetOnePulseMode() argument
988 MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); in LL_TIM_SetOnePulseMode()
999 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx) in LL_TIM_GetOnePulseMode() argument
1001 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); in LL_TIM_GetOnePulseMode()
1023 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) in LL_TIM_SetCounterMode() argument
1025 MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode); in LL_TIM_SetCounterMode()
1043 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) in LL_TIM_GetCounterMode() argument
1047 counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS)); in LL_TIM_GetCounterMode()
1051 counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); in LL_TIM_GetCounterMode()
1063 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) in LL_TIM_EnableARRPreload() argument
1065 SET_BIT(TIMx->CR1, TIM_CR1_ARPE); in LL_TIM_EnableARRPreload()
1074 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) in LL_TIM_DisableARRPreload() argument
1076 CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); in LL_TIM_DisableARRPreload()
1085 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledARRPreload() argument
1087 return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledARRPreload()
1104 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision) in LL_TIM_SetClockDivision() argument
1106 MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); in LL_TIM_SetClockDivision()
1122 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx) in LL_TIM_GetClockDivision() argument
1124 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); in LL_TIM_GetClockDivision()
1136 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) in LL_TIM_SetCounter() argument
1138 WRITE_REG(TIMx->CNT, Counter); in LL_TIM_SetCounter()
1149 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) in LL_TIM_GetCounter() argument
1151 return (uint32_t)(READ_REG(TIMx->CNT)); in LL_TIM_GetCounter()
1162 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx) in LL_TIM_GetDirection() argument
1164 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); in LL_TIM_GetDirection()
1178 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) in LL_TIM_SetPrescaler() argument
1180 WRITE_REG(TIMx->PSC, Prescaler); in LL_TIM_SetPrescaler()
1189 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx) in LL_TIM_GetPrescaler() argument
1191 return (uint32_t)(READ_REG(TIMx->PSC)); in LL_TIM_GetPrescaler()
1205 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) in LL_TIM_SetAutoReload() argument
1207 WRITE_REG(TIMx->ARR, AutoReload); in LL_TIM_SetAutoReload()
1218 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx) in LL_TIM_GetAutoReload() argument
1220 return (uint32_t)(READ_REG(TIMx->ARR)); in LL_TIM_GetAutoReload()
1239 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger) in LL_TIM_CC_SetDMAReqTrigger() argument
1241 MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); in LL_TIM_CC_SetDMAReqTrigger()
1252 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx) in LL_TIM_CC_GetDMAReqTrigger() argument
1254 return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); in LL_TIM_CC_GetDMAReqTrigger()
1271 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_EnableChannel() argument
1273 SET_BIT(TIMx->CCER, Channels); in LL_TIM_CC_EnableChannel()
1290 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_DisableChannel() argument
1292 CLEAR_BIT(TIMx->CCER, Channels); in LL_TIM_CC_DisableChannel()
1309 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_IsEnabledChannel() argument
1311 return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL); in LL_TIM_CC_IsEnabledChannel()
1341 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura… in LL_TIM_OC_ConfigOutput() argument
1344 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_ConfigOutput()
1346 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1374 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) in LL_TIM_OC_SetMode() argument
1377 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_SetMode()
1403 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetMode() argument
1406 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_GetMode()
1427 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) in LL_TIM_OC_SetPolarity() argument
1430 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
1449 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetPolarity() argument
1452 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
1470 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnableFast() argument
1473 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnableFast()
1492 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisableFast() argument
1495 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisableFast()
1514 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledFast() argument
1517 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledFast()
1536 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnablePreload() argument
1539 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnablePreload()
1557 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisablePreload() argument
1560 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisablePreload()
1578 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledPreload() argument
1581 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledPreload()
1603 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnableClear() argument
1606 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnableClear()
1626 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisableClear() argument
1629 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisableClear()
1651 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledClear() argument
1654 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledClear()
1671 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH1() argument
1673 WRITE_REG(TIMx->CCR1, CompareValue); in LL_TIM_OC_SetCompareCH1()
1688 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH2() argument
1690 WRITE_REG(TIMx->CCR2, CompareValue); in LL_TIM_OC_SetCompareCH2()
1705 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH3() argument
1707 WRITE_REG(TIMx->CCR3, CompareValue); in LL_TIM_OC_SetCompareCH3()
1722 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH4() argument
1724 WRITE_REG(TIMx->CCR4, CompareValue); in LL_TIM_OC_SetCompareCH4()
1738 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH1() argument
1740 return (uint32_t)(READ_REG(TIMx->CCR1)); in LL_TIM_OC_GetCompareCH1()
1754 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH2() argument
1756 return (uint32_t)(READ_REG(TIMx->CCR2)); in LL_TIM_OC_GetCompareCH2()
1770 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH3() argument
1772 return (uint32_t)(READ_REG(TIMx->CCR3)); in LL_TIM_OC_GetCompareCH3()
1786 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH4() argument
1788 return (uint32_t)(READ_REG(TIMx->CCR4)); in LL_TIM_OC_GetCompareCH4()
1833 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) in LL_TIM_IC_Config() argument
1836 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_Config()
1840 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
1862 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv… in LL_TIM_IC_SetActiveInput() argument
1865 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetActiveInput()
1886 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetActiveInput() argument
1889 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetActiveInput()
1912 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal… in LL_TIM_IC_SetPrescaler() argument
1915 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetPrescaler()
1937 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetPrescaler() argument
1940 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetPrescaler()
1975 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) in LL_TIM_IC_SetFilter() argument
1978 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetFilter()
2012 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetFilter() argument
2015 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetFilter()
2041 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity) in LL_TIM_IC_SetPolarity() argument
2044 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
2069 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetPolarity() argument
2072 return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> in LL_TIM_IC_GetPolarity()
2084 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) in LL_TIM_IC_EnableXORCombination() argument
2086 SET_BIT(TIMx->CR2, TIM_CR2_TI1S); in LL_TIM_IC_EnableXORCombination()
2097 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx) in LL_TIM_IC_DisableXORCombination() argument
2099 CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); in LL_TIM_IC_DisableXORCombination()
2110 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) in LL_TIM_IC_IsEnabledXORCombination() argument
2112 return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL); in LL_TIM_IC_IsEnabledXORCombination()
2126 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH1() argument
2128 return (uint32_t)(READ_REG(TIMx->CCR1)); in LL_TIM_IC_GetCaptureCH1()
2142 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH2() argument
2144 return (uint32_t)(READ_REG(TIMx->CCR2)); in LL_TIM_IC_GetCaptureCH2()
2158 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH3() argument
2160 return (uint32_t)(READ_REG(TIMx->CCR3)); in LL_TIM_IC_GetCaptureCH3()
2174 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH4() argument
2176 return (uint32_t)(READ_REG(TIMx->CCR4)); in LL_TIM_IC_GetCaptureCH4()
2195 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx) in LL_TIM_EnableExternalClock() argument
2197 SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_EnableExternalClock()
2208 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx) in LL_TIM_DisableExternalClock() argument
2210 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_DisableExternalClock()
2221 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledExternalClock() argument
2223 return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); in LL_TIM_IsEnabledExternalClock()
2245 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) in LL_TIM_SetClockSource() argument
2247 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); in LL_TIM_SetClockSource()
2262 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) in LL_TIM_SetEncoderMode() argument
2264 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); in LL_TIM_SetEncoderMode()
2291 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) in LL_TIM_SetTriggerOutput() argument
2293 MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); in LL_TIM_SetTriggerOutput()
2309 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) in LL_TIM_SetSlaveMode() argument
2311 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); in LL_TIM_SetSlaveMode()
2331 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) in LL_TIM_SetTriggerInput() argument
2333 MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); in LL_TIM_SetTriggerInput()
2344 __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx) in LL_TIM_EnableMasterSlaveMode() argument
2346 SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_EnableMasterSlaveMode()
2357 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) in LL_TIM_DisableMasterSlaveMode() argument
2359 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_DisableMasterSlaveMode()
2370 __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledMasterSlaveMode() argument
2372 return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL); in LL_TIM_IsEnabledMasterSlaveMode()
2410 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale… in LL_TIM_ConfigETR() argument
2413 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E… in LL_TIM_ConfigETR()
2469 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_… in LL_TIM_ConfigDMABurst() argument
2471 MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength)); in LL_TIM_ConfigDMABurst()
2559 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap) in LL_TIM_SetRemap() argument
2561 MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK)); in LL_TIM_SetRemap()
2583 __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSou… in LL_TIM_SetOCRefClearInputSource() argument
2585 MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource); in LL_TIM_SetOCRefClearInputSource()
2600 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_UPDATE() argument
2602 WRITE_REG(TIMx->SR, ~(TIM_SR_UIF)); in LL_TIM_ClearFlag_UPDATE()
2611 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_UPDATE() argument
2613 return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_UPDATE()
2622 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC1() argument
2624 WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); in LL_TIM_ClearFlag_CC1()
2633 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC1() argument
2635 return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC1()
2644 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC2() argument
2646 WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF)); in LL_TIM_ClearFlag_CC2()
2655 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC2() argument
2657 return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC2()
2666 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC3() argument
2668 WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF)); in LL_TIM_ClearFlag_CC3()
2677 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC3() argument
2679 return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC3()
2688 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC4() argument
2690 WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF)); in LL_TIM_ClearFlag_CC4()
2699 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC4() argument
2701 return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC4()
2710 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_TRIG() argument
2712 WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); in LL_TIM_ClearFlag_TRIG()
2721 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_TRIG() argument
2723 return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_TRIG()
2732 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC1OVR() argument
2734 WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); in LL_TIM_ClearFlag_CC1OVR()
2744 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC1OVR() argument
2746 return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC1OVR()
2755 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC2OVR() argument
2757 WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); in LL_TIM_ClearFlag_CC2OVR()
2767 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC2OVR() argument
2769 return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC2OVR()
2778 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC3OVR() argument
2780 WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); in LL_TIM_ClearFlag_CC3OVR()
2790 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC3OVR() argument
2792 return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC3OVR()
2801 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC4OVR() argument
2803 WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); in LL_TIM_ClearFlag_CC4OVR()
2813 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC4OVR() argument
2815 return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC4OVR()
2831 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_UPDATE() argument
2833 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE()
2842 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_UPDATE() argument
2844 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE()
2853 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_UPDATE() argument
2855 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
2864 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC1() argument
2866 SET_BIT(TIMx->DIER, TIM_DIER_CC1IE); in LL_TIM_EnableIT_CC1()
2875 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC1() argument
2877 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE); in LL_TIM_DisableIT_CC1()
2886 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC1() argument
2888 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC1()
2897 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC2() argument
2899 SET_BIT(TIMx->DIER, TIM_DIER_CC2IE); in LL_TIM_EnableIT_CC2()
2908 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC2() argument
2910 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE); in LL_TIM_DisableIT_CC2()
2919 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC2() argument
2921 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC2()
2930 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC3() argument
2932 SET_BIT(TIMx->DIER, TIM_DIER_CC3IE); in LL_TIM_EnableIT_CC3()
2941 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC3() argument
2943 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE); in LL_TIM_DisableIT_CC3()
2952 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC3() argument
2954 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC3()
2963 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC4() argument
2965 SET_BIT(TIMx->DIER, TIM_DIER_CC4IE); in LL_TIM_EnableIT_CC4()
2974 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC4() argument
2976 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE); in LL_TIM_DisableIT_CC4()
2985 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC4() argument
2987 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC4()
2996 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_TRIG() argument
2998 SET_BIT(TIMx->DIER, TIM_DIER_TIE); in LL_TIM_EnableIT_TRIG()
3007 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_TRIG() argument
3009 CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE); in LL_TIM_DisableIT_TRIG()
3018 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_TRIG() argument
3020 return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_TRIG()
3036 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_UPDATE() argument
3038 SET_BIT(TIMx->DIER, TIM_DIER_UDE); in LL_TIM_EnableDMAReq_UPDATE()
3047 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_UPDATE() argument
3049 CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE); in LL_TIM_DisableDMAReq_UPDATE()
3058 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_UPDATE() argument
3060 return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_UPDATE()
3069 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC1() argument
3071 SET_BIT(TIMx->DIER, TIM_DIER_CC1DE); in LL_TIM_EnableDMAReq_CC1()
3080 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC1() argument
3082 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE); in LL_TIM_DisableDMAReq_CC1()
3091 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC1() argument
3093 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC1()
3102 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC2() argument
3104 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
3113 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC2() argument
3115 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
3124 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC2() argument
3126 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
3135 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC3() argument
3137 SET_BIT(TIMx->DIER, TIM_DIER_CC3DE); in LL_TIM_EnableDMAReq_CC3()
3146 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC3() argument
3148 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE); in LL_TIM_DisableDMAReq_CC3()
3157 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC3() argument
3159 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC3()
3168 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC4() argument
3170 SET_BIT(TIMx->DIER, TIM_DIER_CC4DE); in LL_TIM_EnableDMAReq_CC4()
3179 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC4() argument
3181 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE); in LL_TIM_DisableDMAReq_CC4()
3190 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC4() argument
3192 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC4()
3201 __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_TRIG() argument
3203 SET_BIT(TIMx->DIER, TIM_DIER_TDE); in LL_TIM_EnableDMAReq_TRIG()
3212 __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_TRIG() argument
3214 CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE); in LL_TIM_DisableDMAReq_TRIG()
3223 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_TRIG() argument
3225 return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_TRIG()
3241 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_UPDATE() argument
3243 SET_BIT(TIMx->EGR, TIM_EGR_UG); in LL_TIM_GenerateEvent_UPDATE()
3252 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC1() argument
3254 SET_BIT(TIMx->EGR, TIM_EGR_CC1G); in LL_TIM_GenerateEvent_CC1()
3263 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC2() argument
3265 SET_BIT(TIMx->EGR, TIM_EGR_CC2G); in LL_TIM_GenerateEvent_CC2()
3274 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC3() argument
3276 SET_BIT(TIMx->EGR, TIM_EGR_CC3G); in LL_TIM_GenerateEvent_CC3()
3285 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC4() argument
3287 SET_BIT(TIMx->EGR, TIM_EGR_CC4G); in LL_TIM_GenerateEvent_CC4()
3296 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_TRIG() argument
3298 SET_BIT(TIMx->EGR, TIM_EGR_TG); in LL_TIM_GenerateEvent_TRIG()
3310 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
3312 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
3314 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
3316 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
3318 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…