1959 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)  in LL_TIM_EnableCounter()  argument
1961   SET_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_EnableCounter()
1970 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)  in LL_TIM_DisableCounter()  argument
1972   CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_DisableCounter()
1981 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledCounter()  argument
1983   return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledCounter()
1992 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_EnableUpdateEvent()  argument
1994   CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_EnableUpdateEvent()
2003 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_DisableUpdateEvent()  argument
2005   SET_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_DisableUpdateEvent()
2014 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledUpdateEvent()  argument
2016   return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);  in LL_TIM_IsEnabledUpdateEvent()
2035 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)  in LL_TIM_SetUpdateSource()  argument
2037   MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);  in LL_TIM_SetUpdateSource()
2048 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetUpdateSource()  argument
2050   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));  in LL_TIM_GetUpdateSource()
2062 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)  in LL_TIM_SetOnePulseMode()  argument
2064   MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);  in LL_TIM_SetOnePulseMode()
2075 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetOnePulseMode()  argument
2077   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));  in LL_TIM_GetOnePulseMode()
2099 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)  in LL_TIM_SetCounterMode()  argument
2101   MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);  in LL_TIM_SetCounterMode()
2119 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounterMode()  argument
2123   counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));  in LL_TIM_GetCounterMode()
2127     counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetCounterMode()
2139 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableARRPreload()  argument
2141   SET_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_EnableARRPreload()
2150 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableARRPreload()  argument
2152   CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_DisableARRPreload()
2161 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledARRPreload()  argument
2163   return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledARRPreload()
2180 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)  in LL_TIM_SetClockDivision()  argument
2182   MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);  in LL_TIM_SetClockDivision()
2198 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)  in LL_TIM_GetClockDivision()  argument
2200   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));  in LL_TIM_GetClockDivision()
2213 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)  in LL_TIM_SetCounter()  argument
2215   WRITE_REG(TIMx->CNT, Counter);  in LL_TIM_SetCounter()
2227 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounter()  argument
2229   return (uint32_t)(READ_REG(TIMx->CNT));  in LL_TIM_GetCounter()
2240 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetDirection()  argument
2242   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetDirection()
2256 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)  in LL_TIM_SetPrescaler()  argument
2258   WRITE_REG(TIMx->PSC, Prescaler);  in LL_TIM_SetPrescaler()
2267 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_GetPrescaler()  argument
2269   return (uint32_t)(READ_REG(TIMx->PSC));  in LL_TIM_GetPrescaler()
2285 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)  in LL_TIM_SetAutoReload()  argument
2287   WRITE_REG(TIMx->ARR, AutoReload);  in LL_TIM_SetAutoReload()
2299 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)  in LL_TIM_GetAutoReload()  argument
2301   return (uint32_t)(READ_REG(TIMx->ARR));  in LL_TIM_GetAutoReload()
2314 __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)  in LL_TIM_SetRepetitionCounter()  argument
2316   WRITE_REG(TIMx->RCR, RepetitionCounter);  in LL_TIM_SetRepetitionCounter()
2327 __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetRepetitionCounter()  argument
2329   return (uint32_t)(READ_REG(TIMx->RCR));  in LL_TIM_GetRepetitionCounter()
2340 __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_EnableUIFRemap()  argument
2342   SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_EnableUIFRemap()
2351 __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_DisableUIFRemap()  argument
2353   CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_DisableUIFRemap()
2374 __STATIC_INLINE void LL_TIM_EnableDithering(TIM_TypeDef *TIMx)  in LL_TIM_EnableDithering()  argument
2376   SET_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_EnableDithering()
2387 __STATIC_INLINE void LL_TIM_DisableDithering(TIM_TypeDef *TIMx)  in LL_TIM_DisableDithering()  argument
2389   CLEAR_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_DisableDithering()
2400 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDithering(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDithering()  argument
2402   return ((READ_BIT(TIMx->CR1, TIM_CR1_DITHEN) == (TIM_CR1_DITHEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDithering()
2423 __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_EnablePreload()  argument
2425   SET_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_EnablePreload()
2436 __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_DisablePreload()  argument
2438   CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_DisablePreload()
2447 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)  in LL_TIM_CC_IsEnabledPreload()  argument
2449   return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledPreload()
2463 __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)  in LL_TIM_CC_SetUpdate()  argument
2465   MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);  in LL_TIM_CC_SetUpdate()
2477 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)  in LL_TIM_CC_SetDMAReqTrigger()  argument
2479   MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);  in LL_TIM_CC_SetDMAReqTrigger()
2490 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)  in LL_TIM_CC_GetDMAReqTrigger()  argument
2492   return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));  in LL_TIM_CC_GetDMAReqTrigger()
2509 __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)  in LL_TIM_CC_SetLockLevel()  argument
2511   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);  in LL_TIM_CC_SetLockLevel()
2540 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_EnableChannel()  argument
2542   SET_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_EnableChannel()
2571 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_DisableChannel()  argument
2573   CLEAR_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_DisableChannel()
2602 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_IsEnabledChannel()  argument
2604   return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledChannel()
2647 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura…  in LL_TIM_OC_ConfigOutput()  argument
2650 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_ConfigOutput()
2652   MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_OC_ConfigOutput()
2654   MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  in LL_TIM_OC_ConfigOutput()
2694 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)  in LL_TIM_OC_SetMode()  argument
2697 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_SetMode()
2735 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetMode()  argument
2738 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_GetMode()
2771 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)  in LL_TIM_OC_SetPolarity()  argument
2774 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iC…  in LL_TIM_OC_SetPolarity()
2805 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetPolarity()  argument
2808 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann…  in LL_TIM_OC_GetPolarity()
2844 __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)  in LL_TIM_OC_SetIdleState()  argument
2847 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  IdleState << SHIFT_TAB_OISx[iCh…  in LL_TIM_OC_SetIdleState()
2878 __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetIdleState()  argument
2881 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel…  in LL_TIM_OC_GetIdleState()
2903 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableFast()  argument
2906 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableFast()
2929 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableFast()  argument
2932 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableFast()
2955 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledFast()  argument
2958 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledFast()
2981 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnablePreload()  argument
2984 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnablePreload()
3006 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisablePreload()  argument
3009 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisablePreload()
3031 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledPreload()  argument
3034 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledPreload()
3060 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableClear()  argument
3063 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableClear()
3087 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableClear()  argument
3090 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableClear()
3116 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledClear()  argument
3119 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledClear()
3135 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_OC_SetDeadTime()  argument
3137   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);  in LL_TIM_OC_SetDeadTime()
3153 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH1()  argument
3155   WRITE_REG(TIMx->CCR1, CompareValue);  in LL_TIM_OC_SetCompareCH1()
3171 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH2()  argument
3173   WRITE_REG(TIMx->CCR2, CompareValue);  in LL_TIM_OC_SetCompareCH2()
3189 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH3()  argument
3191   WRITE_REG(TIMx->CCR3, CompareValue);  in LL_TIM_OC_SetCompareCH3()
3207 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH4()  argument
3209   WRITE_REG(TIMx->CCR4, CompareValue);  in LL_TIM_OC_SetCompareCH4()
3222 __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH5()  argument
3224   MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);  in LL_TIM_OC_SetCompareCH5()
3237 __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH6()  argument
3239   WRITE_REG(TIMx->CCR6, CompareValue);  in LL_TIM_OC_SetCompareCH6()
3254 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH1()  argument
3256   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_OC_GetCompareCH1()
3271 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH2()  argument
3273   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_OC_GetCompareCH2()
3288 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH3()  argument
3290   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_OC_GetCompareCH3()
3305 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH4()  argument
3307   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_OC_GetCompareCH4()
3319 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH5()  argument
3321   return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));  in LL_TIM_OC_GetCompareCH5()
3333 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH6()  argument
3335   return (uint32_t)(READ_REG(TIMx->CCR6));  in LL_TIM_OC_GetCompareCH6()
3353 __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)  in LL_TIM_SetCH5CombinedChannels()  argument
3355   MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);  in LL_TIM_SetCH5CombinedChannels()
3376 __STATIC_INLINE void LL_TIM_OC_SetPulseWidthPrescaler(TIM_TypeDef *TIMx, uint32_t PulseWidthPrescal…  in LL_TIM_OC_SetPulseWidthPrescaler()  argument
3378   MODIFY_REG(TIMx->ECR, TIM_ECR_PWPRSC, PulseWidthPrescaler);  in LL_TIM_OC_SetPulseWidthPrescaler()
3398 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidthPrescaler()  argument
3400   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PWPRSC));  in LL_TIM_OC_GetPulseWidthPrescaler()
3413 __STATIC_INLINE void LL_TIM_OC_SetPulseWidth(TIM_TypeDef *TIMx, uint32_t PulseWidth)  in LL_TIM_OC_SetPulseWidth()  argument
3415   MODIFY_REG(TIMx->ECR, TIM_ECR_PW, PulseWidth << TIM_ECR_PW_Pos);  in LL_TIM_OC_SetPulseWidth()
3427 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidth(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidth()  argument
3429   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PW));  in LL_TIM_OC_GetPulseWidth()
3474 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)  in LL_TIM_IC_Config()  argument
3477 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_Config()
3481   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_Config()
3503 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv…  in LL_TIM_IC_SetActiveInput()  argument
3506 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetActiveInput()
3527 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetActiveInput()  argument
3530 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetActiveInput()
3553 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal…  in LL_TIM_IC_SetPrescaler()  argument
3556 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetPrescaler()
3578 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPrescaler()  argument
3581 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetPrescaler()
3616 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)  in LL_TIM_IC_SetFilter()  argument
3619 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetFilter()
3653 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetFilter()  argument
3656 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetFilter()
3682 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)  in LL_TIM_IC_SetPolarity()  argument
3685   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_SetPolarity()
3710 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPolarity()  argument
3713   return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>  in LL_TIM_IC_GetPolarity()
3725 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_EnableXORCombination()  argument
3727   SET_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_EnableXORCombination()
3738 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_DisableXORCombination()  argument
3740   CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_DisableXORCombination()
3751 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)  in LL_TIM_IC_IsEnabledXORCombination()  argument
3753   return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);  in LL_TIM_IC_IsEnabledXORCombination()
3768 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH1()  argument
3770   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_IC_GetCaptureCH1()
3785 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH2()  argument
3787   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_IC_GetCaptureCH2()
3802 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH3()  argument
3804   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_IC_GetCaptureCH3()
3819 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH4()  argument
3821   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_IC_GetCaptureCH4()
3840 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_EnableExternalClock()  argument
3842   SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_EnableExternalClock()
3853 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_DisableExternalClock()  argument
3855   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_DisableExternalClock()
3866 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledExternalClock()  argument
3868   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledExternalClock()
3890 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)  in LL_TIM_SetClockSource()  argument
3892   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);  in LL_TIM_SetClockSource()
3913 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)  in LL_TIM_SetEncoderMode()  argument
3915   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);  in LL_TIM_SetEncoderMode()
3943 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)  in LL_TIM_SetTriggerOutput()  argument
3945   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);  in LL_TIM_SetTriggerOutput()
3973 __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)  in LL_TIM_SetTriggerOutput2()  argument
3975   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);  in LL_TIM_SetTriggerOutput2()
3993 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)  in LL_TIM_SetSlaveMode()  argument
3995   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);  in LL_TIM_SetSlaveMode()
4024 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)  in LL_TIM_SetTriggerInput()  argument
4026   MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);  in LL_TIM_SetTriggerInput()
4037 __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_EnableMasterSlaveMode()  argument
4039   SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_EnableMasterSlaveMode()
4050 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_DisableMasterSlaveMode()  argument
4052   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_DisableMasterSlaveMode()
4063 __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledMasterSlaveMode()  argument
4065   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);  in LL_TIM_IsEnabledMasterSlaveMode()
4103 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale…  in LL_TIM_ConfigETR()  argument
4106 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E…  in LL_TIM_ConfigETR()
4197 __STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)  in LL_TIM_SetETRSource()  argument
4199   MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource);  in LL_TIM_SetETRSource()
4210 __STATIC_INLINE void LL_TIM_EnableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableSMSPreload()  argument
4212   SET_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_EnableSMSPreload()
4223 __STATIC_INLINE void LL_TIM_DisableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableSMSPreload()  argument
4225   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_DisableSMSPreload()
4236 __STATIC_INLINE uint32_t LL_TIM_IsEnabledSMSPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledSMSPreload()  argument
4238   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPE) == (TIM_SMCR_SMSPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledSMSPreload()
4252 __STATIC_INLINE void LL_TIM_SetSMSPreloadSource(TIM_TypeDef *TIMx, uint32_t PreloadSource)  in LL_TIM_SetSMSPreloadSource()  argument
4254   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMSPS, PreloadSource);  in LL_TIM_SetSMSPreloadSource()
4267 __STATIC_INLINE uint32_t LL_TIM_GetSMSPreloadSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetSMSPreloadSource()  argument
4269   return (uint32_t)(READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPS));  in LL_TIM_GetSMSPreloadSource()
4287 __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK()  argument
4289   SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_EnableBRK()
4300 __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK()  argument
4302   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_DisableBRK()
4347 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilt…  in LL_TIM_ConfigBRK()  argument
4350 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |…  in LL_TIM_ConfigBRK()
4363 __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK()  argument
4365   SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);  in LL_TIM_DisarmBRK()
4376 __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK2()  argument
4378   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_EnableBRK2()
4389 __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK2()  argument
4391   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_DisableBRK2()
4436 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F…  in LL_TIM_ConfigBRK2()  argument
4439 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil…  in LL_TIM_ConfigBRK2()
4452 __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK2()  argument
4454   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);  in LL_TIM_DisarmBRK2()
4472 __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat…  in LL_TIM_SetOffStates()  argument
4474   MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);  in LL_TIM_SetOffStates()
4485 __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_EnableAutomaticOutput()  argument
4487   SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_EnableAutomaticOutput()
4498 __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_DisableAutomaticOutput()  argument
4500   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_DisableAutomaticOutput()
4511 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAutomaticOutput()  argument
4513   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAutomaticOutput()
4526 __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_EnableAllOutputs()  argument
4528   SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_EnableAllOutputs()
4541 __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_DisableAllOutputs()  argument
4543   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_DisableAllOutputs()
4554 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAllOutputs()  argument
4556   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAllOutputs()
4587 __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t…  in LL_TIM_EnableBreakInputSource()  argument
4589   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_EnableBreakInputSource()
4621 __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_…  in LL_TIM_DisableBreakInputSource()  argument
4623   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_DisableBreakInputSource()
4655 __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin…  in LL_TIM_SetBreakInputSourcePolarity()  argument
4658   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_SetBreakInputSourcePolarity()
4669 __STATIC_INLINE void LL_TIM_EnableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_EnableAsymmetricalDeadTime()  argument
4671   SET_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_EnableAsymmetricalDeadTime()
4682 __STATIC_INLINE void LL_TIM_DisableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_DisableAsymmetricalDeadTime()  argument
4684   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_DisableAsymmetricalDeadTime()
4695 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAsymmetricalDeadTime()  argument
4697   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTAE) == (TIM_DTR2_DTAE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAsymmetricalDeadTime()
4713 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_SetFallingDeadTime()  argument
4715   MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime);  in LL_TIM_SetFallingDeadTime()
4729 __STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_GetFallingDeadTime()  argument
4731   return (uint32_t)(READ_BIT(TIMx->DTR2, TIM_DTR2_DTGF));  in LL_TIM_GetFallingDeadTime()
4742 __STATIC_INLINE void LL_TIM_EnableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableDeadTimePreload()  argument
4744   SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_EnableDeadTimePreload()
4755 __STATIC_INLINE void LL_TIM_DisableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableDeadTimePreload()  argument
4757   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_DisableDeadTimePreload()
4768 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDeadTimePreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDeadTimePreload()  argument
4770   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDeadTimePreload()
4852 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_…  in LL_TIM_ConfigDMABurst()  argument
4855   MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA | TIM_DCR_DBSS),  in LL_TIM_ConfigDMABurst()
4875 __STATIC_INLINE void LL_TIM_EnableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableEncoderIndex()  argument
4877   SET_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_EnableEncoderIndex()
4888 __STATIC_INLINE void LL_TIM_DisableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableEncoderIndex()  argument
4890   CLEAR_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_DisableEncoderIndex()
4901 __STATIC_INLINE uint32_t LL_TIM_IsEnabledEncoderIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledEncoderIndex()  argument
4903   return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U);  in LL_TIM_IsEnabledEncoderIndex()
4918 __STATIC_INLINE void LL_TIM_SetIndexDirection(TIM_TypeDef *TIMx, uint32_t IndexDirection)  in LL_TIM_SetIndexDirection()  argument
4920   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR, IndexDirection);  in LL_TIM_SetIndexDirection()
4934 __STATIC_INLINE uint32_t LL_TIM_GetIndexDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexDirection()  argument
4936   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IDIR));  in LL_TIM_GetIndexDirection()
4951 __STATIC_INLINE void LL_TIM_SetIndexblanking(TIM_TypeDef *TIMx, uint32_t Indexblanking)  in LL_TIM_SetIndexblanking()  argument
4953   MODIFY_REG(TIMx->ECR, TIM_ECR_IBLK, Indexblanking);  in LL_TIM_SetIndexblanking()
4967 __STATIC_INLINE uint32_t LL_TIM_GetIndexblanking(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexblanking()  argument
4969   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IBLK));  in LL_TIM_GetIndexblanking()
4981 __STATIC_INLINE void LL_TIM_EnableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableFirstIndex()  argument
4983   SET_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_EnableFirstIndex()
4994 __STATIC_INLINE void LL_TIM_DisableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableFirstIndex()  argument
4996   CLEAR_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_DisableFirstIndex()
5007 __STATIC_INLINE uint32_t LL_TIM_IsEnabledFirstIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledFirstIndex()  argument
5009   return ((READ_BIT(TIMx->ECR, TIM_ECR_FIDX) == (TIM_ECR_FIDX)) ? 1UL : 0UL);  in LL_TIM_IsEnabledFirstIndex()
5027 __STATIC_INLINE void LL_TIM_SetIndexPositionning(TIM_TypeDef *TIMx, uint32_t IndexPositionning)  in LL_TIM_SetIndexPositionning()  argument
5029   MODIFY_REG(TIMx->ECR, TIM_ECR_IPOS, IndexPositionning);  in LL_TIM_SetIndexPositionning()
5046 __STATIC_INLINE uint32_t LL_TIM_GetIndexPositionning(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexPositionning()  argument
5048   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IPOS));  in LL_TIM_GetIndexPositionning()
5067 __STATIC_INLINE void LL_TIM_ConfigIDX(TIM_TypeDef *TIMx, uint32_t Configuration)  in LL_TIM_ConfigIDX()  argument
5069   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR | TIM_ECR_IBLK | TIM_ECR_FIDX | TIM_ECR_IPOS, Configuration);  in LL_TIM_ConfigIDX()
5220 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)  in LL_TIM_SetRemap()  argument
5222 …MODIFY_REG(TIMx->TISEL, (TIM_TISEL_TI1SEL | TIM_TISEL_TI2SEL | TIM_TISEL_TI3SEL | TIM_TISEL_TI4SEL…  in LL_TIM_SetRemap()
5232 __STATIC_INLINE void LL_TIM_EnableRTCPRE(TIM_TypeDef *TIMx)  in LL_TIM_EnableRTCPRE()  argument
5234   SET_BIT(TIMx->OR1, TIM_OR1_RTCPREEN);  in LL_TIM_EnableRTCPRE()
5244 __STATIC_INLINE void LL_TIM_DisableRTCPRE(TIM_TypeDef *TIMx)  in LL_TIM_DisableRTCPRE()  argument
5246   CLEAR_BIT(TIMx->OR1, TIM_OR1_RTCPREEN);  in LL_TIM_DisableRTCPRE()
5256 __STATIC_INLINE uint32_t LL_TIM_IsEnabledRTCPRE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledRTCPRE()  argument
5258   return ((READ_BIT(TIMx->OR1, TIM_OR1_RTCPREEN) == (TIM_OR1_RTCPREEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledRTCPRE()
5283 __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSou…  in LL_TIM_SetOCRefClearInputSource()  argument
5285   MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS,  in LL_TIM_SetOCRefClearInputSource()
5287   MODIFY_REG(TIMx->AF2, TIM1_AF2_OCRSEL, OCRefClearInputSource);  in LL_TIM_SetOCRefClearInputSource()
5302 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_UPDATE()  argument
5304   WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));  in LL_TIM_ClearFlag_UPDATE()
5313 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_UPDATE()  argument
5315   return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_UPDATE()
5324 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1()  argument
5326   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));  in LL_TIM_ClearFlag_CC1()
5335 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1()  argument
5337   return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1()
5346 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2()  argument
5348   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));  in LL_TIM_ClearFlag_CC2()
5357 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2()  argument
5359   return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2()
5368 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3()  argument
5370   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));  in LL_TIM_ClearFlag_CC3()
5379 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3()  argument
5381   return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3()
5390 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4()  argument
5392   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));  in LL_TIM_ClearFlag_CC4()
5401 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4()  argument
5403   return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4()
5412 __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC5()  argument
5414   WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));  in LL_TIM_ClearFlag_CC5()
5423 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC5()  argument
5425   return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC5()
5434 __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC6()  argument
5436   WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));  in LL_TIM_ClearFlag_CC6()
5445 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC6()  argument
5447   return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC6()
5456 __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_COM()  argument
5458   WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));  in LL_TIM_ClearFlag_COM()
5467 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_COM()  argument
5469   return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_COM()
5478 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TRIG()  argument
5480   WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));  in LL_TIM_ClearFlag_TRIG()
5489 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TRIG()  argument
5491   return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TRIG()
5500 __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK()  argument
5502   WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));  in LL_TIM_ClearFlag_BRK()
5511 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK()  argument
5513   return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK()
5522 __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK2()  argument
5524   WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));  in LL_TIM_ClearFlag_BRK2()
5533 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK2()  argument
5535   return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK2()
5544 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1OVR()  argument
5546   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));  in LL_TIM_ClearFlag_CC1OVR()
5556 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1OVR()  argument
5558   return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1OVR()
5567 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2OVR()  argument
5569   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));  in LL_TIM_ClearFlag_CC2OVR()
5579 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2OVR()  argument
5581   return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2OVR()
5590 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3OVR()  argument
5592   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));  in LL_TIM_ClearFlag_CC3OVR()
5602 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3OVR()  argument
5604   return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3OVR()
5613 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4OVR()  argument
5615   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));  in LL_TIM_ClearFlag_CC4OVR()
5625 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4OVR()  argument
5627   return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4OVR()
5636 __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_SYSBRK()  argument
5638   WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));  in LL_TIM_ClearFlag_SYSBRK()
5647 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_SYSBRK()  argument
5649   return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_SYSBRK()
5660 __STATIC_INLINE void LL_TIM_ClearFlag_TERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TERR()  argument
5662   WRITE_REG(TIMx->SR, ~(TIM_SR_TERRF));  in LL_TIM_ClearFlag_TERR()
5673 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TERR()  argument
5675   return ((READ_BIT(TIMx->SR, TIM_SR_TERRF) == (TIM_SR_TERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TERR()
5686 __STATIC_INLINE void LL_TIM_ClearFlag_IERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IERR()  argument
5688   WRITE_REG(TIMx->SR, ~(TIM_SR_IERRF));  in LL_TIM_ClearFlag_IERR()
5699 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IERR()  argument
5701   return ((READ_BIT(TIMx->SR, TIM_SR_IERRF) == (TIM_SR_IERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IERR()
5712 __STATIC_INLINE void LL_TIM_ClearFlag_DIR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_DIR()  argument
5714   WRITE_REG(TIMx->SR, ~(TIM_SR_DIRF));  in LL_TIM_ClearFlag_DIR()
5725 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_DIR()  argument
5727   return ((READ_BIT(TIMx->SR, TIM_SR_DIRF) == (TIM_SR_DIRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_DIR()
5738 __STATIC_INLINE void LL_TIM_ClearFlag_IDX(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IDX()  argument
5740   WRITE_REG(TIMx->SR, ~(TIM_SR_IDXF));  in LL_TIM_ClearFlag_IDX()
5751 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IDX()  argument
5753   return ((READ_BIT(TIMx->SR, TIM_SR_IDXF) == (TIM_SR_IDXF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IDX()
5768 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_UPDATE()  argument
5770   SET_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_EnableIT_UPDATE()
5779 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_UPDATE()  argument
5781   CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_DisableIT_UPDATE()
5790 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_UPDATE()  argument
5792   return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_UPDATE()
5801 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC1()  argument
5803   SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_EnableIT_CC1()
5812 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC1()  argument
5814   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_DisableIT_CC1()
5823 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC1()  argument
5825   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC1()
5834 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC2()  argument
5836   SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_EnableIT_CC2()
5845 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC2()  argument
5847   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_DisableIT_CC2()
5856 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC2()  argument
5858   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC2()
5867 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC3()  argument
5869   SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_EnableIT_CC3()
5878 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC3()  argument
5880   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_DisableIT_CC3()
5889 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC3()  argument
5891   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC3()
5900 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC4()  argument
5902   SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_EnableIT_CC4()
5911 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC4()  argument
5913   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_DisableIT_CC4()
5922 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC4()  argument
5924   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC4()
5933 __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_COM()  argument
5935   SET_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_EnableIT_COM()
5944 __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_COM()  argument
5946   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_DisableIT_COM()
5955 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_COM()  argument
5957   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_COM()
5966 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TRIG()  argument
5968   SET_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_EnableIT_TRIG()
5977 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TRIG()  argument
5979   CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_DisableIT_TRIG()
5988 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TRIG()  argument
5990   return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TRIG()
5999 __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_BRK()  argument
6001   SET_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_EnableIT_BRK()
6010 __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_BRK()  argument
6012   CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_DisableIT_BRK()
6021 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_BRK()  argument
6023   return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_BRK()
6034 __STATIC_INLINE void LL_TIM_EnableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TERR()  argument
6036   SET_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_EnableIT_TERR()
6047 __STATIC_INLINE void LL_TIM_DisableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TERR()  argument
6049   CLEAR_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_DisableIT_TERR()
6060 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TERR()  argument
6062   return ((READ_BIT(TIMx->DIER, TIM_DIER_TERRIE) == (TIM_DIER_TERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TERR()
6073 __STATIC_INLINE void LL_TIM_EnableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IERR()  argument
6075   SET_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_EnableIT_IERR()
6086 __STATIC_INLINE void LL_TIM_DisableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IERR()  argument
6088   CLEAR_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_DisableIT_IERR()
6099 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IERR()  argument
6101   return ((READ_BIT(TIMx->DIER, TIM_DIER_IERRIE) == (TIM_DIER_IERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IERR()
6112 __STATIC_INLINE void LL_TIM_EnableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_DIR()  argument
6114   SET_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_EnableIT_DIR()
6125 __STATIC_INLINE void LL_TIM_DisableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_DIR()  argument
6127   CLEAR_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_DisableIT_DIR()
6138 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_DIR()  argument
6140   return ((READ_BIT(TIMx->DIER, TIM_DIER_DIRIE) == (TIM_DIER_DIRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_DIR()
6151 __STATIC_INLINE void LL_TIM_EnableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IDX()  argument
6153   SET_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_EnableIT_IDX()
6164 __STATIC_INLINE void LL_TIM_DisableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IDX()  argument
6166   CLEAR_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_DisableIT_IDX()
6177 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IDX()  argument
6179   return ((READ_BIT(TIMx->DIER, TIM_DIER_IDXIE) == (TIM_DIER_IDXIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IDX()
6195 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_UPDATE()  argument
6197   SET_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_EnableDMAReq_UPDATE()
6206 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_UPDATE()  argument
6208   CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_DisableDMAReq_UPDATE()
6217 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_UPDATE()  argument
6219   return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_UPDATE()
6228 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC1()  argument
6230   SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_EnableDMAReq_CC1()
6239 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC1()  argument
6241   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_DisableDMAReq_CC1()
6250 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC1()  argument
6252   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC1()
6261 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC2()  argument
6263   SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_EnableDMAReq_CC2()
6272 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC2()  argument
6274   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_DisableDMAReq_CC2()
6283 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC2()  argument
6285   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC2()
6294 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC3()  argument
6296   SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_EnableDMAReq_CC3()
6305 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC3()  argument
6307   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_DisableDMAReq_CC3()
6316 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC3()  argument
6318   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC3()
6327 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC4()  argument
6329   SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_EnableDMAReq_CC4()
6338 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC4()  argument
6340   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_DisableDMAReq_CC4()
6349 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC4()  argument
6351   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC4()
6360 __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_COM()  argument
6362   SET_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_EnableDMAReq_COM()
6371 __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_COM()  argument
6373   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_DisableDMAReq_COM()
6382 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_COM()  argument
6384   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_COM()
6393 __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_TRIG()  argument
6395   SET_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_EnableDMAReq_TRIG()
6404 __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_TRIG()  argument
6406   CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_DisableDMAReq_TRIG()
6415 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_TRIG()  argument
6417   return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_TRIG()
6433 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_UPDATE()  argument
6435   SET_BIT(TIMx->EGR, TIM_EGR_UG);  in LL_TIM_GenerateEvent_UPDATE()
6444 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC1()  argument
6446   SET_BIT(TIMx->EGR, TIM_EGR_CC1G);  in LL_TIM_GenerateEvent_CC1()
6455 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC2()  argument
6457   SET_BIT(TIMx->EGR, TIM_EGR_CC2G);  in LL_TIM_GenerateEvent_CC2()
6466 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC3()  argument
6468   SET_BIT(TIMx->EGR, TIM_EGR_CC3G);  in LL_TIM_GenerateEvent_CC3()
6477 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC4()  argument
6479   SET_BIT(TIMx->EGR, TIM_EGR_CC4G);  in LL_TIM_GenerateEvent_CC4()
6488 __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_COM()  argument
6490   SET_BIT(TIMx->EGR, TIM_EGR_COMG);  in LL_TIM_GenerateEvent_COM()
6499 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_TRIG()  argument
6501   SET_BIT(TIMx->EGR, TIM_EGR_TG);  in LL_TIM_GenerateEvent_TRIG()
6510 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK()  argument
6512   SET_BIT(TIMx->EGR, TIM_EGR_BG);  in LL_TIM_GenerateEvent_BRK()
6521 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK2()  argument
6523   SET_BIT(TIMx->EGR, TIM_EGR_B2G);  in LL_TIM_GenerateEvent_BRK2()
6535 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
6537 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
6539 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
6541 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
6543 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…
6545 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_Hall…
6547 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);