1747 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)  in LL_TIM_EnableCounter()  argument
1749   SET_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_EnableCounter()
1758 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)  in LL_TIM_DisableCounter()  argument
1760   CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_DisableCounter()
1769 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledCounter()  argument
1771   return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledCounter()
1780 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_EnableUpdateEvent()  argument
1782   CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_EnableUpdateEvent()
1791 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_DisableUpdateEvent()  argument
1793   SET_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_DisableUpdateEvent()
1802 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledUpdateEvent()  argument
1804   return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);  in LL_TIM_IsEnabledUpdateEvent()
1823 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)  in LL_TIM_SetUpdateSource()  argument
1825   MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);  in LL_TIM_SetUpdateSource()
1836 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetUpdateSource()  argument
1838   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));  in LL_TIM_GetUpdateSource()
1850 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)  in LL_TIM_SetOnePulseMode()  argument
1852   MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);  in LL_TIM_SetOnePulseMode()
1863 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetOnePulseMode()  argument
1865   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));  in LL_TIM_GetOnePulseMode()
1887 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)  in LL_TIM_SetCounterMode()  argument
1889   MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);  in LL_TIM_SetCounterMode()
1907 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounterMode()  argument
1911   counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));  in LL_TIM_GetCounterMode()
1915     counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetCounterMode()
1927 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableARRPreload()  argument
1929   SET_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_EnableARRPreload()
1938 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableARRPreload()  argument
1940   CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_DisableARRPreload()
1949 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledARRPreload()  argument
1951   return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledARRPreload()
1968 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)  in LL_TIM_SetClockDivision()  argument
1970   MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);  in LL_TIM_SetClockDivision()
1986 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)  in LL_TIM_GetClockDivision()  argument
1988   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));  in LL_TIM_GetClockDivision()
2001 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)  in LL_TIM_SetCounter()  argument
2003   WRITE_REG(TIMx->CNT, Counter);  in LL_TIM_SetCounter()
2015 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounter()  argument
2017   return (uint32_t)(READ_REG(TIMx->CNT));  in LL_TIM_GetCounter()
2028 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetDirection()  argument
2030   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetDirection()
2044 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)  in LL_TIM_SetPrescaler()  argument
2046   WRITE_REG(TIMx->PSC, Prescaler);  in LL_TIM_SetPrescaler()
2055 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_GetPrescaler()  argument
2057   return (uint32_t)(READ_REG(TIMx->PSC));  in LL_TIM_GetPrescaler()
2073 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)  in LL_TIM_SetAutoReload()  argument
2075   WRITE_REG(TIMx->ARR, AutoReload);  in LL_TIM_SetAutoReload()
2087 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)  in LL_TIM_GetAutoReload()  argument
2089   return (uint32_t)(READ_REG(TIMx->ARR));  in LL_TIM_GetAutoReload()
2102 __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)  in LL_TIM_SetRepetitionCounter()  argument
2104   WRITE_REG(TIMx->RCR, RepetitionCounter);  in LL_TIM_SetRepetitionCounter()
2115 __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetRepetitionCounter()  argument
2117   return (uint32_t)(READ_REG(TIMx->RCR));  in LL_TIM_GetRepetitionCounter()
2128 __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_EnableUIFRemap()  argument
2130   SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_EnableUIFRemap()
2139 __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_DisableUIFRemap()  argument
2141   CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_DisableUIFRemap()
2162 __STATIC_INLINE void LL_TIM_EnableDithering(TIM_TypeDef *TIMx)  in LL_TIM_EnableDithering()  argument
2164   SET_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_EnableDithering()
2175 __STATIC_INLINE void LL_TIM_DisableDithering(TIM_TypeDef *TIMx)  in LL_TIM_DisableDithering()  argument
2177   CLEAR_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_DisableDithering()
2188 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDithering(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDithering()  argument
2190   return ((READ_BIT(TIMx->CR1, TIM_CR1_DITHEN) == (TIM_CR1_DITHEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDithering()
2211 __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_EnablePreload()  argument
2213   SET_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_EnablePreload()
2224 __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_DisablePreload()  argument
2226   CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_DisablePreload()
2235 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)  in LL_TIM_CC_IsEnabledPreload()  argument
2237   return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledPreload()
2251 __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)  in LL_TIM_CC_SetUpdate()  argument
2253   MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);  in LL_TIM_CC_SetUpdate()
2265 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)  in LL_TIM_CC_SetDMAReqTrigger()  argument
2267   MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);  in LL_TIM_CC_SetDMAReqTrigger()
2278 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)  in LL_TIM_CC_GetDMAReqTrigger()  argument
2280   return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));  in LL_TIM_CC_GetDMAReqTrigger()
2297 __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)  in LL_TIM_CC_SetLockLevel()  argument
2299   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);  in LL_TIM_CC_SetLockLevel()
2328 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_EnableChannel()  argument
2330   SET_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_EnableChannel()
2359 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_DisableChannel()  argument
2361   CLEAR_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_DisableChannel()
2390 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_IsEnabledChannel()  argument
2392   return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledChannel()
2435 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura…  in LL_TIM_OC_ConfigOutput()  argument
2438 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_ConfigOutput()
2440   MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_OC_ConfigOutput()
2442   MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  in LL_TIM_OC_ConfigOutput()
2482 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)  in LL_TIM_OC_SetMode()  argument
2485 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_SetMode()
2523 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetMode()  argument
2526 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_GetMode()
2559 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)  in LL_TIM_OC_SetPolarity()  argument
2562 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iC…  in LL_TIM_OC_SetPolarity()
2593 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetPolarity()  argument
2596 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann…  in LL_TIM_OC_GetPolarity()
2632 __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)  in LL_TIM_OC_SetIdleState()  argument
2635 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  IdleState << SHIFT_TAB_OISx[iCh…  in LL_TIM_OC_SetIdleState()
2666 __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetIdleState()  argument
2669 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel…  in LL_TIM_OC_GetIdleState()
2691 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableFast()  argument
2694 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableFast()
2717 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableFast()  argument
2720 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableFast()
2743 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledFast()  argument
2746 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledFast()
2769 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnablePreload()  argument
2772 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnablePreload()
2794 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisablePreload()  argument
2797 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisablePreload()
2819 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledPreload()  argument
2822 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledPreload()
2848 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableClear()  argument
2851 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableClear()
2875 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableClear()  argument
2878 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableClear()
2904 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledClear()  argument
2907 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledClear()
2923 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_OC_SetDeadTime()  argument
2925   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);  in LL_TIM_OC_SetDeadTime()
2941 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH1()  argument
2943   WRITE_REG(TIMx->CCR1, CompareValue);  in LL_TIM_OC_SetCompareCH1()
2959 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH2()  argument
2961   WRITE_REG(TIMx->CCR2, CompareValue);  in LL_TIM_OC_SetCompareCH2()
2977 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH3()  argument
2979   WRITE_REG(TIMx->CCR3, CompareValue);  in LL_TIM_OC_SetCompareCH3()
2995 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH4()  argument
2997   WRITE_REG(TIMx->CCR4, CompareValue);  in LL_TIM_OC_SetCompareCH4()
3010 __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH5()  argument
3012   MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);  in LL_TIM_OC_SetCompareCH5()
3025 __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH6()  argument
3027   WRITE_REG(TIMx->CCR6, CompareValue);  in LL_TIM_OC_SetCompareCH6()
3042 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH1()  argument
3044   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_OC_GetCompareCH1()
3059 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH2()  argument
3061   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_OC_GetCompareCH2()
3076 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH3()  argument
3078   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_OC_GetCompareCH3()
3093 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH4()  argument
3095   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_OC_GetCompareCH4()
3107 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH5()  argument
3109   return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));  in LL_TIM_OC_GetCompareCH5()
3121 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH6()  argument
3123   return (uint32_t)(READ_REG(TIMx->CCR6));  in LL_TIM_OC_GetCompareCH6()
3141 __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)  in LL_TIM_SetCH5CombinedChannels()  argument
3143   MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);  in LL_TIM_SetCH5CombinedChannels()
3164 __STATIC_INLINE void LL_TIM_OC_SetPulseWidthPrescaler(TIM_TypeDef *TIMx, uint32_t PulseWidthPrescal…  in LL_TIM_OC_SetPulseWidthPrescaler()  argument
3166   MODIFY_REG(TIMx->ECR, TIM_ECR_PWPRSC, PulseWidthPrescaler);  in LL_TIM_OC_SetPulseWidthPrescaler()
3186 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidthPrescaler()  argument
3188   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PWPRSC));  in LL_TIM_OC_GetPulseWidthPrescaler()
3201 __STATIC_INLINE void LL_TIM_OC_SetPulseWidth(TIM_TypeDef *TIMx, uint32_t PulseWidth)  in LL_TIM_OC_SetPulseWidth()  argument
3203   MODIFY_REG(TIMx->ECR, TIM_ECR_PW, PulseWidth << TIM_ECR_PW_Pos);  in LL_TIM_OC_SetPulseWidth()
3215 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidth(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidth()  argument
3217   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PW));  in LL_TIM_OC_GetPulseWidth()
3262 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)  in LL_TIM_IC_Config()  argument
3265 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_Config()
3269   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_Config()
3291 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv…  in LL_TIM_IC_SetActiveInput()  argument
3294 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetActiveInput()
3315 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetActiveInput()  argument
3318 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetActiveInput()
3341 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal…  in LL_TIM_IC_SetPrescaler()  argument
3344 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetPrescaler()
3366 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPrescaler()  argument
3369 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetPrescaler()
3404 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)  in LL_TIM_IC_SetFilter()  argument
3407 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetFilter()
3441 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetFilter()  argument
3444 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetFilter()
3470 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)  in LL_TIM_IC_SetPolarity()  argument
3473   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_SetPolarity()
3498 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPolarity()  argument
3501   return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>  in LL_TIM_IC_GetPolarity()
3513 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_EnableXORCombination()  argument
3515   SET_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_EnableXORCombination()
3526 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_DisableXORCombination()  argument
3528   CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_DisableXORCombination()
3539 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)  in LL_TIM_IC_IsEnabledXORCombination()  argument
3541   return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);  in LL_TIM_IC_IsEnabledXORCombination()
3556 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH1()  argument
3558   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_IC_GetCaptureCH1()
3573 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH2()  argument
3575   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_IC_GetCaptureCH2()
3590 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH3()  argument
3592   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_IC_GetCaptureCH3()
3607 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH4()  argument
3609   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_IC_GetCaptureCH4()
3628 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_EnableExternalClock()  argument
3630   SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_EnableExternalClock()
3641 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_DisableExternalClock()  argument
3643   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_DisableExternalClock()
3654 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledExternalClock()  argument
3656   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledExternalClock()
3678 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)  in LL_TIM_SetClockSource()  argument
3680   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);  in LL_TIM_SetClockSource()
3701 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)  in LL_TIM_SetEncoderMode()  argument
3703   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);  in LL_TIM_SetEncoderMode()
3731 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)  in LL_TIM_SetTriggerOutput()  argument
3733   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);  in LL_TIM_SetTriggerOutput()
3761 __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)  in LL_TIM_SetTriggerOutput2()  argument
3763   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);  in LL_TIM_SetTriggerOutput2()
3781 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)  in LL_TIM_SetSlaveMode()  argument
3783   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);  in LL_TIM_SetSlaveMode()
3813 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)  in LL_TIM_SetTriggerInput()  argument
3815   MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);  in LL_TIM_SetTriggerInput()
3826 __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_EnableMasterSlaveMode()  argument
3828   SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_EnableMasterSlaveMode()
3839 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_DisableMasterSlaveMode()  argument
3841   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_DisableMasterSlaveMode()
3852 __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledMasterSlaveMode()  argument
3854   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);  in LL_TIM_IsEnabledMasterSlaveMode()
3892 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale…  in LL_TIM_ConfigETR()  argument
3895 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E…  in LL_TIM_ConfigETR()
3980 __STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)  in LL_TIM_SetETRSource()  argument
3982   MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource);  in LL_TIM_SetETRSource()
3993 __STATIC_INLINE void LL_TIM_EnableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableSMSPreload()  argument
3995   SET_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_EnableSMSPreload()
4006 __STATIC_INLINE void LL_TIM_DisableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableSMSPreload()  argument
4008   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_DisableSMSPreload()
4019 __STATIC_INLINE uint32_t LL_TIM_IsEnabledSMSPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledSMSPreload()  argument
4021   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPE) == (TIM_SMCR_SMSPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledSMSPreload()
4035 __STATIC_INLINE void LL_TIM_SetSMSPreloadSource(TIM_TypeDef *TIMx, uint32_t PreloadSource)  in LL_TIM_SetSMSPreloadSource()  argument
4037   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMSPS, PreloadSource);  in LL_TIM_SetSMSPreloadSource()
4050 __STATIC_INLINE uint32_t LL_TIM_GetSMSPreloadSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetSMSPreloadSource()  argument
4052   return (uint32_t)(READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPS));  in LL_TIM_GetSMSPreloadSource()
4064 __STATIC_INLINE void LL_TIM_EnableADCSynchronization(TIM_TypeDef *TIMx)  in LL_TIM_EnableADCSynchronization()  argument
4066   SET_BIT(TIMx->CR2, TIM_CR2_ADSYNC);  in LL_TIM_EnableADCSynchronization()
4077 __STATIC_INLINE void LL_TIM_DisableADCSynchronization(TIM_TypeDef *TIMx)  in LL_TIM_DisableADCSynchronization()  argument
4079   CLEAR_BIT(TIMx->CR2, TIM_CR2_ADSYNC);  in LL_TIM_DisableADCSynchronization()
4090 __STATIC_INLINE uint32_t LL_TIM_IsEnabledADCSynchronization(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledADCSynchronization()  argument
4092   return ((READ_BIT(TIMx->CR2, TIM_CR2_ADSYNC) == (TIM_CR2_ADSYNC)) ? 1UL : 0UL);  in LL_TIM_IsEnabledADCSynchronization()
4110 __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK()  argument
4113   SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_EnableBRK()
4115   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK()
4127 __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK()  argument
4130   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_DisableBRK()
4132   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK()
4178 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilt…  in LL_TIM_ConfigBRK()  argument
4182 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |…  in LL_TIM_ConfigBRK()
4184   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK()
4198 __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK()  argument
4200   SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);  in LL_TIM_DisarmBRK()
4211 __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK2()  argument
4214   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_EnableBRK2()
4216   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK2()
4228 __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK2()  argument
4231   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_DisableBRK2()
4233   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK2()
4279 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F…  in LL_TIM_ConfigBRK2()  argument
4283 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil…  in LL_TIM_ConfigBRK2()
4285   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK2()
4299 __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK2()  argument
4301   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);  in LL_TIM_DisarmBRK2()
4319 __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat…  in LL_TIM_SetOffStates()  argument
4321   MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);  in LL_TIM_SetOffStates()
4332 __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_EnableAutomaticOutput()  argument
4334   SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_EnableAutomaticOutput()
4345 __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_DisableAutomaticOutput()  argument
4347   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_DisableAutomaticOutput()
4358 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAutomaticOutput()  argument
4360   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAutomaticOutput()
4373 __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_EnableAllOutputs()  argument
4375   SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_EnableAllOutputs()
4388 __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_DisableAllOutputs()  argument
4390   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_DisableAllOutputs()
4401 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAllOutputs()  argument
4403   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAllOutputs()
4423 __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t…  in LL_TIM_EnableBreakInputSource()  argument
4425   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_EnableBreakInputSource()
4446 __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_…  in LL_TIM_DisableBreakInputSource()  argument
4448   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_DisableBreakInputSource()
4469 __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin…  in LL_TIM_SetBreakInputSourcePolarity()  argument
4472   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_SetBreakInputSourcePolarity()
4483 __STATIC_INLINE void LL_TIM_EnableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_EnableAsymmetricalDeadTime()  argument
4485   SET_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_EnableAsymmetricalDeadTime()
4496 __STATIC_INLINE void LL_TIM_DisableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_DisableAsymmetricalDeadTime()  argument
4498   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_DisableAsymmetricalDeadTime()
4509 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAsymmetricalDeadTime()  argument
4511   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTAE) == (TIM_DTR2_DTAE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAsymmetricalDeadTime()
4527 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_SetFallingDeadTime()  argument
4529   MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime);  in LL_TIM_SetFallingDeadTime()
4543 __STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_GetFallingDeadTime()  argument
4545   return (uint32_t)(READ_BIT(TIMx->DTR2, TIM_DTR2_DTGF));  in LL_TIM_GetFallingDeadTime()
4556 __STATIC_INLINE void LL_TIM_EnableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableDeadTimePreload()  argument
4558   SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_EnableDeadTimePreload()
4569 __STATIC_INLINE void LL_TIM_DisableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableDeadTimePreload()  argument
4571   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_DisableDeadTimePreload()
4582 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDeadTimePreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDeadTimePreload()  argument
4584   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDeadTimePreload()
4665 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_…  in LL_TIM_ConfigDMABurst()  argument
4668   MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA | TIM_DCR_DBSS),  in LL_TIM_ConfigDMABurst()
4688 __STATIC_INLINE void LL_TIM_EnableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableEncoderIndex()  argument
4690   SET_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_EnableEncoderIndex()
4701 __STATIC_INLINE void LL_TIM_DisableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableEncoderIndex()  argument
4703   CLEAR_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_DisableEncoderIndex()
4714 __STATIC_INLINE uint32_t LL_TIM_IsEnabledEncoderIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledEncoderIndex()  argument
4716   return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U);  in LL_TIM_IsEnabledEncoderIndex()
4731 __STATIC_INLINE void LL_TIM_SetIndexDirection(TIM_TypeDef *TIMx, uint32_t IndexDirection)  in LL_TIM_SetIndexDirection()  argument
4733   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR, IndexDirection);  in LL_TIM_SetIndexDirection()
4747 __STATIC_INLINE uint32_t LL_TIM_GetIndexDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexDirection()  argument
4749   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IDIR));  in LL_TIM_GetIndexDirection()
4764 __STATIC_INLINE void LL_TIM_SetIndexblanking(TIM_TypeDef *TIMx, uint32_t Indexblanking)  in LL_TIM_SetIndexblanking()  argument
4766   MODIFY_REG(TIMx->ECR, TIM_ECR_IBLK, Indexblanking);  in LL_TIM_SetIndexblanking()
4780 __STATIC_INLINE uint32_t LL_TIM_GetIndexblanking(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexblanking()  argument
4782   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IBLK));  in LL_TIM_GetIndexblanking()
4794 __STATIC_INLINE void LL_TIM_EnableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableFirstIndex()  argument
4796   SET_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_EnableFirstIndex()
4807 __STATIC_INLINE void LL_TIM_DisableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableFirstIndex()  argument
4809   CLEAR_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_DisableFirstIndex()
4820 __STATIC_INLINE uint32_t LL_TIM_IsEnabledFirstIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledFirstIndex()  argument
4822   return ((READ_BIT(TIMx->ECR, TIM_ECR_FIDX) == (TIM_ECR_FIDX)) ? 1UL : 0UL);  in LL_TIM_IsEnabledFirstIndex()
4840 __STATIC_INLINE void LL_TIM_SetIndexPositionning(TIM_TypeDef *TIMx, uint32_t IndexPositionning)  in LL_TIM_SetIndexPositionning()  argument
4842   MODIFY_REG(TIMx->ECR, TIM_ECR_IPOS, IndexPositionning);  in LL_TIM_SetIndexPositionning()
4859 __STATIC_INLINE uint32_t LL_TIM_GetIndexPositionning(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexPositionning()  argument
4861   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IPOS));  in LL_TIM_GetIndexPositionning()
4880 __STATIC_INLINE void LL_TIM_ConfigIDX(TIM_TypeDef *TIMx, uint32_t Configuration)  in LL_TIM_ConfigIDX()  argument
4882   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR | TIM_ECR_IBLK | TIM_ECR_FIDX | TIM_ECR_IPOS, Configuration);  in LL_TIM_ConfigIDX()
4985 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)  in LL_TIM_SetRemap()  argument
4987 …MODIFY_REG(TIMx->TISEL, (TIM_TISEL_TI1SEL | TIM_TISEL_TI2SEL | TIM_TISEL_TI3SEL | TIM_TISEL_TI4SEL…  in LL_TIM_SetRemap()
5003 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_UPDATE()  argument
5005   WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));  in LL_TIM_ClearFlag_UPDATE()
5014 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_UPDATE()  argument
5016   return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_UPDATE()
5025 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1()  argument
5027   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));  in LL_TIM_ClearFlag_CC1()
5036 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1()  argument
5038   return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1()
5047 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2()  argument
5049   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));  in LL_TIM_ClearFlag_CC2()
5058 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2()  argument
5060   return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2()
5069 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3()  argument
5071   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));  in LL_TIM_ClearFlag_CC3()
5080 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3()  argument
5082   return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3()
5091 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4()  argument
5093   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));  in LL_TIM_ClearFlag_CC4()
5102 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4()  argument
5104   return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4()
5113 __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC5()  argument
5115   WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));  in LL_TIM_ClearFlag_CC5()
5124 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC5()  argument
5126   return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC5()
5135 __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC6()  argument
5137   WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));  in LL_TIM_ClearFlag_CC6()
5146 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC6()  argument
5148   return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC6()
5157 __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_COM()  argument
5159   WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));  in LL_TIM_ClearFlag_COM()
5168 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_COM()  argument
5170   return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_COM()
5179 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TRIG()  argument
5181   WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));  in LL_TIM_ClearFlag_TRIG()
5190 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TRIG()  argument
5192   return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TRIG()
5201 __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK()  argument
5203   WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));  in LL_TIM_ClearFlag_BRK()
5212 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK()  argument
5214   return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK()
5223 __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK2()  argument
5225   WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));  in LL_TIM_ClearFlag_BRK2()
5234 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK2()  argument
5236   return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK2()
5245 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1OVR()  argument
5247   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));  in LL_TIM_ClearFlag_CC1OVR()
5257 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1OVR()  argument
5259   return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1OVR()
5268 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2OVR()  argument
5270   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));  in LL_TIM_ClearFlag_CC2OVR()
5280 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2OVR()  argument
5282   return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2OVR()
5291 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3OVR()  argument
5293   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));  in LL_TIM_ClearFlag_CC3OVR()
5303 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3OVR()  argument
5305   return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3OVR()
5314 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4OVR()  argument
5316   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));  in LL_TIM_ClearFlag_CC4OVR()
5326 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4OVR()  argument
5328   return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4OVR()
5337 __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_SYSBRK()  argument
5339   WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));  in LL_TIM_ClearFlag_SYSBRK()
5348 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_SYSBRK()  argument
5350   return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_SYSBRK()
5361 __STATIC_INLINE void LL_TIM_ClearFlag_TERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TERR()  argument
5363   WRITE_REG(TIMx->SR, ~(TIM_SR_TERRF));  in LL_TIM_ClearFlag_TERR()
5374 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TERR()  argument
5376   return ((READ_BIT(TIMx->SR, TIM_SR_TERRF) == (TIM_SR_TERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TERR()
5387 __STATIC_INLINE void LL_TIM_ClearFlag_IERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IERR()  argument
5389   WRITE_REG(TIMx->SR, ~(TIM_SR_IERRF));  in LL_TIM_ClearFlag_IERR()
5400 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IERR()  argument
5402   return ((READ_BIT(TIMx->SR, TIM_SR_IERRF) == (TIM_SR_IERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IERR()
5413 __STATIC_INLINE void LL_TIM_ClearFlag_DIR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_DIR()  argument
5415   WRITE_REG(TIMx->SR, ~(TIM_SR_DIRF));  in LL_TIM_ClearFlag_DIR()
5426 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_DIR()  argument
5428   return ((READ_BIT(TIMx->SR, TIM_SR_DIRF) == (TIM_SR_DIRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_DIR()
5439 __STATIC_INLINE void LL_TIM_ClearFlag_IDX(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IDX()  argument
5441   WRITE_REG(TIMx->SR, ~(TIM_SR_IDXF));  in LL_TIM_ClearFlag_IDX()
5452 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IDX()  argument
5454   return ((READ_BIT(TIMx->SR, TIM_SR_IDXF) == (TIM_SR_IDXF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IDX()
5469 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_UPDATE()  argument
5471   SET_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_EnableIT_UPDATE()
5480 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_UPDATE()  argument
5482   CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_DisableIT_UPDATE()
5491 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_UPDATE()  argument
5493   return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_UPDATE()
5502 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC1()  argument
5504   SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_EnableIT_CC1()
5513 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC1()  argument
5515   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_DisableIT_CC1()
5524 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC1()  argument
5526   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC1()
5535 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC2()  argument
5537   SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_EnableIT_CC2()
5546 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC2()  argument
5548   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_DisableIT_CC2()
5557 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC2()  argument
5559   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC2()
5568 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC3()  argument
5570   SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_EnableIT_CC3()
5579 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC3()  argument
5581   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_DisableIT_CC3()
5590 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC3()  argument
5592   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC3()
5601 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC4()  argument
5603   SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_EnableIT_CC4()
5612 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC4()  argument
5614   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_DisableIT_CC4()
5623 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC4()  argument
5625   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC4()
5634 __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_COM()  argument
5636   SET_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_EnableIT_COM()
5645 __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_COM()  argument
5647   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_DisableIT_COM()
5656 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_COM()  argument
5658   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_COM()
5667 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TRIG()  argument
5669   SET_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_EnableIT_TRIG()
5678 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TRIG()  argument
5680   CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_DisableIT_TRIG()
5689 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TRIG()  argument
5691   return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TRIG()
5700 __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_BRK()  argument
5702   SET_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_EnableIT_BRK()
5711 __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_BRK()  argument
5713   CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_DisableIT_BRK()
5722 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_BRK()  argument
5724   return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_BRK()
5735 __STATIC_INLINE void LL_TIM_EnableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TERR()  argument
5737   SET_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_EnableIT_TERR()
5748 __STATIC_INLINE void LL_TIM_DisableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TERR()  argument
5750   CLEAR_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_DisableIT_TERR()
5761 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TERR()  argument
5763   return ((READ_BIT(TIMx->DIER, TIM_DIER_TERRIE) == (TIM_DIER_TERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TERR()
5774 __STATIC_INLINE void LL_TIM_EnableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IERR()  argument
5776   SET_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_EnableIT_IERR()
5787 __STATIC_INLINE void LL_TIM_DisableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IERR()  argument
5789   CLEAR_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_DisableIT_IERR()
5800 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IERR()  argument
5802   return ((READ_BIT(TIMx->DIER, TIM_DIER_IERRIE) == (TIM_DIER_IERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IERR()
5813 __STATIC_INLINE void LL_TIM_EnableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_DIR()  argument
5815   SET_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_EnableIT_DIR()
5826 __STATIC_INLINE void LL_TIM_DisableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_DIR()  argument
5828   CLEAR_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_DisableIT_DIR()
5839 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_DIR()  argument
5841   return ((READ_BIT(TIMx->DIER, TIM_DIER_DIRIE) == (TIM_DIER_DIRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_DIR()
5852 __STATIC_INLINE void LL_TIM_EnableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IDX()  argument
5854   SET_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_EnableIT_IDX()
5865 __STATIC_INLINE void LL_TIM_DisableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IDX()  argument
5867   CLEAR_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_DisableIT_IDX()
5878 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IDX()  argument
5880   return ((READ_BIT(TIMx->DIER, TIM_DIER_IDXIE) == (TIM_DIER_IDXIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IDX()
5896 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_UPDATE()  argument
5898   SET_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_EnableDMAReq_UPDATE()
5907 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_UPDATE()  argument
5909   CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_DisableDMAReq_UPDATE()
5918 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_UPDATE()  argument
5920   return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_UPDATE()
5929 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC1()  argument
5931   SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_EnableDMAReq_CC1()
5940 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC1()  argument
5942   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_DisableDMAReq_CC1()
5951 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC1()  argument
5953   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC1()
5962 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC2()  argument
5964   SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_EnableDMAReq_CC2()
5973 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC2()  argument
5975   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_DisableDMAReq_CC2()
5984 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC2()  argument
5986   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC2()
5995 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC3()  argument
5997   SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_EnableDMAReq_CC3()
6006 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC3()  argument
6008   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_DisableDMAReq_CC3()
6017 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC3()  argument
6019   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC3()
6028 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC4()  argument
6030   SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_EnableDMAReq_CC4()
6039 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC4()  argument
6041   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_DisableDMAReq_CC4()
6050 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC4()  argument
6052   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC4()
6061 __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_COM()  argument
6063   SET_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_EnableDMAReq_COM()
6072 __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_COM()  argument
6074   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_DisableDMAReq_COM()
6083 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_COM()  argument
6085   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_COM()
6094 __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_TRIG()  argument
6096   SET_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_EnableDMAReq_TRIG()
6105 __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_TRIG()  argument
6107   CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_DisableDMAReq_TRIG()
6116 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_TRIG()  argument
6118   return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_TRIG()
6134 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_UPDATE()  argument
6136   SET_BIT(TIMx->EGR, TIM_EGR_UG);  in LL_TIM_GenerateEvent_UPDATE()
6145 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC1()  argument
6147   SET_BIT(TIMx->EGR, TIM_EGR_CC1G);  in LL_TIM_GenerateEvent_CC1()
6156 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC2()  argument
6158   SET_BIT(TIMx->EGR, TIM_EGR_CC2G);  in LL_TIM_GenerateEvent_CC2()
6167 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC3()  argument
6169   SET_BIT(TIMx->EGR, TIM_EGR_CC3G);  in LL_TIM_GenerateEvent_CC3()
6178 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC4()  argument
6180   SET_BIT(TIMx->EGR, TIM_EGR_CC4G);  in LL_TIM_GenerateEvent_CC4()
6189 __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_COM()  argument
6191   SET_BIT(TIMx->EGR, TIM_EGR_COMG);  in LL_TIM_GenerateEvent_COM()
6200 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_TRIG()  argument
6202   SET_BIT(TIMx->EGR, TIM_EGR_TG);  in LL_TIM_GenerateEvent_TRIG()
6211 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK()  argument
6213   SET_BIT(TIMx->EGR, TIM_EGR_BG);  in LL_TIM_GenerateEvent_BRK()
6222 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK2()  argument
6224   SET_BIT(TIMx->EGR, TIM_EGR_B2G);  in LL_TIM_GenerateEvent_BRK2()
6236 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
6238 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
6240 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
6242 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
6244 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…
6246 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_Hall…
6248 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);