2023 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)  in LL_TIM_EnableCounter()  argument
2025   SET_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_EnableCounter()
2034 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)  in LL_TIM_DisableCounter()  argument
2036   CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_DisableCounter()
2045 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledCounter()  argument
2047   return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledCounter()
2056 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_EnableUpdateEvent()  argument
2058   CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_EnableUpdateEvent()
2067 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_DisableUpdateEvent()  argument
2069   SET_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_DisableUpdateEvent()
2078 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledUpdateEvent()  argument
2080   return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);  in LL_TIM_IsEnabledUpdateEvent()
2099 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)  in LL_TIM_SetUpdateSource()  argument
2101   MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);  in LL_TIM_SetUpdateSource()
2112 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetUpdateSource()  argument
2114   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));  in LL_TIM_GetUpdateSource()
2126 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)  in LL_TIM_SetOnePulseMode()  argument
2128   MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);  in LL_TIM_SetOnePulseMode()
2139 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetOnePulseMode()  argument
2141   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));  in LL_TIM_GetOnePulseMode()
2163 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)  in LL_TIM_SetCounterMode()  argument
2165   MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);  in LL_TIM_SetCounterMode()
2183 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounterMode()  argument
2187   counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));  in LL_TIM_GetCounterMode()
2191     counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetCounterMode()
2203 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableARRPreload()  argument
2205   SET_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_EnableARRPreload()
2214 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableARRPreload()  argument
2216   CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_DisableARRPreload()
2225 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledARRPreload()  argument
2227   return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledARRPreload()
2244 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)  in LL_TIM_SetClockDivision()  argument
2246   MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);  in LL_TIM_SetClockDivision()
2262 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)  in LL_TIM_GetClockDivision()  argument
2264   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));  in LL_TIM_GetClockDivision()
2277 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)  in LL_TIM_SetCounter()  argument
2279   WRITE_REG(TIMx->CNT, Counter);  in LL_TIM_SetCounter()
2291 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounter()  argument
2293   return (uint32_t)(READ_REG(TIMx->CNT));  in LL_TIM_GetCounter()
2304 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetDirection()  argument
2306   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetDirection()
2320 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)  in LL_TIM_SetPrescaler()  argument
2322   WRITE_REG(TIMx->PSC, Prescaler);  in LL_TIM_SetPrescaler()
2331 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_GetPrescaler()  argument
2333   return (uint32_t)(READ_REG(TIMx->PSC));  in LL_TIM_GetPrescaler()
2349 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)  in LL_TIM_SetAutoReload()  argument
2351   WRITE_REG(TIMx->ARR, AutoReload);  in LL_TIM_SetAutoReload()
2363 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)  in LL_TIM_GetAutoReload()  argument
2365   return (uint32_t)(READ_REG(TIMx->ARR));  in LL_TIM_GetAutoReload()
2378 __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)  in LL_TIM_SetRepetitionCounter()  argument
2380   WRITE_REG(TIMx->RCR, RepetitionCounter);  in LL_TIM_SetRepetitionCounter()
2391 __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetRepetitionCounter()  argument
2393   return (uint32_t)(READ_REG(TIMx->RCR));  in LL_TIM_GetRepetitionCounter()
2404 __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_EnableUIFRemap()  argument
2406   SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_EnableUIFRemap()
2415 __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_DisableUIFRemap()  argument
2417   CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_DisableUIFRemap()
2438 __STATIC_INLINE void LL_TIM_EnableDithering(TIM_TypeDef *TIMx)  in LL_TIM_EnableDithering()  argument
2440   SET_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_EnableDithering()
2451 __STATIC_INLINE void LL_TIM_DisableDithering(TIM_TypeDef *TIMx)  in LL_TIM_DisableDithering()  argument
2453   CLEAR_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_DisableDithering()
2464 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDithering(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDithering()  argument
2466   return ((READ_BIT(TIMx->CR1, TIM_CR1_DITHEN) == (TIM_CR1_DITHEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDithering()
2487 __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_EnablePreload()  argument
2489   SET_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_EnablePreload()
2500 __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_DisablePreload()  argument
2502   CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_DisablePreload()
2511 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)  in LL_TIM_CC_IsEnabledPreload()  argument
2513   return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledPreload()
2527 __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)  in LL_TIM_CC_SetUpdate()  argument
2529   MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);  in LL_TIM_CC_SetUpdate()
2541 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)  in LL_TIM_CC_SetDMAReqTrigger()  argument
2543   MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);  in LL_TIM_CC_SetDMAReqTrigger()
2554 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)  in LL_TIM_CC_GetDMAReqTrigger()  argument
2556   return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));  in LL_TIM_CC_GetDMAReqTrigger()
2573 __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)  in LL_TIM_CC_SetLockLevel()  argument
2575   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);  in LL_TIM_CC_SetLockLevel()
2604 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_EnableChannel()  argument
2606   SET_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_EnableChannel()
2635 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_DisableChannel()  argument
2637   CLEAR_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_DisableChannel()
2666 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_IsEnabledChannel()  argument
2668   return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledChannel()
2711 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura…  in LL_TIM_OC_ConfigOutput()  argument
2714 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_ConfigOutput()
2716   MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_OC_ConfigOutput()
2718   MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  in LL_TIM_OC_ConfigOutput()
2758 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)  in LL_TIM_OC_SetMode()  argument
2761 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_SetMode()
2799 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetMode()  argument
2802 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_GetMode()
2835 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)  in LL_TIM_OC_SetPolarity()  argument
2838 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iC…  in LL_TIM_OC_SetPolarity()
2869 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetPolarity()  argument
2872 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann…  in LL_TIM_OC_GetPolarity()
2908 __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)  in LL_TIM_OC_SetIdleState()  argument
2911 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  IdleState << SHIFT_TAB_OISx[iCh…  in LL_TIM_OC_SetIdleState()
2942 __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetIdleState()  argument
2945 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel…  in LL_TIM_OC_GetIdleState()
2967 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableFast()  argument
2970 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableFast()
2993 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableFast()  argument
2996 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableFast()
3019 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledFast()  argument
3022 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledFast()
3045 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnablePreload()  argument
3048 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnablePreload()
3070 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisablePreload()  argument
3073 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisablePreload()
3095 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledPreload()  argument
3098 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledPreload()
3124 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableClear()  argument
3127 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableClear()
3151 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableClear()  argument
3154 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableClear()
3180 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledClear()  argument
3183 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledClear()
3199 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_OC_SetDeadTime()  argument
3201   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);  in LL_TIM_OC_SetDeadTime()
3217 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH1()  argument
3219   WRITE_REG(TIMx->CCR1, CompareValue);  in LL_TIM_OC_SetCompareCH1()
3235 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH2()  argument
3237   WRITE_REG(TIMx->CCR2, CompareValue);  in LL_TIM_OC_SetCompareCH2()
3253 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH3()  argument
3255   WRITE_REG(TIMx->CCR3, CompareValue);  in LL_TIM_OC_SetCompareCH3()
3271 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH4()  argument
3273   WRITE_REG(TIMx->CCR4, CompareValue);  in LL_TIM_OC_SetCompareCH4()
3286 __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH5()  argument
3288   MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);  in LL_TIM_OC_SetCompareCH5()
3301 __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH6()  argument
3303   WRITE_REG(TIMx->CCR6, CompareValue);  in LL_TIM_OC_SetCompareCH6()
3318 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH1()  argument
3320   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_OC_GetCompareCH1()
3335 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH2()  argument
3337   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_OC_GetCompareCH2()
3352 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH3()  argument
3354   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_OC_GetCompareCH3()
3369 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH4()  argument
3371   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_OC_GetCompareCH4()
3383 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH5()  argument
3385   return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));  in LL_TIM_OC_GetCompareCH5()
3397 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH6()  argument
3399   return (uint32_t)(READ_REG(TIMx->CCR6));  in LL_TIM_OC_GetCompareCH6()
3417 __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)  in LL_TIM_SetCH5CombinedChannels()  argument
3419   MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);  in LL_TIM_SetCH5CombinedChannels()
3440 __STATIC_INLINE void LL_TIM_OC_SetPulseWidthPrescaler(TIM_TypeDef *TIMx, uint32_t PulseWidthPrescal…  in LL_TIM_OC_SetPulseWidthPrescaler()  argument
3442   MODIFY_REG(TIMx->ECR, TIM_ECR_PWPRSC, PulseWidthPrescaler);  in LL_TIM_OC_SetPulseWidthPrescaler()
3462 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidthPrescaler()  argument
3464   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PWPRSC));  in LL_TIM_OC_GetPulseWidthPrescaler()
3477 __STATIC_INLINE void LL_TIM_OC_SetPulseWidth(TIM_TypeDef *TIMx, uint32_t PulseWidth)  in LL_TIM_OC_SetPulseWidth()  argument
3479   MODIFY_REG(TIMx->ECR, TIM_ECR_PW, PulseWidth << TIM_ECR_PW_Pos);  in LL_TIM_OC_SetPulseWidth()
3491 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidth(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidth()  argument
3493   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PW));  in LL_TIM_OC_GetPulseWidth()
3538 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)  in LL_TIM_IC_Config()  argument
3541 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_Config()
3545   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_Config()
3567 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv…  in LL_TIM_IC_SetActiveInput()  argument
3570 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetActiveInput()
3591 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetActiveInput()  argument
3594 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetActiveInput()
3617 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal…  in LL_TIM_IC_SetPrescaler()  argument
3620 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetPrescaler()
3642 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPrescaler()  argument
3645 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetPrescaler()
3680 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)  in LL_TIM_IC_SetFilter()  argument
3683 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetFilter()
3717 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetFilter()  argument
3720 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetFilter()
3746 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)  in LL_TIM_IC_SetPolarity()  argument
3749   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_SetPolarity()
3774 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPolarity()  argument
3777   return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>  in LL_TIM_IC_GetPolarity()
3789 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_EnableXORCombination()  argument
3791   SET_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_EnableXORCombination()
3802 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_DisableXORCombination()  argument
3804   CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_DisableXORCombination()
3815 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)  in LL_TIM_IC_IsEnabledXORCombination()  argument
3817   return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);  in LL_TIM_IC_IsEnabledXORCombination()
3832 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH1()  argument
3834   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_IC_GetCaptureCH1()
3849 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH2()  argument
3851   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_IC_GetCaptureCH2()
3866 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH3()  argument
3868   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_IC_GetCaptureCH3()
3883 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH4()  argument
3885   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_IC_GetCaptureCH4()
3904 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_EnableExternalClock()  argument
3906   SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_EnableExternalClock()
3917 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_DisableExternalClock()  argument
3919   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_DisableExternalClock()
3930 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledExternalClock()  argument
3932   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledExternalClock()
3954 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)  in LL_TIM_SetClockSource()  argument
3956   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);  in LL_TIM_SetClockSource()
3977 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)  in LL_TIM_SetEncoderMode()  argument
3979   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);  in LL_TIM_SetEncoderMode()
4007 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)  in LL_TIM_SetTriggerOutput()  argument
4009   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);  in LL_TIM_SetTriggerOutput()
4037 __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)  in LL_TIM_SetTriggerOutput2()  argument
4039   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);  in LL_TIM_SetTriggerOutput2()
4057 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)  in LL_TIM_SetSlaveMode()  argument
4059   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);  in LL_TIM_SetSlaveMode()
4087 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)  in LL_TIM_SetTriggerInput()  argument
4089   MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);  in LL_TIM_SetTriggerInput()
4100 __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_EnableMasterSlaveMode()  argument
4102   SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_EnableMasterSlaveMode()
4113 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_DisableMasterSlaveMode()  argument
4115   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_DisableMasterSlaveMode()
4126 __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledMasterSlaveMode()  argument
4128   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);  in LL_TIM_IsEnabledMasterSlaveMode()
4166 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale…  in LL_TIM_ConfigETR()  argument
4169 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E…  in LL_TIM_ConfigETR()
4294 __STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)  in LL_TIM_SetETRSource()  argument
4296   MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource);  in LL_TIM_SetETRSource()
4307 __STATIC_INLINE void LL_TIM_EnableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableSMSPreload()  argument
4309   SET_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_EnableSMSPreload()
4320 __STATIC_INLINE void LL_TIM_DisableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableSMSPreload()  argument
4322   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_DisableSMSPreload()
4333 __STATIC_INLINE uint32_t LL_TIM_IsEnabledSMSPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledSMSPreload()  argument
4335   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPE) == (TIM_SMCR_SMSPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledSMSPreload()
4349 __STATIC_INLINE void LL_TIM_SetSMSPreloadSource(TIM_TypeDef *TIMx, uint32_t PreloadSource)  in LL_TIM_SetSMSPreloadSource()  argument
4351   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMSPS, PreloadSource);  in LL_TIM_SetSMSPreloadSource()
4364 __STATIC_INLINE uint32_t LL_TIM_GetSMSPreloadSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetSMSPreloadSource()  argument
4366   return (uint32_t)(READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPS));  in LL_TIM_GetSMSPreloadSource()
4384 __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK()  argument
4386   SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_EnableBRK()
4397 __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK()  argument
4399   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_DisableBRK()
4444 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilt…  in LL_TIM_ConfigBRK()  argument
4447 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |…  in LL_TIM_ConfigBRK()
4460 __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK()  argument
4462   SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);  in LL_TIM_DisarmBRK()
4473 __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK2()  argument
4475   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_EnableBRK2()
4486 __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK2()  argument
4488   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_DisableBRK2()
4533 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F…  in LL_TIM_ConfigBRK2()  argument
4536 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil…  in LL_TIM_ConfigBRK2()
4549 __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK2()  argument
4551   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);  in LL_TIM_DisarmBRK2()
4569 __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat…  in LL_TIM_SetOffStates()  argument
4571   MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);  in LL_TIM_SetOffStates()
4582 __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_EnableAutomaticOutput()  argument
4584   SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_EnableAutomaticOutput()
4595 __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_DisableAutomaticOutput()  argument
4597   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_DisableAutomaticOutput()
4608 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAutomaticOutput()  argument
4610   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAutomaticOutput()
4623 __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_EnableAllOutputs()  argument
4625   SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_EnableAllOutputs()
4638 __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_DisableAllOutputs()  argument
4640   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_DisableAllOutputs()
4651 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAllOutputs()  argument
4653   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAllOutputs()
4693 __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t…  in LL_TIM_EnableBreakInputSource()  argument
4695   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_EnableBreakInputSource()
4736 __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_…  in LL_TIM_DisableBreakInputSource()  argument
4738   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_DisableBreakInputSource()
4782 __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin…  in LL_TIM_SetBreakInputSourcePolarity()  argument
4785   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_SetBreakInputSourcePolarity()
4796 __STATIC_INLINE void LL_TIM_EnableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_EnableAsymmetricalDeadTime()  argument
4798   SET_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_EnableAsymmetricalDeadTime()
4809 __STATIC_INLINE void LL_TIM_DisableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_DisableAsymmetricalDeadTime()  argument
4811   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_DisableAsymmetricalDeadTime()
4822 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAsymmetricalDeadTime()  argument
4824   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTAE) == (TIM_DTR2_DTAE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAsymmetricalDeadTime()
4840 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_SetFallingDeadTime()  argument
4842   MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime);  in LL_TIM_SetFallingDeadTime()
4856 __STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_GetFallingDeadTime()  argument
4858   return (uint32_t)(READ_BIT(TIMx->DTR2, TIM_DTR2_DTGF));  in LL_TIM_GetFallingDeadTime()
4869 __STATIC_INLINE void LL_TIM_EnableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableDeadTimePreload()  argument
4871   SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_EnableDeadTimePreload()
4882 __STATIC_INLINE void LL_TIM_DisableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableDeadTimePreload()  argument
4884   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_DisableDeadTimePreload()
4895 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDeadTimePreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDeadTimePreload()  argument
4897   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDeadTimePreload()
4971 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_…  in LL_TIM_ConfigDMABurst()  argument
4973   MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength));  in LL_TIM_ConfigDMABurst()
4992 __STATIC_INLINE void LL_TIM_EnableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableEncoderIndex()  argument
4994   SET_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_EnableEncoderIndex()
5005 __STATIC_INLINE void LL_TIM_DisableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableEncoderIndex()  argument
5007   CLEAR_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_DisableEncoderIndex()
5018 __STATIC_INLINE uint32_t LL_TIM_IsEnabledEncoderIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledEncoderIndex()  argument
5020   return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U);  in LL_TIM_IsEnabledEncoderIndex()
5035 __STATIC_INLINE void LL_TIM_SetIndexDirection(TIM_TypeDef *TIMx, uint32_t IndexDirection)  in LL_TIM_SetIndexDirection()  argument
5037   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR, IndexDirection);  in LL_TIM_SetIndexDirection()
5051 __STATIC_INLINE uint32_t LL_TIM_GetIndexDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexDirection()  argument
5053   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IDIR));  in LL_TIM_GetIndexDirection()
5064 __STATIC_INLINE void LL_TIM_EnableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableFirstIndex()  argument
5066   SET_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_EnableFirstIndex()
5077 __STATIC_INLINE void LL_TIM_DisableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableFirstIndex()  argument
5079   CLEAR_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_DisableFirstIndex()
5090 __STATIC_INLINE uint32_t LL_TIM_IsEnabledFirstIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledFirstIndex()  argument
5092   return ((READ_BIT(TIMx->ECR, TIM_ECR_FIDX) == (TIM_ECR_FIDX)) ? 1UL : 0UL);  in LL_TIM_IsEnabledFirstIndex()
5110 __STATIC_INLINE void LL_TIM_SetIndexPositionning(TIM_TypeDef *TIMx, uint32_t IndexPositionning)  in LL_TIM_SetIndexPositionning()  argument
5112   MODIFY_REG(TIMx->ECR, TIM_ECR_IPOS, IndexPositionning);  in LL_TIM_SetIndexPositionning()
5129 __STATIC_INLINE uint32_t LL_TIM_GetIndexPositionning(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexPositionning()  argument
5131   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IPOS));  in LL_TIM_GetIndexPositionning()
5148 __STATIC_INLINE void LL_TIM_ConfigIDX(TIM_TypeDef *TIMx, uint32_t Configuration)  in LL_TIM_ConfigIDX()  argument
5150   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR | TIM_ECR_FIDX | TIM_ECR_IPOS, Configuration);  in LL_TIM_ConfigIDX()
5366 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)  in LL_TIM_SetRemap()  argument
5368 …MODIFY_REG(TIMx->TISEL, (TIM_TISEL_TI1SEL | TIM_TISEL_TI2SEL | TIM_TISEL_TI3SEL | TIM_TISEL_TI4SEL…  in LL_TIM_SetRemap()
5378 __STATIC_INLINE void LL_TIM_EnableHSE32(TIM_TypeDef *TIMx)  in LL_TIM_EnableHSE32()  argument
5380   SET_BIT(TIMx->OR, TIM_OR_HSE32EN);  in LL_TIM_EnableHSE32()
5390 __STATIC_INLINE void LL_TIM_DisableHSE32(TIM_TypeDef *TIMx)  in LL_TIM_DisableHSE32()  argument
5392   CLEAR_BIT(TIMx->OR, TIM_OR_HSE32EN);  in LL_TIM_DisableHSE32()
5402 __STATIC_INLINE uint32_t LL_TIM_IsEnabledHSE32(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledHSE32()  argument
5404   return ((READ_BIT(TIMx->OR, TIM_OR_HSE32EN) == (TIM_OR_HSE32EN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledHSE32()
5436 __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSou…  in LL_TIM_SetOCRefClearInputSource()  argument
5438   MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS,  in LL_TIM_SetOCRefClearInputSource()
5440   MODIFY_REG(TIMx->AF2, TIM1_AF2_OCRSEL, OCRefClearInputSource);  in LL_TIM_SetOCRefClearInputSource()
5455 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_UPDATE()  argument
5457   WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));  in LL_TIM_ClearFlag_UPDATE()
5466 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_UPDATE()  argument
5468   return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_UPDATE()
5477 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1()  argument
5479   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));  in LL_TIM_ClearFlag_CC1()
5488 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1()  argument
5490   return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1()
5499 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2()  argument
5501   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));  in LL_TIM_ClearFlag_CC2()
5510 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2()  argument
5512   return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2()
5521 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3()  argument
5523   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));  in LL_TIM_ClearFlag_CC3()
5532 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3()  argument
5534   return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3()
5543 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4()  argument
5545   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));  in LL_TIM_ClearFlag_CC4()
5554 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4()  argument
5556   return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4()
5565 __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC5()  argument
5567   WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));  in LL_TIM_ClearFlag_CC5()
5576 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC5()  argument
5578   return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC5()
5587 __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC6()  argument
5589   WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));  in LL_TIM_ClearFlag_CC6()
5598 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC6()  argument
5600   return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC6()
5609 __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_COM()  argument
5611   WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));  in LL_TIM_ClearFlag_COM()
5620 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_COM()  argument
5622   return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_COM()
5631 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TRIG()  argument
5633   WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));  in LL_TIM_ClearFlag_TRIG()
5642 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TRIG()  argument
5644   return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TRIG()
5653 __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK()  argument
5655   WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));  in LL_TIM_ClearFlag_BRK()
5664 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK()  argument
5666   return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK()
5675 __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK2()  argument
5677   WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));  in LL_TIM_ClearFlag_BRK2()
5686 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK2()  argument
5688   return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK2()
5697 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1OVR()  argument
5699   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));  in LL_TIM_ClearFlag_CC1OVR()
5709 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1OVR()  argument
5711   return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1OVR()
5720 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2OVR()  argument
5722   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));  in LL_TIM_ClearFlag_CC2OVR()
5732 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2OVR()  argument
5734   return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2OVR()
5743 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3OVR()  argument
5745   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));  in LL_TIM_ClearFlag_CC3OVR()
5755 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3OVR()  argument
5757   return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3OVR()
5766 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4OVR()  argument
5768   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));  in LL_TIM_ClearFlag_CC4OVR()
5778 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4OVR()  argument
5780   return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4OVR()
5789 __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_SYSBRK()  argument
5791   WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));  in LL_TIM_ClearFlag_SYSBRK()
5800 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_SYSBRK()  argument
5802   return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_SYSBRK()
5813 __STATIC_INLINE void LL_TIM_ClearFlag_TERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TERR()  argument
5815   WRITE_REG(TIMx->SR, ~(TIM_SR_TERRF));  in LL_TIM_ClearFlag_TERR()
5826 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TERR()  argument
5828   return ((READ_BIT(TIMx->SR, TIM_SR_TERRF) == (TIM_SR_TERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TERR()
5839 __STATIC_INLINE void LL_TIM_ClearFlag_IERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IERR()  argument
5841   WRITE_REG(TIMx->SR, ~(TIM_SR_IERRF));  in LL_TIM_ClearFlag_IERR()
5852 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IERR()  argument
5854   return ((READ_BIT(TIMx->SR, TIM_SR_IERRF) == (TIM_SR_IERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IERR()
5865 __STATIC_INLINE void LL_TIM_ClearFlag_DIR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_DIR()  argument
5867   WRITE_REG(TIMx->SR, ~(TIM_SR_DIRF));  in LL_TIM_ClearFlag_DIR()
5878 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_DIR()  argument
5880   return ((READ_BIT(TIMx->SR, TIM_SR_DIRF) == (TIM_SR_DIRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_DIR()
5891 __STATIC_INLINE void LL_TIM_ClearFlag_IDX(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IDX()  argument
5893   WRITE_REG(TIMx->SR, ~(TIM_SR_IDXF));  in LL_TIM_ClearFlag_IDX()
5904 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IDX()  argument
5906   return ((READ_BIT(TIMx->SR, TIM_SR_IDXF) == (TIM_SR_IDXF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IDX()
5921 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_UPDATE()  argument
5923   SET_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_EnableIT_UPDATE()
5932 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_UPDATE()  argument
5934   CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_DisableIT_UPDATE()
5943 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_UPDATE()  argument
5945   return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_UPDATE()
5954 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC1()  argument
5956   SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_EnableIT_CC1()
5965 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC1()  argument
5967   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_DisableIT_CC1()
5976 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC1()  argument
5978   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC1()
5987 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC2()  argument
5989   SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_EnableIT_CC2()
5998 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC2()  argument
6000   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_DisableIT_CC2()
6009 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC2()  argument
6011   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC2()
6020 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC3()  argument
6022   SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_EnableIT_CC3()
6031 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC3()  argument
6033   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_DisableIT_CC3()
6042 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC3()  argument
6044   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC3()
6053 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC4()  argument
6055   SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_EnableIT_CC4()
6064 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC4()  argument
6066   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_DisableIT_CC4()
6075 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC4()  argument
6077   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC4()
6086 __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_COM()  argument
6088   SET_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_EnableIT_COM()
6097 __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_COM()  argument
6099   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_DisableIT_COM()
6108 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_COM()  argument
6110   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_COM()
6119 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TRIG()  argument
6121   SET_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_EnableIT_TRIG()
6130 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TRIG()  argument
6132   CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_DisableIT_TRIG()
6141 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TRIG()  argument
6143   return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TRIG()
6152 __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_BRK()  argument
6154   SET_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_EnableIT_BRK()
6163 __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_BRK()  argument
6165   CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_DisableIT_BRK()
6174 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_BRK()  argument
6176   return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_BRK()
6187 __STATIC_INLINE void LL_TIM_EnableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TERR()  argument
6189   SET_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_EnableIT_TERR()
6200 __STATIC_INLINE void LL_TIM_DisableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TERR()  argument
6202   CLEAR_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_DisableIT_TERR()
6213 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TERR()  argument
6215   return ((READ_BIT(TIMx->DIER, TIM_DIER_TERRIE) == (TIM_DIER_TERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TERR()
6226 __STATIC_INLINE void LL_TIM_EnableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IERR()  argument
6228   SET_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_EnableIT_IERR()
6239 __STATIC_INLINE void LL_TIM_DisableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IERR()  argument
6241   CLEAR_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_DisableIT_IERR()
6252 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IERR()  argument
6254   return ((READ_BIT(TIMx->DIER, TIM_DIER_IERRIE) == (TIM_DIER_IERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IERR()
6265 __STATIC_INLINE void LL_TIM_EnableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_DIR()  argument
6267   SET_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_EnableIT_DIR()
6278 __STATIC_INLINE void LL_TIM_DisableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_DIR()  argument
6280   CLEAR_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_DisableIT_DIR()
6291 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_DIR()  argument
6293   return ((READ_BIT(TIMx->DIER, TIM_DIER_DIRIE) == (TIM_DIER_DIRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_DIR()
6304 __STATIC_INLINE void LL_TIM_EnableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IDX()  argument
6306   SET_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_EnableIT_IDX()
6317 __STATIC_INLINE void LL_TIM_DisableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IDX()  argument
6319   CLEAR_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_DisableIT_IDX()
6330 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IDX()  argument
6332   return ((READ_BIT(TIMx->DIER, TIM_DIER_IDXIE) == (TIM_DIER_IDXIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IDX()
6348 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_UPDATE()  argument
6350   SET_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_EnableDMAReq_UPDATE()
6359 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_UPDATE()  argument
6361   CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_DisableDMAReq_UPDATE()
6370 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_UPDATE()  argument
6372   return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_UPDATE()
6381 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC1()  argument
6383   SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_EnableDMAReq_CC1()
6392 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC1()  argument
6394   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_DisableDMAReq_CC1()
6403 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC1()  argument
6405   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC1()
6414 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC2()  argument
6416   SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_EnableDMAReq_CC2()
6425 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC2()  argument
6427   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_DisableDMAReq_CC2()
6436 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC2()  argument
6438   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC2()
6447 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC3()  argument
6449   SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_EnableDMAReq_CC3()
6458 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC3()  argument
6460   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_DisableDMAReq_CC3()
6469 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC3()  argument
6471   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC3()
6480 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC4()  argument
6482   SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_EnableDMAReq_CC4()
6491 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC4()  argument
6493   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_DisableDMAReq_CC4()
6502 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC4()  argument
6504   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC4()
6513 __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_COM()  argument
6515   SET_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_EnableDMAReq_COM()
6524 __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_COM()  argument
6526   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_DisableDMAReq_COM()
6535 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_COM()  argument
6537   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_COM()
6546 __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_TRIG()  argument
6548   SET_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_EnableDMAReq_TRIG()
6557 __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_TRIG()  argument
6559   CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_DisableDMAReq_TRIG()
6568 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_TRIG()  argument
6570   return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_TRIG()
6586 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_UPDATE()  argument
6588   SET_BIT(TIMx->EGR, TIM_EGR_UG);  in LL_TIM_GenerateEvent_UPDATE()
6597 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC1()  argument
6599   SET_BIT(TIMx->EGR, TIM_EGR_CC1G);  in LL_TIM_GenerateEvent_CC1()
6608 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC2()  argument
6610   SET_BIT(TIMx->EGR, TIM_EGR_CC2G);  in LL_TIM_GenerateEvent_CC2()
6619 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC3()  argument
6621   SET_BIT(TIMx->EGR, TIM_EGR_CC3G);  in LL_TIM_GenerateEvent_CC3()
6630 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC4()  argument
6632   SET_BIT(TIMx->EGR, TIM_EGR_CC4G);  in LL_TIM_GenerateEvent_CC4()
6641 __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_COM()  argument
6643   SET_BIT(TIMx->EGR, TIM_EGR_COMG);  in LL_TIM_GenerateEvent_COM()
6652 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_TRIG()  argument
6654   SET_BIT(TIMx->EGR, TIM_EGR_TG);  in LL_TIM_GenerateEvent_TRIG()
6663 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK()  argument
6665   SET_BIT(TIMx->EGR, TIM_EGR_BG);  in LL_TIM_GenerateEvent_BRK()
6674 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK2()  argument
6676   SET_BIT(TIMx->EGR, TIM_EGR_B2G);  in LL_TIM_GenerateEvent_BRK2()
6688 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
6690 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
6692 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
6694 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
6696 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…
6698 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_Hall…
6700 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);