1890 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)  in LL_TIM_EnableCounter()  argument
1892   SET_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_EnableCounter()
1901 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)  in LL_TIM_DisableCounter()  argument
1903   CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_DisableCounter()
1912 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledCounter()  argument
1914   return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledCounter()
1923 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_EnableUpdateEvent()  argument
1925   CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_EnableUpdateEvent()
1934 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_DisableUpdateEvent()  argument
1936   SET_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_DisableUpdateEvent()
1945 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledUpdateEvent()  argument
1947   return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);  in LL_TIM_IsEnabledUpdateEvent()
1966 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)  in LL_TIM_SetUpdateSource()  argument
1968   MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);  in LL_TIM_SetUpdateSource()
1979 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetUpdateSource()  argument
1981   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));  in LL_TIM_GetUpdateSource()
1993 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)  in LL_TIM_SetOnePulseMode()  argument
1995   MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);  in LL_TIM_SetOnePulseMode()
2006 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetOnePulseMode()  argument
2008   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));  in LL_TIM_GetOnePulseMode()
2030 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)  in LL_TIM_SetCounterMode()  argument
2032   MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);  in LL_TIM_SetCounterMode()
2050 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounterMode()  argument
2054   counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));  in LL_TIM_GetCounterMode()
2058     counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetCounterMode()
2070 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableARRPreload()  argument
2072   SET_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_EnableARRPreload()
2081 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableARRPreload()  argument
2083   CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_DisableARRPreload()
2092 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledARRPreload()  argument
2094   return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledARRPreload()
2111 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)  in LL_TIM_SetClockDivision()  argument
2113   MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);  in LL_TIM_SetClockDivision()
2129 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)  in LL_TIM_GetClockDivision()  argument
2131   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));  in LL_TIM_GetClockDivision()
2144 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)  in LL_TIM_SetCounter()  argument
2146   WRITE_REG(TIMx->CNT, Counter);  in LL_TIM_SetCounter()
2158 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounter()  argument
2160   return (uint32_t)(READ_REG(TIMx->CNT));  in LL_TIM_GetCounter()
2171 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetDirection()  argument
2173   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetDirection()
2187 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)  in LL_TIM_SetPrescaler()  argument
2189   WRITE_REG(TIMx->PSC, Prescaler);  in LL_TIM_SetPrescaler()
2198 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_GetPrescaler()  argument
2200   return (uint32_t)(READ_REG(TIMx->PSC));  in LL_TIM_GetPrescaler()
2216 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)  in LL_TIM_SetAutoReload()  argument
2218   WRITE_REG(TIMx->ARR, AutoReload);  in LL_TIM_SetAutoReload()
2230 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)  in LL_TIM_GetAutoReload()  argument
2232   return (uint32_t)(READ_REG(TIMx->ARR));  in LL_TIM_GetAutoReload()
2245 __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)  in LL_TIM_SetRepetitionCounter()  argument
2247   WRITE_REG(TIMx->RCR, RepetitionCounter);  in LL_TIM_SetRepetitionCounter()
2258 __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetRepetitionCounter()  argument
2260   return (uint32_t)(READ_REG(TIMx->RCR));  in LL_TIM_GetRepetitionCounter()
2271 __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_EnableUIFRemap()  argument
2273   SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_EnableUIFRemap()
2282 __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_DisableUIFRemap()  argument
2284   CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_DisableUIFRemap()
2305 __STATIC_INLINE void LL_TIM_EnableDithering(TIM_TypeDef *TIMx)  in LL_TIM_EnableDithering()  argument
2307   SET_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_EnableDithering()
2318 __STATIC_INLINE void LL_TIM_DisableDithering(TIM_TypeDef *TIMx)  in LL_TIM_DisableDithering()  argument
2320   CLEAR_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_DisableDithering()
2331 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDithering(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDithering()  argument
2333   return ((READ_BIT(TIMx->CR1, TIM_CR1_DITHEN) == (TIM_CR1_DITHEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDithering()
2354 __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_EnablePreload()  argument
2356   SET_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_EnablePreload()
2367 __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_DisablePreload()  argument
2369   CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_DisablePreload()
2378 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)  in LL_TIM_CC_IsEnabledPreload()  argument
2380   return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledPreload()
2394 __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)  in LL_TIM_CC_SetUpdate()  argument
2396   MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);  in LL_TIM_CC_SetUpdate()
2408 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)  in LL_TIM_CC_SetDMAReqTrigger()  argument
2410   MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);  in LL_TIM_CC_SetDMAReqTrigger()
2421 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)  in LL_TIM_CC_GetDMAReqTrigger()  argument
2423   return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));  in LL_TIM_CC_GetDMAReqTrigger()
2440 __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)  in LL_TIM_CC_SetLockLevel()  argument
2442   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);  in LL_TIM_CC_SetLockLevel()
2471 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_EnableChannel()  argument
2473   SET_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_EnableChannel()
2502 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_DisableChannel()  argument
2504   CLEAR_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_DisableChannel()
2533 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_IsEnabledChannel()  argument
2535   return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledChannel()
2578 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura…  in LL_TIM_OC_ConfigOutput()  argument
2581 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_ConfigOutput()
2583   MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_OC_ConfigOutput()
2585   MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  in LL_TIM_OC_ConfigOutput()
2625 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)  in LL_TIM_OC_SetMode()  argument
2628 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_SetMode()
2666 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetMode()  argument
2669 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_GetMode()
2702 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)  in LL_TIM_OC_SetPolarity()  argument
2705 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iC…  in LL_TIM_OC_SetPolarity()
2736 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetPolarity()  argument
2739 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann…  in LL_TIM_OC_GetPolarity()
2775 __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)  in LL_TIM_OC_SetIdleState()  argument
2778 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  IdleState << SHIFT_TAB_OISx[iCh…  in LL_TIM_OC_SetIdleState()
2809 __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetIdleState()  argument
2812 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel…  in LL_TIM_OC_GetIdleState()
2834 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableFast()  argument
2837 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableFast()
2860 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableFast()  argument
2863 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableFast()
2886 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledFast()  argument
2889 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledFast()
2912 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnablePreload()  argument
2915 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnablePreload()
2937 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisablePreload()  argument
2940 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisablePreload()
2962 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledPreload()  argument
2965 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledPreload()
2991 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableClear()  argument
2994 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableClear()
3018 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableClear()  argument
3021 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableClear()
3047 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledClear()  argument
3050 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledClear()
3066 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_OC_SetDeadTime()  argument
3068   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);  in LL_TIM_OC_SetDeadTime()
3084 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH1()  argument
3086   WRITE_REG(TIMx->CCR1, CompareValue);  in LL_TIM_OC_SetCompareCH1()
3102 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH2()  argument
3104   WRITE_REG(TIMx->CCR2, CompareValue);  in LL_TIM_OC_SetCompareCH2()
3120 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH3()  argument
3122   WRITE_REG(TIMx->CCR3, CompareValue);  in LL_TIM_OC_SetCompareCH3()
3138 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH4()  argument
3140   WRITE_REG(TIMx->CCR4, CompareValue);  in LL_TIM_OC_SetCompareCH4()
3153 __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH5()  argument
3155   MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);  in LL_TIM_OC_SetCompareCH5()
3168 __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH6()  argument
3170   WRITE_REG(TIMx->CCR6, CompareValue);  in LL_TIM_OC_SetCompareCH6()
3185 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH1()  argument
3187   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_OC_GetCompareCH1()
3202 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH2()  argument
3204   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_OC_GetCompareCH2()
3219 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH3()  argument
3221   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_OC_GetCompareCH3()
3236 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH4()  argument
3238   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_OC_GetCompareCH4()
3250 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH5()  argument
3252   return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));  in LL_TIM_OC_GetCompareCH5()
3264 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH6()  argument
3266   return (uint32_t)(READ_REG(TIMx->CCR6));  in LL_TIM_OC_GetCompareCH6()
3284 __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)  in LL_TIM_SetCH5CombinedChannels()  argument
3286   MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);  in LL_TIM_SetCH5CombinedChannels()
3307 __STATIC_INLINE void LL_TIM_OC_SetPulseWidthPrescaler(TIM_TypeDef *TIMx, uint32_t PulseWidthPrescal…  in LL_TIM_OC_SetPulseWidthPrescaler()  argument
3309   MODIFY_REG(TIMx->ECR, TIM_ECR_PWPRSC, PulseWidthPrescaler);  in LL_TIM_OC_SetPulseWidthPrescaler()
3329 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidthPrescaler()  argument
3331   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PWPRSC));  in LL_TIM_OC_GetPulseWidthPrescaler()
3344 __STATIC_INLINE void LL_TIM_OC_SetPulseWidth(TIM_TypeDef *TIMx, uint32_t PulseWidth)  in LL_TIM_OC_SetPulseWidth()  argument
3346   MODIFY_REG(TIMx->ECR, TIM_ECR_PW, PulseWidth << TIM_ECR_PW_Pos);  in LL_TIM_OC_SetPulseWidth()
3358 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidth(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidth()  argument
3360   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PW));  in LL_TIM_OC_GetPulseWidth()
3405 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)  in LL_TIM_IC_Config()  argument
3408 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_Config()
3412   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_Config()
3434 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv…  in LL_TIM_IC_SetActiveInput()  argument
3437 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetActiveInput()
3458 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetActiveInput()  argument
3461 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetActiveInput()
3484 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal…  in LL_TIM_IC_SetPrescaler()  argument
3487 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetPrescaler()
3509 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPrescaler()  argument
3512 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetPrescaler()
3547 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)  in LL_TIM_IC_SetFilter()  argument
3550 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetFilter()
3584 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetFilter()  argument
3587 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetFilter()
3613 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)  in LL_TIM_IC_SetPolarity()  argument
3616   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_SetPolarity()
3641 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPolarity()  argument
3644   return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>  in LL_TIM_IC_GetPolarity()
3656 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_EnableXORCombination()  argument
3658   SET_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_EnableXORCombination()
3669 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_DisableXORCombination()  argument
3671   CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_DisableXORCombination()
3682 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)  in LL_TIM_IC_IsEnabledXORCombination()  argument
3684   return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);  in LL_TIM_IC_IsEnabledXORCombination()
3699 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH1()  argument
3701   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_IC_GetCaptureCH1()
3716 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH2()  argument
3718   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_IC_GetCaptureCH2()
3733 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH3()  argument
3735   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_IC_GetCaptureCH3()
3750 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH4()  argument
3752   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_IC_GetCaptureCH4()
3771 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_EnableExternalClock()  argument
3773   SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_EnableExternalClock()
3784 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_DisableExternalClock()  argument
3786   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_DisableExternalClock()
3797 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledExternalClock()  argument
3799   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledExternalClock()
3821 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)  in LL_TIM_SetClockSource()  argument
3823   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);  in LL_TIM_SetClockSource()
3844 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)  in LL_TIM_SetEncoderMode()  argument
3846   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);  in LL_TIM_SetEncoderMode()
3874 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)  in LL_TIM_SetTriggerOutput()  argument
3876   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);  in LL_TIM_SetTriggerOutput()
3904 __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)  in LL_TIM_SetTriggerOutput2()  argument
3906   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);  in LL_TIM_SetTriggerOutput2()
3924 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)  in LL_TIM_SetSlaveMode()  argument
3926   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);  in LL_TIM_SetSlaveMode()
3952 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)  in LL_TIM_SetTriggerInput()  argument
3954   MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);  in LL_TIM_SetTriggerInput()
3965 __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_EnableMasterSlaveMode()  argument
3967   SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_EnableMasterSlaveMode()
3978 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_DisableMasterSlaveMode()  argument
3980   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_DisableMasterSlaveMode()
3991 __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledMasterSlaveMode()  argument
3993   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);  in LL_TIM_IsEnabledMasterSlaveMode()
4031 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale…  in LL_TIM_ConfigETR()  argument
4034 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E…  in LL_TIM_ConfigETR()
4157 __STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)  in LL_TIM_SetETRSource()  argument
4159   MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource);  in LL_TIM_SetETRSource()
4170 __STATIC_INLINE void LL_TIM_EnableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableSMSPreload()  argument
4172   SET_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_EnableSMSPreload()
4183 __STATIC_INLINE void LL_TIM_DisableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableSMSPreload()  argument
4185   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_DisableSMSPreload()
4196 __STATIC_INLINE uint32_t LL_TIM_IsEnabledSMSPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledSMSPreload()  argument
4198   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPE) == (TIM_SMCR_SMSPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledSMSPreload()
4212 __STATIC_INLINE void LL_TIM_SetSMSPreloadSource(TIM_TypeDef *TIMx, uint32_t PreloadSource)  in LL_TIM_SetSMSPreloadSource()  argument
4214   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMSPS, PreloadSource);  in LL_TIM_SetSMSPreloadSource()
4227 __STATIC_INLINE uint32_t LL_TIM_GetSMSPreloadSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetSMSPreloadSource()  argument
4229   return (uint32_t)(READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPS));  in LL_TIM_GetSMSPreloadSource()
4247 __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK()  argument
4249   SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_EnableBRK()
4260 __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK()  argument
4262   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_DisableBRK()
4307 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilt…  in LL_TIM_ConfigBRK()  argument
4310 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |…  in LL_TIM_ConfigBRK()
4323 __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK()  argument
4325   SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);  in LL_TIM_DisarmBRK()
4336 __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK2()  argument
4338   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_EnableBRK2()
4349 __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK2()  argument
4351   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_DisableBRK2()
4396 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F…  in LL_TIM_ConfigBRK2()  argument
4399 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil…  in LL_TIM_ConfigBRK2()
4412 __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK2()  argument
4414   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);  in LL_TIM_DisarmBRK2()
4432 __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat…  in LL_TIM_SetOffStates()  argument
4434   MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);  in LL_TIM_SetOffStates()
4445 __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_EnableAutomaticOutput()  argument
4447   SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_EnableAutomaticOutput()
4458 __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_DisableAutomaticOutput()  argument
4460   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_DisableAutomaticOutput()
4471 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAutomaticOutput()  argument
4473   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAutomaticOutput()
4486 __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_EnableAllOutputs()  argument
4488   SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_EnableAllOutputs()
4501 __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_DisableAllOutputs()  argument
4503   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_DisableAllOutputs()
4514 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAllOutputs()  argument
4516   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAllOutputs()
4544 __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t…  in LL_TIM_EnableBreakInputSource()  argument
4546   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_EnableBreakInputSource()
4575 __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_…  in LL_TIM_DisableBreakInputSource()  argument
4577   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_DisableBreakInputSource()
4606 __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin…  in LL_TIM_SetBreakInputSourcePolarity()  argument
4609   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_SetBreakInputSourcePolarity()
4620 __STATIC_INLINE void LL_TIM_EnableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_EnableAsymmetricalDeadTime()  argument
4622   SET_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_EnableAsymmetricalDeadTime()
4633 __STATIC_INLINE void LL_TIM_DisableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_DisableAsymmetricalDeadTime()  argument
4635   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_DisableAsymmetricalDeadTime()
4646 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAsymmetricalDeadTime()  argument
4648   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTAE) == (TIM_DTR2_DTAE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAsymmetricalDeadTime()
4664 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_SetFallingDeadTime()  argument
4666   MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime);  in LL_TIM_SetFallingDeadTime()
4680 __STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_GetFallingDeadTime()  argument
4682   return (uint32_t)(READ_BIT(TIMx->DTR2, TIM_DTR2_DTGF));  in LL_TIM_GetFallingDeadTime()
4693 __STATIC_INLINE void LL_TIM_EnableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableDeadTimePreload()  argument
4695   SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_EnableDeadTimePreload()
4706 __STATIC_INLINE void LL_TIM_DisableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableDeadTimePreload()  argument
4708   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_DisableDeadTimePreload()
4719 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDeadTimePreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDeadTimePreload()  argument
4721   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDeadTimePreload()
4803 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_…  in LL_TIM_ConfigDMABurst()  argument
4806   MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA | TIM_DCR_DBSS),  in LL_TIM_ConfigDMABurst()
4826 __STATIC_INLINE void LL_TIM_EnableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableEncoderIndex()  argument
4828   SET_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_EnableEncoderIndex()
4839 __STATIC_INLINE void LL_TIM_DisableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableEncoderIndex()  argument
4841   CLEAR_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_DisableEncoderIndex()
4852 __STATIC_INLINE uint32_t LL_TIM_IsEnabledEncoderIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledEncoderIndex()  argument
4854   return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U);  in LL_TIM_IsEnabledEncoderIndex()
4869 __STATIC_INLINE void LL_TIM_SetIndexDirection(TIM_TypeDef *TIMx, uint32_t IndexDirection)  in LL_TIM_SetIndexDirection()  argument
4871   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR, IndexDirection);  in LL_TIM_SetIndexDirection()
4885 __STATIC_INLINE uint32_t LL_TIM_GetIndexDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexDirection()  argument
4887   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IDIR));  in LL_TIM_GetIndexDirection()
4902 __STATIC_INLINE void LL_TIM_SetIndexblanking(TIM_TypeDef *TIMx, uint32_t Indexblanking)  in LL_TIM_SetIndexblanking()  argument
4904   MODIFY_REG(TIMx->ECR, TIM_ECR_IBLK, Indexblanking);  in LL_TIM_SetIndexblanking()
4918 __STATIC_INLINE uint32_t LL_TIM_GetIndexblanking(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexblanking()  argument
4920   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IBLK));  in LL_TIM_GetIndexblanking()
4932 __STATIC_INLINE void LL_TIM_EnableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableFirstIndex()  argument
4934   SET_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_EnableFirstIndex()
4945 __STATIC_INLINE void LL_TIM_DisableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableFirstIndex()  argument
4947   CLEAR_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_DisableFirstIndex()
4958 __STATIC_INLINE uint32_t LL_TIM_IsEnabledFirstIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledFirstIndex()  argument
4960   return ((READ_BIT(TIMx->ECR, TIM_ECR_FIDX) == (TIM_ECR_FIDX)) ? 1UL : 0UL);  in LL_TIM_IsEnabledFirstIndex()
4978 __STATIC_INLINE void LL_TIM_SetIndexPositionning(TIM_TypeDef *TIMx, uint32_t IndexPositionning)  in LL_TIM_SetIndexPositionning()  argument
4980   MODIFY_REG(TIMx->ECR, TIM_ECR_IPOS, IndexPositionning);  in LL_TIM_SetIndexPositionning()
4997 __STATIC_INLINE uint32_t LL_TIM_GetIndexPositionning(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexPositionning()  argument
4999   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IPOS));  in LL_TIM_GetIndexPositionning()
5018 __STATIC_INLINE void LL_TIM_ConfigIDX(TIM_TypeDef *TIMx, uint32_t Configuration)  in LL_TIM_ConfigIDX()  argument
5020   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR | TIM_ECR_IBLK | TIM_ECR_FIDX | TIM_ECR_IPOS, Configuration);  in LL_TIM_ConfigIDX()
5137 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)  in LL_TIM_SetRemap()  argument
5139 …MODIFY_REG(TIMx->TISEL, (TIM_TISEL_TI1SEL | TIM_TISEL_TI2SEL | TIM_TISEL_TI3SEL | TIM_TISEL_TI4SEL…  in LL_TIM_SetRemap()
5151 __STATIC_INLINE void LL_TIM_EnableHSE32(TIM_TypeDef *TIMx)  in LL_TIM_EnableHSE32()  argument
5153   SET_BIT(TIMx->OR1, TIM_OR1_HSE32EN);  in LL_TIM_EnableHSE32()
5163 __STATIC_INLINE void LL_TIM_DisableHSE32(TIM_TypeDef *TIMx)  in LL_TIM_DisableHSE32()  argument
5165   CLEAR_BIT(TIMx->OR1, TIM_OR1_HSE32EN);  in LL_TIM_DisableHSE32()
5175 __STATIC_INLINE uint32_t LL_TIM_IsEnabledHSE32(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledHSE32()  argument
5177   return ((READ_BIT(TIMx->OR1, TIM_OR1_HSE32EN) == (TIM_OR1_HSE32EN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledHSE32()
5203 __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSou…  in LL_TIM_SetOCRefClearInputSource()  argument
5205   MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS,  in LL_TIM_SetOCRefClearInputSource()
5207   MODIFY_REG(TIMx->AF2, TIM1_AF2_OCRSEL, OCRefClearInputSource);  in LL_TIM_SetOCRefClearInputSource()
5222 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_UPDATE()  argument
5224   WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));  in LL_TIM_ClearFlag_UPDATE()
5233 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_UPDATE()  argument
5235   return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_UPDATE()
5244 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1()  argument
5246   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));  in LL_TIM_ClearFlag_CC1()
5255 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1()  argument
5257   return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1()
5266 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2()  argument
5268   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));  in LL_TIM_ClearFlag_CC2()
5277 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2()  argument
5279   return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2()
5288 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3()  argument
5290   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));  in LL_TIM_ClearFlag_CC3()
5299 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3()  argument
5301   return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3()
5310 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4()  argument
5312   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));  in LL_TIM_ClearFlag_CC4()
5321 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4()  argument
5323   return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4()
5332 __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC5()  argument
5334   WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));  in LL_TIM_ClearFlag_CC5()
5343 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC5()  argument
5345   return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC5()
5354 __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC6()  argument
5356   WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));  in LL_TIM_ClearFlag_CC6()
5365 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC6()  argument
5367   return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC6()
5376 __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_COM()  argument
5378   WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));  in LL_TIM_ClearFlag_COM()
5387 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_COM()  argument
5389   return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_COM()
5398 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TRIG()  argument
5400   WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));  in LL_TIM_ClearFlag_TRIG()
5409 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TRIG()  argument
5411   return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TRIG()
5420 __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK()  argument
5422   WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));  in LL_TIM_ClearFlag_BRK()
5431 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK()  argument
5433   return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK()
5442 __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK2()  argument
5444   WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));  in LL_TIM_ClearFlag_BRK2()
5453 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK2()  argument
5455   return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK2()
5464 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1OVR()  argument
5466   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));  in LL_TIM_ClearFlag_CC1OVR()
5476 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1OVR()  argument
5478   return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1OVR()
5487 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2OVR()  argument
5489   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));  in LL_TIM_ClearFlag_CC2OVR()
5499 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2OVR()  argument
5501   return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2OVR()
5510 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3OVR()  argument
5512   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));  in LL_TIM_ClearFlag_CC3OVR()
5522 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3OVR()  argument
5524   return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3OVR()
5533 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4OVR()  argument
5535   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));  in LL_TIM_ClearFlag_CC4OVR()
5545 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4OVR()  argument
5547   return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4OVR()
5556 __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_SYSBRK()  argument
5558   WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));  in LL_TIM_ClearFlag_SYSBRK()
5567 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_SYSBRK()  argument
5569   return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_SYSBRK()
5580 __STATIC_INLINE void LL_TIM_ClearFlag_TERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TERR()  argument
5582   WRITE_REG(TIMx->SR, ~(TIM_SR_TERRF));  in LL_TIM_ClearFlag_TERR()
5593 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TERR()  argument
5595   return ((READ_BIT(TIMx->SR, TIM_SR_TERRF) == (TIM_SR_TERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TERR()
5606 __STATIC_INLINE void LL_TIM_ClearFlag_IERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IERR()  argument
5608   WRITE_REG(TIMx->SR, ~(TIM_SR_IERRF));  in LL_TIM_ClearFlag_IERR()
5619 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IERR()  argument
5621   return ((READ_BIT(TIMx->SR, TIM_SR_IERRF) == (TIM_SR_IERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IERR()
5632 __STATIC_INLINE void LL_TIM_ClearFlag_DIR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_DIR()  argument
5634   WRITE_REG(TIMx->SR, ~(TIM_SR_DIRF));  in LL_TIM_ClearFlag_DIR()
5645 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_DIR()  argument
5647   return ((READ_BIT(TIMx->SR, TIM_SR_DIRF) == (TIM_SR_DIRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_DIR()
5658 __STATIC_INLINE void LL_TIM_ClearFlag_IDX(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IDX()  argument
5660   WRITE_REG(TIMx->SR, ~(TIM_SR_IDXF));  in LL_TIM_ClearFlag_IDX()
5671 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IDX()  argument
5673   return ((READ_BIT(TIMx->SR, TIM_SR_IDXF) == (TIM_SR_IDXF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IDX()
5688 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_UPDATE()  argument
5690   SET_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_EnableIT_UPDATE()
5699 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_UPDATE()  argument
5701   CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_DisableIT_UPDATE()
5710 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_UPDATE()  argument
5712   return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_UPDATE()
5721 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC1()  argument
5723   SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_EnableIT_CC1()
5732 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC1()  argument
5734   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_DisableIT_CC1()
5743 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC1()  argument
5745   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC1()
5754 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC2()  argument
5756   SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_EnableIT_CC2()
5765 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC2()  argument
5767   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_DisableIT_CC2()
5776 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC2()  argument
5778   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC2()
5787 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC3()  argument
5789   SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_EnableIT_CC3()
5798 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC3()  argument
5800   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_DisableIT_CC3()
5809 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC3()  argument
5811   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC3()
5820 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC4()  argument
5822   SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_EnableIT_CC4()
5831 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC4()  argument
5833   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_DisableIT_CC4()
5842 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC4()  argument
5844   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC4()
5853 __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_COM()  argument
5855   SET_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_EnableIT_COM()
5864 __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_COM()  argument
5866   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_DisableIT_COM()
5875 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_COM()  argument
5877   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_COM()
5886 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TRIG()  argument
5888   SET_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_EnableIT_TRIG()
5897 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TRIG()  argument
5899   CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_DisableIT_TRIG()
5908 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TRIG()  argument
5910   return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TRIG()
5919 __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_BRK()  argument
5921   SET_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_EnableIT_BRK()
5930 __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_BRK()  argument
5932   CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_DisableIT_BRK()
5941 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_BRK()  argument
5943   return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_BRK()
5954 __STATIC_INLINE void LL_TIM_EnableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TERR()  argument
5956   SET_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_EnableIT_TERR()
5967 __STATIC_INLINE void LL_TIM_DisableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TERR()  argument
5969   CLEAR_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_DisableIT_TERR()
5980 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TERR()  argument
5982   return ((READ_BIT(TIMx->DIER, TIM_DIER_TERRIE) == (TIM_DIER_TERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TERR()
5993 __STATIC_INLINE void LL_TIM_EnableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IERR()  argument
5995   SET_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_EnableIT_IERR()
6006 __STATIC_INLINE void LL_TIM_DisableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IERR()  argument
6008   CLEAR_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_DisableIT_IERR()
6019 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IERR()  argument
6021   return ((READ_BIT(TIMx->DIER, TIM_DIER_IERRIE) == (TIM_DIER_IERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IERR()
6032 __STATIC_INLINE void LL_TIM_EnableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_DIR()  argument
6034   SET_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_EnableIT_DIR()
6045 __STATIC_INLINE void LL_TIM_DisableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_DIR()  argument
6047   CLEAR_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_DisableIT_DIR()
6058 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_DIR()  argument
6060   return ((READ_BIT(TIMx->DIER, TIM_DIER_DIRIE) == (TIM_DIER_DIRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_DIR()
6071 __STATIC_INLINE void LL_TIM_EnableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IDX()  argument
6073   SET_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_EnableIT_IDX()
6084 __STATIC_INLINE void LL_TIM_DisableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IDX()  argument
6086   CLEAR_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_DisableIT_IDX()
6097 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IDX()  argument
6099   return ((READ_BIT(TIMx->DIER, TIM_DIER_IDXIE) == (TIM_DIER_IDXIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IDX()
6115 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_UPDATE()  argument
6117   SET_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_EnableDMAReq_UPDATE()
6126 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_UPDATE()  argument
6128   CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_DisableDMAReq_UPDATE()
6137 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_UPDATE()  argument
6139   return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_UPDATE()
6148 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC1()  argument
6150   SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_EnableDMAReq_CC1()
6159 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC1()  argument
6161   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_DisableDMAReq_CC1()
6170 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC1()  argument
6172   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC1()
6181 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC2()  argument
6183   SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_EnableDMAReq_CC2()
6192 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC2()  argument
6194   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_DisableDMAReq_CC2()
6203 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC2()  argument
6205   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC2()
6214 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC3()  argument
6216   SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_EnableDMAReq_CC3()
6225 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC3()  argument
6227   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_DisableDMAReq_CC3()
6236 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC3()  argument
6238   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC3()
6247 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC4()  argument
6249   SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_EnableDMAReq_CC4()
6258 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC4()  argument
6260   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_DisableDMAReq_CC4()
6269 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC4()  argument
6271   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC4()
6280 __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_COM()  argument
6282   SET_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_EnableDMAReq_COM()
6291 __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_COM()  argument
6293   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_DisableDMAReq_COM()
6302 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_COM()  argument
6304   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_COM()
6313 __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_TRIG()  argument
6315   SET_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_EnableDMAReq_TRIG()
6324 __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_TRIG()  argument
6326   CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_DisableDMAReq_TRIG()
6335 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_TRIG()  argument
6337   return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_TRIG()
6353 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_UPDATE()  argument
6355   SET_BIT(TIMx->EGR, TIM_EGR_UG);  in LL_TIM_GenerateEvent_UPDATE()
6364 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC1()  argument
6366   SET_BIT(TIMx->EGR, TIM_EGR_CC1G);  in LL_TIM_GenerateEvent_CC1()
6375 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC2()  argument
6377   SET_BIT(TIMx->EGR, TIM_EGR_CC2G);  in LL_TIM_GenerateEvent_CC2()
6386 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC3()  argument
6388   SET_BIT(TIMx->EGR, TIM_EGR_CC3G);  in LL_TIM_GenerateEvent_CC3()
6397 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC4()  argument
6399   SET_BIT(TIMx->EGR, TIM_EGR_CC4G);  in LL_TIM_GenerateEvent_CC4()
6408 __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_COM()  argument
6410   SET_BIT(TIMx->EGR, TIM_EGR_COMG);  in LL_TIM_GenerateEvent_COM()
6419 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_TRIG()  argument
6421   SET_BIT(TIMx->EGR, TIM_EGR_TG);  in LL_TIM_GenerateEvent_TRIG()
6430 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK()  argument
6432   SET_BIT(TIMx->EGR, TIM_EGR_BG);  in LL_TIM_GenerateEvent_BRK()
6441 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK2()  argument
6443   SET_BIT(TIMx->EGR, TIM_EGR_B2G);  in LL_TIM_GenerateEvent_BRK2()
6455 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
6457 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
6459 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
6461 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
6463 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…
6465 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_Hall…
6467 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);