Lines Matching refs:TIMx
1277 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1279 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1288 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1290 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1299 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1301 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1310 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1312 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1321 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1323 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
1332 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledUpdateEvent() argument
1334 return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL); in LL_TIM_IsEnabledUpdateEvent()
1353 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource) in LL_TIM_SetUpdateSource() argument
1355 MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource); in LL_TIM_SetUpdateSource()
1366 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx) in LL_TIM_GetUpdateSource() argument
1368 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS)); in LL_TIM_GetUpdateSource()
1380 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) in LL_TIM_SetOnePulseMode() argument
1382 MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); in LL_TIM_SetOnePulseMode()
1393 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx) in LL_TIM_GetOnePulseMode() argument
1395 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); in LL_TIM_GetOnePulseMode()
1417 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) in LL_TIM_SetCounterMode() argument
1419 MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode); in LL_TIM_SetCounterMode()
1437 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) in LL_TIM_GetCounterMode() argument
1441 counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS)); in LL_TIM_GetCounterMode()
1445 counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); in LL_TIM_GetCounterMode()
1457 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) in LL_TIM_EnableARRPreload() argument
1459 SET_BIT(TIMx->CR1, TIM_CR1_ARPE); in LL_TIM_EnableARRPreload()
1468 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) in LL_TIM_DisableARRPreload() argument
1470 CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); in LL_TIM_DisableARRPreload()
1479 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledARRPreload() argument
1481 return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledARRPreload()
1498 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision) in LL_TIM_SetClockDivision() argument
1500 MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); in LL_TIM_SetClockDivision()
1516 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx) in LL_TIM_GetClockDivision() argument
1518 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); in LL_TIM_GetClockDivision()
1528 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) in LL_TIM_SetCounter() argument
1530 WRITE_REG(TIMx->CNT, Counter); in LL_TIM_SetCounter()
1539 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) in LL_TIM_GetCounter() argument
1541 return (uint32_t)(READ_REG(TIMx->CNT)); in LL_TIM_GetCounter()
1552 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx) in LL_TIM_GetDirection() argument
1554 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); in LL_TIM_GetDirection()
1568 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) in LL_TIM_SetPrescaler() argument
1570 WRITE_REG(TIMx->PSC, Prescaler); in LL_TIM_SetPrescaler()
1579 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx) in LL_TIM_GetPrescaler() argument
1581 return (uint32_t)(READ_REG(TIMx->PSC)); in LL_TIM_GetPrescaler()
1593 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) in LL_TIM_SetAutoReload() argument
1595 WRITE_REG(TIMx->ARR, AutoReload); in LL_TIM_SetAutoReload()
1604 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx) in LL_TIM_GetAutoReload() argument
1606 return (uint32_t)(READ_REG(TIMx->ARR)); in LL_TIM_GetAutoReload()
1619 __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter) in LL_TIM_SetRepetitionCounter() argument
1621 WRITE_REG(TIMx->RCR, RepetitionCounter); in LL_TIM_SetRepetitionCounter()
1632 __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx) in LL_TIM_GetRepetitionCounter() argument
1634 return (uint32_t)(READ_REG(TIMx->RCR)); in LL_TIM_GetRepetitionCounter()
1645 __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx) in LL_TIM_EnableUIFRemap() argument
1647 SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); in LL_TIM_EnableUIFRemap()
1656 __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx) in LL_TIM_DisableUIFRemap() argument
1658 CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); in LL_TIM_DisableUIFRemap()
1689 __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx) in LL_TIM_CC_EnablePreload() argument
1691 SET_BIT(TIMx->CR2, TIM_CR2_CCPC); in LL_TIM_CC_EnablePreload()
1702 __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx) in LL_TIM_CC_DisablePreload() argument
1704 CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC); in LL_TIM_CC_DisablePreload()
1718 __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource) in LL_TIM_CC_SetUpdate() argument
1720 MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource); in LL_TIM_CC_SetUpdate()
1733 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger) in LL_TIM_CC_SetDMAReqTrigger() argument
1735 MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); in LL_TIM_CC_SetDMAReqTrigger()
1746 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx) in LL_TIM_CC_GetDMAReqTrigger() argument
1748 return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); in LL_TIM_CC_GetDMAReqTrigger()
1766 __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel) in LL_TIM_CC_SetLockLevel() argument
1768 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
1795 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_EnableChannel() argument
1797 SET_BIT(TIMx->CCER, Channels); in LL_TIM_CC_EnableChannel()
1824 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_DisableChannel() argument
1826 CLEAR_BIT(TIMx->CCER, Channels); in LL_TIM_CC_DisableChannel()
1853 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_IsEnabledChannel() argument
1855 return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL); in LL_TIM_CC_IsEnabledChannel()
1898 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura… in LL_TIM_OC_ConfigOutput() argument
1901 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_ConfigOutput()
1903 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1905 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1943 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) in LL_TIM_OC_SetMode() argument
1946 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_SetMode()
1982 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetMode() argument
1985 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_GetMode()
2016 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) in LL_TIM_OC_SetPolarity() argument
2019 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
2048 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetPolarity() argument
2051 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
2085 __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState) in LL_TIM_OC_SetIdleState() argument
2088 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2117 __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetIdleState() argument
2120 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
2142 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnableFast() argument
2145 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnableFast()
2168 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisableFast() argument
2171 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisableFast()
2194 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledFast() argument
2197 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledFast()
2220 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnablePreload() argument
2223 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnablePreload()
2245 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisablePreload() argument
2248 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisablePreload()
2270 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledPreload() argument
2273 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledPreload()
2299 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnableClear() argument
2302 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnableClear()
2326 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisableClear() argument
2329 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisableClear()
2355 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledClear() argument
2358 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledClear()
2374 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2376 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
2388 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH1() argument
2390 WRITE_REG(TIMx->CCR1, CompareValue); in LL_TIM_OC_SetCompareCH1()
2402 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH2() argument
2404 WRITE_REG(TIMx->CCR2, CompareValue); in LL_TIM_OC_SetCompareCH2()
2416 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH3() argument
2418 WRITE_REG(TIMx->CCR3, CompareValue); in LL_TIM_OC_SetCompareCH3()
2430 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH4() argument
2432 WRITE_REG(TIMx->CCR4, CompareValue); in LL_TIM_OC_SetCompareCH4()
2445 __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH5() argument
2447 MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue); in LL_TIM_OC_SetCompareCH5()
2461 __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH6() argument
2463 WRITE_REG(TIMx->CCR6, CompareValue); in LL_TIM_OC_SetCompareCH6()
2475 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH1() argument
2477 return (uint32_t)(READ_REG(TIMx->CCR1)); in LL_TIM_OC_GetCompareCH1()
2488 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH2() argument
2490 return (uint32_t)(READ_REG(TIMx->CCR2)); in LL_TIM_OC_GetCompareCH2()
2501 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH3() argument
2503 return (uint32_t)(READ_REG(TIMx->CCR3)); in LL_TIM_OC_GetCompareCH3()
2514 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH4() argument
2516 return (uint32_t)(READ_REG(TIMx->CCR4)); in LL_TIM_OC_GetCompareCH4()
2528 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH5() argument
2530 return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5)); in LL_TIM_OC_GetCompareCH5()
2543 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH6() argument
2545 return (uint32_t)(READ_REG(TIMx->CCR6)); in LL_TIM_OC_GetCompareCH6()
2565 __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5) in LL_TIM_SetCH5CombinedChannels() argument
2567 MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5); in LL_TIM_SetCH5CombinedChannels()
2613 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) in LL_TIM_IC_Config() argument
2616 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_Config()
2620 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
2642 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv… in LL_TIM_IC_SetActiveInput() argument
2645 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetActiveInput()
2666 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetActiveInput() argument
2669 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetActiveInput()
2692 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal… in LL_TIM_IC_SetPrescaler() argument
2695 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetPrescaler()
2717 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetPrescaler() argument
2720 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetPrescaler()
2755 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) in LL_TIM_IC_SetFilter() argument
2758 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetFilter()
2792 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetFilter() argument
2795 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetFilter()
2821 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity) in LL_TIM_IC_SetPolarity() argument
2824 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
2849 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetPolarity() argument
2852 return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> in LL_TIM_IC_GetPolarity()
2864 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) in LL_TIM_IC_EnableXORCombination() argument
2866 SET_BIT(TIMx->CR2, TIM_CR2_TI1S); in LL_TIM_IC_EnableXORCombination()
2877 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx) in LL_TIM_IC_DisableXORCombination() argument
2879 CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); in LL_TIM_IC_DisableXORCombination()
2890 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) in LL_TIM_IC_IsEnabledXORCombination() argument
2892 return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL); in LL_TIM_IC_IsEnabledXORCombination()
2903 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH1() argument
2905 return (uint32_t)(READ_REG(TIMx->CCR1)); in LL_TIM_IC_GetCaptureCH1()
2916 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH2() argument
2918 return (uint32_t)(READ_REG(TIMx->CCR2)); in LL_TIM_IC_GetCaptureCH2()
2929 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH3() argument
2931 return (uint32_t)(READ_REG(TIMx->CCR3)); in LL_TIM_IC_GetCaptureCH3()
2942 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH4() argument
2944 return (uint32_t)(READ_REG(TIMx->CCR4)); in LL_TIM_IC_GetCaptureCH4()
2963 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx) in LL_TIM_EnableExternalClock() argument
2965 SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_EnableExternalClock()
2976 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx) in LL_TIM_DisableExternalClock() argument
2978 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_DisableExternalClock()
2989 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledExternalClock() argument
2991 return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); in LL_TIM_IsEnabledExternalClock()
3013 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) in LL_TIM_SetClockSource() argument
3015 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); in LL_TIM_SetClockSource()
3030 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) in LL_TIM_SetEncoderMode() argument
3032 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); in LL_TIM_SetEncoderMode()
3057 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) in LL_TIM_SetSlaveMode() argument
3059 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); in LL_TIM_SetSlaveMode()
3075 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) in LL_TIM_SetTriggerInput() argument
3077 MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); in LL_TIM_SetTriggerInput()
3116 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale… in LL_TIM_ConfigETR() argument
3119 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E… in LL_TIM_ConfigETR()
3137 __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx) in LL_TIM_EnableBRK() argument
3139 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3150 __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx) in LL_TIM_DisableBRK() argument
3152 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3193 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakAFMo… in LL_TIM_ConfigBRK() argument
3195 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKBID, BreakPolarity | BreakAFMode); in LL_TIM_ConfigBRK()
3198 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilt… in LL_TIM_ConfigBRK() argument
3200 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter); in LL_TIM_ConfigBRK()
3215 __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx) in LL_TIM_DisarmBRK() argument
3217 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3227 __STATIC_INLINE void LL_TIM_ReArmBRK(TIM_TypeDef *TIMx) in LL_TIM_ReArmBRK() argument
3229 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_ReArmBRK()
3242 __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx) in LL_TIM_EnableBRK2() argument
3244 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3255 __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx) in LL_TIM_DisableBRK2() argument
3257 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3303 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F… in LL_TIM_ConfigBRK2() argument
3306 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
3339 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F… in LL_TIM_ConfigBRK2() argument
3341 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter); in LL_TIM_ConfigBRK2()
3362 __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat… in LL_TIM_SetOffStates() argument
3364 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
3375 __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx) in LL_TIM_EnableAutomaticOutput() argument
3377 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
3388 __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx) in LL_TIM_DisableAutomaticOutput() argument
3390 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_DisableAutomaticOutput()
3401 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledAutomaticOutput() argument
3403 return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL); in LL_TIM_IsEnabledAutomaticOutput()
3416 __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx) in LL_TIM_EnableAllOutputs() argument
3418 SET_BIT(TIMx->BDTR, TIM_BDTR_MOE); in LL_TIM_EnableAllOutputs()
3431 __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx) in LL_TIM_DisableAllOutputs() argument
3433 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE); in LL_TIM_DisableAllOutputs()
3444 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledAllOutputs() argument
3446 return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL); in LL_TIM_IsEnabledAllOutputs()
3463 __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t… in LL_TIM_EnableBreakInputSource() argument
3465 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput)); in LL_TIM_EnableBreakInputSource()
3483 __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_… in LL_TIM_DisableBreakInputSource() argument
3485 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput)); in LL_TIM_DisableBreakInputSource()
3506 __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin… in LL_TIM_SetBreakInputSourcePolarity() argument
3509 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput)); in LL_TIM_SetBreakInputSourcePolarity()
3573 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_… in LL_TIM_ConfigDMABurst() argument
3575 MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength)); in LL_TIM_ConfigDMABurst()
3600 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap) in LL_TIM_SetRemap() argument
3602 WRITE_REG(TIMx->OR1, Remap); in LL_TIM_SetRemap()
3624 __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSou… in LL_TIM_SetOCRefClearInputSource() argument
3626 MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource); in LL_TIM_SetOCRefClearInputSource()
3641 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_UPDATE() argument
3643 WRITE_REG(TIMx->SR, ~(TIM_SR_UIF)); in LL_TIM_ClearFlag_UPDATE()
3652 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_UPDATE() argument
3654 return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_UPDATE()
3663 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC1() argument
3665 WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); in LL_TIM_ClearFlag_CC1()
3674 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC1() argument
3676 return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC1()
3685 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC2() argument
3687 WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF)); in LL_TIM_ClearFlag_CC2()
3696 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC2() argument
3698 return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC2()
3707 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC3() argument
3709 WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF)); in LL_TIM_ClearFlag_CC3()
3718 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC3() argument
3720 return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC3()
3729 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC4() argument
3731 WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF)); in LL_TIM_ClearFlag_CC4()
3740 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC4() argument
3742 return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC4()
3752 __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC5() argument
3754 WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF)); in LL_TIM_ClearFlag_CC5()
3763 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC5() argument
3765 return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC5()
3776 __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC6() argument
3778 WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF)); in LL_TIM_ClearFlag_CC6()
3787 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC6() argument
3789 return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC6()
3799 __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_COM() argument
3801 WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF)); in LL_TIM_ClearFlag_COM()
3810 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_COM() argument
3812 return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_COM()
3821 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_TRIG() argument
3823 WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); in LL_TIM_ClearFlag_TRIG()
3832 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_TRIG() argument
3834 return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_TRIG()
3843 __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_BRK() argument
3845 WRITE_REG(TIMx->SR, ~(TIM_SR_BIF)); in LL_TIM_ClearFlag_BRK()
3854 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_BRK() argument
3856 return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_BRK()
3866 __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_BRK2() argument
3868 WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF)); in LL_TIM_ClearFlag_BRK2()
3877 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_BRK2() argument
3879 return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_BRK2()
3889 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC1OVR() argument
3891 WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); in LL_TIM_ClearFlag_CC1OVR()
3901 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC1OVR() argument
3903 return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC1OVR()
3912 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC2OVR() argument
3914 WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); in LL_TIM_ClearFlag_CC2OVR()
3924 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC2OVR() argument
3926 return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC2OVR()
3935 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC3OVR() argument
3937 WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); in LL_TIM_ClearFlag_CC3OVR()
3947 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC3OVR() argument
3949 return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC3OVR()
3958 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC4OVR() argument
3960 WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); in LL_TIM_ClearFlag_CC4OVR()
3970 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC4OVR() argument
3972 return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC4OVR()
3988 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_UPDATE() argument
3990 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE()
3999 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_UPDATE() argument
4001 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE()
4010 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_UPDATE() argument
4012 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
4021 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC1() argument
4023 SET_BIT(TIMx->DIER, TIM_DIER_CC1IE); in LL_TIM_EnableIT_CC1()
4032 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC1() argument
4034 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE); in LL_TIM_DisableIT_CC1()
4043 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC1() argument
4045 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC1()
4054 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC2() argument
4056 SET_BIT(TIMx->DIER, TIM_DIER_CC2IE); in LL_TIM_EnableIT_CC2()
4065 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC2() argument
4067 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE); in LL_TIM_DisableIT_CC2()
4076 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC2() argument
4078 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC2()
4087 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC3() argument
4089 SET_BIT(TIMx->DIER, TIM_DIER_CC3IE); in LL_TIM_EnableIT_CC3()
4098 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC3() argument
4100 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE); in LL_TIM_DisableIT_CC3()
4109 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC3() argument
4111 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC3()
4120 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC4() argument
4122 SET_BIT(TIMx->DIER, TIM_DIER_CC4IE); in LL_TIM_EnableIT_CC4()
4131 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC4() argument
4133 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE); in LL_TIM_DisableIT_CC4()
4142 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC4() argument
4144 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC4()
4153 __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_COM() argument
4155 SET_BIT(TIMx->DIER, TIM_DIER_COMIE); in LL_TIM_EnableIT_COM()
4164 __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_COM() argument
4166 CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE); in LL_TIM_DisableIT_COM()
4175 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_COM() argument
4177 return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_COM()
4186 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_TRIG() argument
4188 SET_BIT(TIMx->DIER, TIM_DIER_TIE); in LL_TIM_EnableIT_TRIG()
4197 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_TRIG() argument
4199 CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE); in LL_TIM_DisableIT_TRIG()
4208 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_TRIG() argument
4210 return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_TRIG()
4219 __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_BRK() argument
4221 SET_BIT(TIMx->DIER, TIM_DIER_BIE); in LL_TIM_EnableIT_BRK()
4230 __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_BRK() argument
4232 CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE); in LL_TIM_DisableIT_BRK()
4241 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_BRK() argument
4243 return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_BRK()
4260 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_UPDATE() argument
4262 SET_BIT(TIMx->DIER, TIM_DIER_UDE); in LL_TIM_EnableDMAReq_UPDATE()
4271 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_UPDATE() argument
4273 CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE); in LL_TIM_DisableDMAReq_UPDATE()
4282 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_UPDATE() argument
4284 return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_UPDATE()
4293 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC1() argument
4295 SET_BIT(TIMx->DIER, TIM_DIER_CC1DE); in LL_TIM_EnableDMAReq_CC1()
4304 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC1() argument
4306 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE); in LL_TIM_DisableDMAReq_CC1()
4315 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC1() argument
4317 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC1()
4326 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC2() argument
4328 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4337 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC2() argument
4339 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4348 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC2() argument
4350 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
4359 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC3() argument
4361 SET_BIT(TIMx->DIER, TIM_DIER_CC3DE); in LL_TIM_EnableDMAReq_CC3()
4370 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC3() argument
4372 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE); in LL_TIM_DisableDMAReq_CC3()
4381 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC3() argument
4383 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC3()
4392 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC4() argument
4394 SET_BIT(TIMx->DIER, TIM_DIER_CC4DE); in LL_TIM_EnableDMAReq_CC4()
4403 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC4() argument
4405 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE); in LL_TIM_DisableDMAReq_CC4()
4414 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC4() argument
4416 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC4()
4434 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_UPDATE() argument
4436 SET_BIT(TIMx->EGR, TIM_EGR_UG); in LL_TIM_GenerateEvent_UPDATE()
4445 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC1() argument
4447 SET_BIT(TIMx->EGR, TIM_EGR_CC1G); in LL_TIM_GenerateEvent_CC1()
4456 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC2() argument
4458 SET_BIT(TIMx->EGR, TIM_EGR_CC2G); in LL_TIM_GenerateEvent_CC2()
4467 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC3() argument
4469 SET_BIT(TIMx->EGR, TIM_EGR_CC3G); in LL_TIM_GenerateEvent_CC3()
4478 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC4() argument
4480 SET_BIT(TIMx->EGR, TIM_EGR_CC4G); in LL_TIM_GenerateEvent_CC4()
4489 __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_COM() argument
4491 SET_BIT(TIMx->EGR, TIM_EGR_COMG); in LL_TIM_GenerateEvent_COM()
4500 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_TRIG() argument
4502 SET_BIT(TIMx->EGR, TIM_EGR_TG); in LL_TIM_GenerateEvent_TRIG()
4511 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_BRK() argument
4513 SET_BIT(TIMx->EGR, TIM_EGR_BG); in LL_TIM_GenerateEvent_BRK()
4523 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_BRK2() argument
4525 SET_BIT(TIMx->EGR, TIM_EGR_B2G); in LL_TIM_GenerateEvent_BRK2()
4538 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
4540 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
4542 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
4544 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
4546 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…
4548 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);