1663 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)  in LL_TIM_EnableCounter()  argument
1665   SET_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_EnableCounter()
1674 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)  in LL_TIM_DisableCounter()  argument
1676   CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);  in LL_TIM_DisableCounter()
1685 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledCounter()  argument
1687   return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledCounter()
1696 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_EnableUpdateEvent()  argument
1698   CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_EnableUpdateEvent()
1707 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)  in LL_TIM_DisableUpdateEvent()  argument
1709   SET_BIT(TIMx->CR1, TIM_CR1_UDIS);  in LL_TIM_DisableUpdateEvent()
1718 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledUpdateEvent()  argument
1720   return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);  in LL_TIM_IsEnabledUpdateEvent()
1739 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)  in LL_TIM_SetUpdateSource()  argument
1741   MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);  in LL_TIM_SetUpdateSource()
1752 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetUpdateSource()  argument
1754   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));  in LL_TIM_GetUpdateSource()
1766 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)  in LL_TIM_SetOnePulseMode()  argument
1768   MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);  in LL_TIM_SetOnePulseMode()
1779 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetOnePulseMode()  argument
1781   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));  in LL_TIM_GetOnePulseMode()
1803 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)  in LL_TIM_SetCounterMode()  argument
1805   MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);  in LL_TIM_SetCounterMode()
1823 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounterMode()  argument
1827   counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));  in LL_TIM_GetCounterMode()
1831     counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetCounterMode()
1843 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableARRPreload()  argument
1845   SET_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_EnableARRPreload()
1854 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableARRPreload()  argument
1856   CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);  in LL_TIM_DisableARRPreload()
1865 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledARRPreload()  argument
1867   return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledARRPreload()
1884 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)  in LL_TIM_SetClockDivision()  argument
1886   MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);  in LL_TIM_SetClockDivision()
1902 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)  in LL_TIM_GetClockDivision()  argument
1904   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));  in LL_TIM_GetClockDivision()
1917 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)  in LL_TIM_SetCounter()  argument
1919   WRITE_REG(TIMx->CNT, Counter);  in LL_TIM_SetCounter()
1931 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetCounter()  argument
1933   return (uint32_t)(READ_REG(TIMx->CNT));  in LL_TIM_GetCounter()
1944 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetDirection()  argument
1946   return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));  in LL_TIM_GetDirection()
1960 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)  in LL_TIM_SetPrescaler()  argument
1962   WRITE_REG(TIMx->PSC, Prescaler);  in LL_TIM_SetPrescaler()
1971 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_GetPrescaler()  argument
1973   return (uint32_t)(READ_REG(TIMx->PSC));  in LL_TIM_GetPrescaler()
1989 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)  in LL_TIM_SetAutoReload()  argument
1991   WRITE_REG(TIMx->ARR, AutoReload);  in LL_TIM_SetAutoReload()
2003 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)  in LL_TIM_GetAutoReload()  argument
2005   return (uint32_t)(READ_REG(TIMx->ARR));  in LL_TIM_GetAutoReload()
2018 __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)  in LL_TIM_SetRepetitionCounter()  argument
2020   WRITE_REG(TIMx->RCR, RepetitionCounter);  in LL_TIM_SetRepetitionCounter()
2031 __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)  in LL_TIM_GetRepetitionCounter()  argument
2033   return (uint32_t)(READ_REG(TIMx->RCR));  in LL_TIM_GetRepetitionCounter()
2044 __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_EnableUIFRemap()  argument
2046   SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_EnableUIFRemap()
2055 __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)  in LL_TIM_DisableUIFRemap()  argument
2057   CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);  in LL_TIM_DisableUIFRemap()
2078 __STATIC_INLINE void LL_TIM_EnableDithering(TIM_TypeDef *TIMx)  in LL_TIM_EnableDithering()  argument
2080   SET_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_EnableDithering()
2091 __STATIC_INLINE void LL_TIM_DisableDithering(TIM_TypeDef *TIMx)  in LL_TIM_DisableDithering()  argument
2093   CLEAR_BIT(TIMx->CR1, TIM_CR1_DITHEN);  in LL_TIM_DisableDithering()
2104 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDithering(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDithering()  argument
2106   return ((READ_BIT(TIMx->CR1, TIM_CR1_DITHEN) == (TIM_CR1_DITHEN)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDithering()
2127 __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_EnablePreload()  argument
2129   SET_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_EnablePreload()
2140 __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)  in LL_TIM_CC_DisablePreload()  argument
2142   CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);  in LL_TIM_CC_DisablePreload()
2151 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)  in LL_TIM_CC_IsEnabledPreload()  argument
2153   return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledPreload()
2167 __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)  in LL_TIM_CC_SetUpdate()  argument
2169   MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);  in LL_TIM_CC_SetUpdate()
2181 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)  in LL_TIM_CC_SetDMAReqTrigger()  argument
2183   MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);  in LL_TIM_CC_SetDMAReqTrigger()
2194 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)  in LL_TIM_CC_GetDMAReqTrigger()  argument
2196   return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));  in LL_TIM_CC_GetDMAReqTrigger()
2213 __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)  in LL_TIM_CC_SetLockLevel()  argument
2215   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);  in LL_TIM_CC_SetLockLevel()
2244 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_EnableChannel()  argument
2246   SET_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_EnableChannel()
2275 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_DisableChannel()  argument
2277   CLEAR_BIT(TIMx->CCER, Channels);  in LL_TIM_CC_DisableChannel()
2306 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)  in LL_TIM_CC_IsEnabledChannel()  argument
2308   return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);  in LL_TIM_CC_IsEnabledChannel()
2351 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura…  in LL_TIM_OC_ConfigOutput()  argument
2354 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_ConfigOutput()
2356   MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_OC_ConfigOutput()
2358   MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  in LL_TIM_OC_ConfigOutput()
2398 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)  in LL_TIM_OC_SetMode()  argument
2401 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_SetMode()
2439 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetMode()  argument
2442 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_GetMode()
2475 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)  in LL_TIM_OC_SetPolarity()  argument
2478 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iC…  in LL_TIM_OC_SetPolarity()
2509 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetPolarity()  argument
2512 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann…  in LL_TIM_OC_GetPolarity()
2548 __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)  in LL_TIM_OC_SetIdleState()  argument
2551 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  IdleState << SHIFT_TAB_OISx[iCh…  in LL_TIM_OC_SetIdleState()
2582 __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_GetIdleState()  argument
2585 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel…  in LL_TIM_OC_GetIdleState()
2607 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableFast()  argument
2610 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableFast()
2633 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableFast()  argument
2636 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableFast()
2659 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledFast()  argument
2662 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledFast()
2685 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnablePreload()  argument
2688 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnablePreload()
2710 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisablePreload()  argument
2713 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisablePreload()
2735 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledPreload()  argument
2738 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledPreload()
2764 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_EnableClear()  argument
2767 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_EnableClear()
2791 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_DisableClear()  argument
2794 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_OC_DisableClear()
2820 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_OC_IsEnabledClear()  argument
2823 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_OC_IsEnabledClear()
2839 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_OC_SetDeadTime()  argument
2841   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);  in LL_TIM_OC_SetDeadTime()
2857 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH1()  argument
2859   WRITE_REG(TIMx->CCR1, CompareValue);  in LL_TIM_OC_SetCompareCH1()
2875 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH2()  argument
2877   WRITE_REG(TIMx->CCR2, CompareValue);  in LL_TIM_OC_SetCompareCH2()
2893 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH3()  argument
2895   WRITE_REG(TIMx->CCR3, CompareValue);  in LL_TIM_OC_SetCompareCH3()
2911 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH4()  argument
2913   WRITE_REG(TIMx->CCR4, CompareValue);  in LL_TIM_OC_SetCompareCH4()
2926 __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH5()  argument
2928   MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);  in LL_TIM_OC_SetCompareCH5()
2941 __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)  in LL_TIM_OC_SetCompareCH6()  argument
2943   WRITE_REG(TIMx->CCR6, CompareValue);  in LL_TIM_OC_SetCompareCH6()
2958 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH1()  argument
2960   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_OC_GetCompareCH1()
2975 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH2()  argument
2977   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_OC_GetCompareCH2()
2992 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH3()  argument
2994   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_OC_GetCompareCH3()
3009 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH4()  argument
3011   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_OC_GetCompareCH4()
3023 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH5()  argument
3025   return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));  in LL_TIM_OC_GetCompareCH5()
3037 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetCompareCH6()  argument
3039   return (uint32_t)(READ_REG(TIMx->CCR6));  in LL_TIM_OC_GetCompareCH6()
3057 __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)  in LL_TIM_SetCH5CombinedChannels()  argument
3059   MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);  in LL_TIM_SetCH5CombinedChannels()
3080 __STATIC_INLINE void LL_TIM_OC_SetPulseWidthPrescaler(TIM_TypeDef *TIMx, uint32_t PulseWidthPrescal…  in LL_TIM_OC_SetPulseWidthPrescaler()  argument
3082   MODIFY_REG(TIMx->ECR, TIM_ECR_PWPRSC, PulseWidthPrescaler);  in LL_TIM_OC_SetPulseWidthPrescaler()
3102 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidthPrescaler()  argument
3104   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PWPRSC));  in LL_TIM_OC_GetPulseWidthPrescaler()
3117 __STATIC_INLINE void LL_TIM_OC_SetPulseWidth(TIM_TypeDef *TIMx, uint32_t PulseWidth)  in LL_TIM_OC_SetPulseWidth()  argument
3119   MODIFY_REG(TIMx->ECR, TIM_ECR_PW, PulseWidth << TIM_ECR_PW_Pos);  in LL_TIM_OC_SetPulseWidth()
3131 __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidth(const TIM_TypeDef *TIMx)  in LL_TIM_OC_GetPulseWidth()  argument
3133   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PW));  in LL_TIM_OC_GetPulseWidth()
3178 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)  in LL_TIM_IC_Config()  argument
3181 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_Config()
3185   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_Config()
3207 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv…  in LL_TIM_IC_SetActiveInput()  argument
3210 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetActiveInput()
3231 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetActiveInput()  argument
3234 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetActiveInput()
3257 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal…  in LL_TIM_IC_SetPrescaler()  argument
3260 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetPrescaler()
3282 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPrescaler()  argument
3285 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetPrescaler()
3320 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)  in LL_TIM_IC_SetFilter()  argument
3323 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh…  in LL_TIM_IC_SetFilter()
3357 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetFilter()  argument
3360 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM…  in LL_TIM_IC_GetFilter()
3386 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)  in LL_TIM_IC_SetPolarity()  argument
3389   MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),  in LL_TIM_IC_SetPolarity()
3414 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)  in LL_TIM_IC_GetPolarity()  argument
3417   return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>  in LL_TIM_IC_GetPolarity()
3429 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_EnableXORCombination()  argument
3431   SET_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_EnableXORCombination()
3442 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)  in LL_TIM_IC_DisableXORCombination()  argument
3444   CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);  in LL_TIM_IC_DisableXORCombination()
3455 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)  in LL_TIM_IC_IsEnabledXORCombination()  argument
3457   return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);  in LL_TIM_IC_IsEnabledXORCombination()
3472 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH1()  argument
3474   return (uint32_t)(READ_REG(TIMx->CCR1));  in LL_TIM_IC_GetCaptureCH1()
3489 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH2()  argument
3491   return (uint32_t)(READ_REG(TIMx->CCR2));  in LL_TIM_IC_GetCaptureCH2()
3506 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH3()  argument
3508   return (uint32_t)(READ_REG(TIMx->CCR3));  in LL_TIM_IC_GetCaptureCH3()
3523 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)  in LL_TIM_IC_GetCaptureCH4()  argument
3525   return (uint32_t)(READ_REG(TIMx->CCR4));  in LL_TIM_IC_GetCaptureCH4()
3544 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_EnableExternalClock()  argument
3546   SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_EnableExternalClock()
3557 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)  in LL_TIM_DisableExternalClock()  argument
3559   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);  in LL_TIM_DisableExternalClock()
3570 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledExternalClock()  argument
3572   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledExternalClock()
3594 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)  in LL_TIM_SetClockSource()  argument
3596   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);  in LL_TIM_SetClockSource()
3617 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)  in LL_TIM_SetEncoderMode()  argument
3619   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);  in LL_TIM_SetEncoderMode()
3647 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)  in LL_TIM_SetTriggerOutput()  argument
3649   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);  in LL_TIM_SetTriggerOutput()
3677 __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)  in LL_TIM_SetTriggerOutput2()  argument
3679   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);  in LL_TIM_SetTriggerOutput2()
3697 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)  in LL_TIM_SetSlaveMode()  argument
3699   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);  in LL_TIM_SetSlaveMode()
3730 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)  in LL_TIM_SetTriggerInput()  argument
3732   MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);  in LL_TIM_SetTriggerInput()
3743 __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_EnableMasterSlaveMode()  argument
3745   SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_EnableMasterSlaveMode()
3756 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)  in LL_TIM_DisableMasterSlaveMode()  argument
3758   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);  in LL_TIM_DisableMasterSlaveMode()
3769 __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledMasterSlaveMode()  argument
3771   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);  in LL_TIM_IsEnabledMasterSlaveMode()
3809 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale…  in LL_TIM_ConfigETR()  argument
3812 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E…  in LL_TIM_ConfigETR()
3888 __STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)  in LL_TIM_SetETRSource()  argument
3890   MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource);  in LL_TIM_SetETRSource()
3901 __STATIC_INLINE void LL_TIM_EnableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableSMSPreload()  argument
3903   SET_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_EnableSMSPreload()
3914 __STATIC_INLINE void LL_TIM_DisableSMSPreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableSMSPreload()  argument
3916   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_SMSPE);  in LL_TIM_DisableSMSPreload()
3927 __STATIC_INLINE uint32_t LL_TIM_IsEnabledSMSPreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledSMSPreload()  argument
3929   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPE) == (TIM_SMCR_SMSPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledSMSPreload()
3943 __STATIC_INLINE void LL_TIM_SetSMSPreloadSource(TIM_TypeDef *TIMx, uint32_t PreloadSource)  in LL_TIM_SetSMSPreloadSource()  argument
3945   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMSPS, PreloadSource);  in LL_TIM_SetSMSPreloadSource()
3958 __STATIC_INLINE uint32_t LL_TIM_GetSMSPreloadSource(const TIM_TypeDef *TIMx)  in LL_TIM_GetSMSPreloadSource()  argument
3960   return (uint32_t)(READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPS));  in LL_TIM_GetSMSPreloadSource()
3978 __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK()  argument
3981   SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_EnableBRK()
3983   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK()
3995 __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK()  argument
3998   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_DisableBRK()
4000   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK()
4046 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilt…  in LL_TIM_ConfigBRK()  argument
4050 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |…  in LL_TIM_ConfigBRK()
4052   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK()
4066 __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK()  argument
4068   SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);  in LL_TIM_DisarmBRK()
4079 __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_EnableBRK2()  argument
4082   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_EnableBRK2()
4084   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK2()
4096 __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisableBRK2()  argument
4099   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_DisableBRK2()
4101   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK2()
4147 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F…  in LL_TIM_ConfigBRK2()  argument
4151 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil…  in LL_TIM_ConfigBRK2()
4153   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK2()
4167 __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx)  in LL_TIM_DisarmBRK2()  argument
4169   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);  in LL_TIM_DisarmBRK2()
4187 __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat…  in LL_TIM_SetOffStates()  argument
4189   MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);  in LL_TIM_SetOffStates()
4200 __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_EnableAutomaticOutput()  argument
4202   SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_EnableAutomaticOutput()
4213 __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)  in LL_TIM_DisableAutomaticOutput()  argument
4215   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_DisableAutomaticOutput()
4226 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAutomaticOutput()  argument
4228   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAutomaticOutput()
4241 __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_EnableAllOutputs()  argument
4243   SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_EnableAllOutputs()
4256 __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)  in LL_TIM_DisableAllOutputs()  argument
4258   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_DisableAllOutputs()
4269 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAllOutputs()  argument
4271   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAllOutputs()
4288 __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t…  in LL_TIM_EnableBreakInputSource()  argument
4290   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_EnableBreakInputSource()
4308 __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_…  in LL_TIM_DisableBreakInputSource()  argument
4310   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_DisableBreakInputSource()
4331 __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin…  in LL_TIM_SetBreakInputSourcePolarity()  argument
4334   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));  in LL_TIM_SetBreakInputSourcePolarity()
4345 __STATIC_INLINE void LL_TIM_EnableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_EnableAsymmetricalDeadTime()  argument
4347   SET_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_EnableAsymmetricalDeadTime()
4358 __STATIC_INLINE void LL_TIM_DisableAsymmetricalDeadTime(TIM_TypeDef *TIMx)  in LL_TIM_DisableAsymmetricalDeadTime()  argument
4360   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTAE);  in LL_TIM_DisableAsymmetricalDeadTime()
4371 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledAsymmetricalDeadTime()  argument
4373   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTAE) == (TIM_DTR2_DTAE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAsymmetricalDeadTime()
4389 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)  in LL_TIM_SetFallingDeadTime()  argument
4391   MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime);  in LL_TIM_SetFallingDeadTime()
4405 __STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(const TIM_TypeDef *TIMx)  in LL_TIM_GetFallingDeadTime()  argument
4407   return (uint32_t)(READ_BIT(TIMx->DTR2, TIM_DTR2_DTGF));  in LL_TIM_GetFallingDeadTime()
4418 __STATIC_INLINE void LL_TIM_EnableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_EnableDeadTimePreload()  argument
4420   SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_EnableDeadTimePreload()
4431 __STATIC_INLINE void LL_TIM_DisableDeadTimePreload(TIM_TypeDef *TIMx)  in LL_TIM_DisableDeadTimePreload()  argument
4433   CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE);  in LL_TIM_DisableDeadTimePreload()
4444 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDeadTimePreload(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDeadTimePreload()  argument
4446   return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDeadTimePreload()
4527 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_…  in LL_TIM_ConfigDMABurst()  argument
4530   MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA | TIM_DCR_DBSS),  in LL_TIM_ConfigDMABurst()
4550 __STATIC_INLINE void LL_TIM_EnableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableEncoderIndex()  argument
4552   SET_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_EnableEncoderIndex()
4563 __STATIC_INLINE void LL_TIM_DisableEncoderIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableEncoderIndex()  argument
4565   CLEAR_BIT(TIMx->ECR, TIM_ECR_IE);  in LL_TIM_DisableEncoderIndex()
4576 __STATIC_INLINE uint32_t LL_TIM_IsEnabledEncoderIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledEncoderIndex()  argument
4578   return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U);  in LL_TIM_IsEnabledEncoderIndex()
4593 __STATIC_INLINE void LL_TIM_SetIndexDirection(TIM_TypeDef *TIMx, uint32_t IndexDirection)  in LL_TIM_SetIndexDirection()  argument
4595   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR, IndexDirection);  in LL_TIM_SetIndexDirection()
4609 __STATIC_INLINE uint32_t LL_TIM_GetIndexDirection(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexDirection()  argument
4611   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IDIR));  in LL_TIM_GetIndexDirection()
4626 __STATIC_INLINE void LL_TIM_SetIndexblanking(TIM_TypeDef *TIMx, uint32_t Indexblanking)  in LL_TIM_SetIndexblanking()  argument
4628   MODIFY_REG(TIMx->ECR, TIM_ECR_IBLK, Indexblanking);  in LL_TIM_SetIndexblanking()
4642 __STATIC_INLINE uint32_t LL_TIM_GetIndexblanking(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexblanking()  argument
4644   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IBLK));  in LL_TIM_GetIndexblanking()
4656 __STATIC_INLINE void LL_TIM_EnableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_EnableFirstIndex()  argument
4658   SET_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_EnableFirstIndex()
4669 __STATIC_INLINE void LL_TIM_DisableFirstIndex(TIM_TypeDef *TIMx)  in LL_TIM_DisableFirstIndex()  argument
4671   CLEAR_BIT(TIMx->ECR, TIM_ECR_FIDX);  in LL_TIM_DisableFirstIndex()
4682 __STATIC_INLINE uint32_t LL_TIM_IsEnabledFirstIndex(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledFirstIndex()  argument
4684   return ((READ_BIT(TIMx->ECR, TIM_ECR_FIDX) == (TIM_ECR_FIDX)) ? 1UL : 0UL);  in LL_TIM_IsEnabledFirstIndex()
4702 __STATIC_INLINE void LL_TIM_SetIndexPositionning(TIM_TypeDef *TIMx, uint32_t IndexPositionning)  in LL_TIM_SetIndexPositionning()  argument
4704   MODIFY_REG(TIMx->ECR, TIM_ECR_IPOS, IndexPositionning);  in LL_TIM_SetIndexPositionning()
4721 __STATIC_INLINE uint32_t LL_TIM_GetIndexPositionning(const TIM_TypeDef *TIMx)  in LL_TIM_GetIndexPositionning()  argument
4723   return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IPOS));  in LL_TIM_GetIndexPositionning()
4742 __STATIC_INLINE void LL_TIM_ConfigIDX(TIM_TypeDef *TIMx, uint32_t Configuration)  in LL_TIM_ConfigIDX()  argument
4744   MODIFY_REG(TIMx->ECR, TIM_ECR_IDIR | TIM_ECR_IBLK | TIM_ECR_FIDX | TIM_ECR_IPOS, Configuration);  in LL_TIM_ConfigIDX()
4814 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)  in LL_TIM_SetRemap()  argument
4816 …MODIFY_REG(TIMx->TISEL, (TIM_TISEL_TI1SEL | TIM_TISEL_TI2SEL | TIM_TISEL_TI3SEL | TIM_TISEL_TI4SEL…  in LL_TIM_SetRemap()
4832 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_UPDATE()  argument
4834   WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));  in LL_TIM_ClearFlag_UPDATE()
4843 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_UPDATE()  argument
4845   return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_UPDATE()
4854 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1()  argument
4856   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));  in LL_TIM_ClearFlag_CC1()
4865 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1()  argument
4867   return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1()
4876 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2()  argument
4878   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));  in LL_TIM_ClearFlag_CC2()
4887 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2()  argument
4889   return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2()
4898 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3()  argument
4900   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));  in LL_TIM_ClearFlag_CC3()
4909 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3()  argument
4911   return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3()
4920 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4()  argument
4922   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));  in LL_TIM_ClearFlag_CC4()
4931 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4()  argument
4933   return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4()
4942 __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC5()  argument
4944   WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));  in LL_TIM_ClearFlag_CC5()
4953 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC5()  argument
4955   return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC5()
4964 __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC6()  argument
4966   WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));  in LL_TIM_ClearFlag_CC6()
4975 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC6()  argument
4977   return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC6()
4986 __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_COM()  argument
4988   WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));  in LL_TIM_ClearFlag_COM()
4997 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_COM()  argument
4999   return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_COM()
5008 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TRIG()  argument
5010   WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));  in LL_TIM_ClearFlag_TRIG()
5019 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TRIG()  argument
5021   return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TRIG()
5030 __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK()  argument
5032   WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));  in LL_TIM_ClearFlag_BRK()
5041 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK()  argument
5043   return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK()
5052 __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_BRK2()  argument
5054   WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));  in LL_TIM_ClearFlag_BRK2()
5063 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_BRK2()  argument
5065   return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_BRK2()
5074 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC1OVR()  argument
5076   WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));  in LL_TIM_ClearFlag_CC1OVR()
5086 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC1OVR()  argument
5088   return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC1OVR()
5097 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC2OVR()  argument
5099   WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));  in LL_TIM_ClearFlag_CC2OVR()
5109 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC2OVR()  argument
5111   return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC2OVR()
5120 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC3OVR()  argument
5122   WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));  in LL_TIM_ClearFlag_CC3OVR()
5132 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC3OVR()  argument
5134   return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC3OVR()
5143 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_CC4OVR()  argument
5145   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));  in LL_TIM_ClearFlag_CC4OVR()
5155 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_CC4OVR()  argument
5157   return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_CC4OVR()
5166 __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_SYSBRK()  argument
5168   WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));  in LL_TIM_ClearFlag_SYSBRK()
5177 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_SYSBRK()  argument
5179   return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_SYSBRK()
5190 __STATIC_INLINE void LL_TIM_ClearFlag_TERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_TERR()  argument
5192   WRITE_REG(TIMx->SR, ~(TIM_SR_TERRF));  in LL_TIM_ClearFlag_TERR()
5203 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_TERR()  argument
5205   return ((READ_BIT(TIMx->SR, TIM_SR_TERRF) == (TIM_SR_TERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_TERR()
5216 __STATIC_INLINE void LL_TIM_ClearFlag_IERR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IERR()  argument
5218   WRITE_REG(TIMx->SR, ~(TIM_SR_IERRF));  in LL_TIM_ClearFlag_IERR()
5229 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IERR()  argument
5231   return ((READ_BIT(TIMx->SR, TIM_SR_IERRF) == (TIM_SR_IERRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IERR()
5242 __STATIC_INLINE void LL_TIM_ClearFlag_DIR(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_DIR()  argument
5244   WRITE_REG(TIMx->SR, ~(TIM_SR_DIRF));  in LL_TIM_ClearFlag_DIR()
5255 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_DIR()  argument
5257   return ((READ_BIT(TIMx->SR, TIM_SR_DIRF) == (TIM_SR_DIRF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_DIR()
5268 __STATIC_INLINE void LL_TIM_ClearFlag_IDX(TIM_TypeDef *TIMx)  in LL_TIM_ClearFlag_IDX()  argument
5270   WRITE_REG(TIMx->SR, ~(TIM_SR_IDXF));  in LL_TIM_ClearFlag_IDX()
5281 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsActiveFlag_IDX()  argument
5283   return ((READ_BIT(TIMx->SR, TIM_SR_IDXF) == (TIM_SR_IDXF)) ? 1UL : 0UL);  in LL_TIM_IsActiveFlag_IDX()
5298 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_UPDATE()  argument
5300   SET_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_EnableIT_UPDATE()
5309 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_UPDATE()  argument
5311   CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);  in LL_TIM_DisableIT_UPDATE()
5320 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_UPDATE()  argument
5322   return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_UPDATE()
5331 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC1()  argument
5333   SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_EnableIT_CC1()
5342 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC1()  argument
5344   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);  in LL_TIM_DisableIT_CC1()
5353 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC1()  argument
5355   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC1()
5364 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC2()  argument
5366   SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_EnableIT_CC2()
5375 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC2()  argument
5377   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);  in LL_TIM_DisableIT_CC2()
5386 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC2()  argument
5388   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC2()
5397 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC3()  argument
5399   SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_EnableIT_CC3()
5408 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC3()  argument
5410   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);  in LL_TIM_DisableIT_CC3()
5419 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC3()  argument
5421   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC3()
5430 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_CC4()  argument
5432   SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_EnableIT_CC4()
5441 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_CC4()  argument
5443   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);  in LL_TIM_DisableIT_CC4()
5452 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_CC4()  argument
5454   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_CC4()
5463 __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_COM()  argument
5465   SET_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_EnableIT_COM()
5474 __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_COM()  argument
5476   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);  in LL_TIM_DisableIT_COM()
5485 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_COM()  argument
5487   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_COM()
5496 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TRIG()  argument
5498   SET_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_EnableIT_TRIG()
5507 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TRIG()  argument
5509   CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);  in LL_TIM_DisableIT_TRIG()
5518 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TRIG()  argument
5520   return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TRIG()
5529 __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_BRK()  argument
5531   SET_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_EnableIT_BRK()
5540 __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_BRK()  argument
5542   CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);  in LL_TIM_DisableIT_BRK()
5551 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_BRK()  argument
5553   return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_BRK()
5564 __STATIC_INLINE void LL_TIM_EnableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_TERR()  argument
5566   SET_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_EnableIT_TERR()
5577 __STATIC_INLINE void LL_TIM_DisableIT_TERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_TERR()  argument
5579   CLEAR_BIT(TIMx->DIER, TIM_DIER_TERRIE);  in LL_TIM_DisableIT_TERR()
5590 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_TERR()  argument
5592   return ((READ_BIT(TIMx->DIER, TIM_DIER_TERRIE) == (TIM_DIER_TERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_TERR()
5603 __STATIC_INLINE void LL_TIM_EnableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IERR()  argument
5605   SET_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_EnableIT_IERR()
5616 __STATIC_INLINE void LL_TIM_DisableIT_IERR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IERR()  argument
5618   CLEAR_BIT(TIMx->DIER, TIM_DIER_IERRIE);  in LL_TIM_DisableIT_IERR()
5629 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IERR()  argument
5631   return ((READ_BIT(TIMx->DIER, TIM_DIER_IERRIE) == (TIM_DIER_IERRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IERR()
5642 __STATIC_INLINE void LL_TIM_EnableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_DIR()  argument
5644   SET_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_EnableIT_DIR()
5655 __STATIC_INLINE void LL_TIM_DisableIT_DIR(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_DIR()  argument
5657   CLEAR_BIT(TIMx->DIER, TIM_DIER_DIRIE);  in LL_TIM_DisableIT_DIR()
5668 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_DIR()  argument
5670   return ((READ_BIT(TIMx->DIER, TIM_DIER_DIRIE) == (TIM_DIER_DIRIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_DIR()
5681 __STATIC_INLINE void LL_TIM_EnableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_EnableIT_IDX()  argument
5683   SET_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_EnableIT_IDX()
5694 __STATIC_INLINE void LL_TIM_DisableIT_IDX(TIM_TypeDef *TIMx)  in LL_TIM_DisableIT_IDX()  argument
5696   CLEAR_BIT(TIMx->DIER, TIM_DIER_IDXIE);  in LL_TIM_DisableIT_IDX()
5707 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledIT_IDX()  argument
5709   return ((READ_BIT(TIMx->DIER, TIM_DIER_IDXIE) == (TIM_DIER_IDXIE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledIT_IDX()
5725 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_UPDATE()  argument
5727   SET_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_EnableDMAReq_UPDATE()
5736 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_UPDATE()  argument
5738   CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);  in LL_TIM_DisableDMAReq_UPDATE()
5747 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_UPDATE()  argument
5749   return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_UPDATE()
5758 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC1()  argument
5760   SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_EnableDMAReq_CC1()
5769 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC1()  argument
5771   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);  in LL_TIM_DisableDMAReq_CC1()
5780 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC1()  argument
5782   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC1()
5791 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC2()  argument
5793   SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_EnableDMAReq_CC2()
5802 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC2()  argument
5804   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);  in LL_TIM_DisableDMAReq_CC2()
5813 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC2()  argument
5815   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC2()
5824 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC3()  argument
5826   SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_EnableDMAReq_CC3()
5835 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC3()  argument
5837   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);  in LL_TIM_DisableDMAReq_CC3()
5846 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC3()  argument
5848   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC3()
5857 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_CC4()  argument
5859   SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_EnableDMAReq_CC4()
5868 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_CC4()  argument
5870   CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);  in LL_TIM_DisableDMAReq_CC4()
5879 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_CC4()  argument
5881   return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_CC4()
5890 __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_COM()  argument
5892   SET_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_EnableDMAReq_COM()
5901 __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_COM()  argument
5903   CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);  in LL_TIM_DisableDMAReq_COM()
5912 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_COM()  argument
5914   return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_COM()
5923 __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_EnableDMAReq_TRIG()  argument
5925   SET_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_EnableDMAReq_TRIG()
5934 __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_DisableDMAReq_TRIG()  argument
5936   CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);  in LL_TIM_DisableDMAReq_TRIG()
5945 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)  in LL_TIM_IsEnabledDMAReq_TRIG()  argument
5947   return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledDMAReq_TRIG()
5963 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_UPDATE()  argument
5965   SET_BIT(TIMx->EGR, TIM_EGR_UG);  in LL_TIM_GenerateEvent_UPDATE()
5974 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC1()  argument
5976   SET_BIT(TIMx->EGR, TIM_EGR_CC1G);  in LL_TIM_GenerateEvent_CC1()
5985 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC2()  argument
5987   SET_BIT(TIMx->EGR, TIM_EGR_CC2G);  in LL_TIM_GenerateEvent_CC2()
5996 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC3()  argument
5998   SET_BIT(TIMx->EGR, TIM_EGR_CC3G);  in LL_TIM_GenerateEvent_CC3()
6007 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_CC4()  argument
6009   SET_BIT(TIMx->EGR, TIM_EGR_CC4G);  in LL_TIM_GenerateEvent_CC4()
6018 __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_COM()  argument
6020   SET_BIT(TIMx->EGR, TIM_EGR_COMG);  in LL_TIM_GenerateEvent_COM()
6029 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_TRIG()  argument
6031   SET_BIT(TIMx->EGR, TIM_EGR_TG);  in LL_TIM_GenerateEvent_TRIG()
6040 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK()  argument
6042   SET_BIT(TIMx->EGR, TIM_EGR_BG);  in LL_TIM_GenerateEvent_BRK()
6051 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)  in LL_TIM_GenerateEvent_BRK2()  argument
6053   SET_BIT(TIMx->EGR, TIM_EGR_B2G);  in LL_TIM_GenerateEvent_BRK2()
6065 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
6067 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
6069 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
6071 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
6073 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…
6075 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_Hall…
6077 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);