Lines Matching refs:TIMx
1463 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) in LL_TIM_EnableCounter() argument
1465 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1474 __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) in LL_TIM_DisableCounter() argument
1476 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1485 __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledCounter() argument
1487 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
1496 __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_EnableUpdateEvent() argument
1498 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1507 __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) in LL_TIM_DisableUpdateEvent() argument
1509 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
1518 __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledUpdateEvent() argument
1520 return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL); in LL_TIM_IsEnabledUpdateEvent()
1539 __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource) in LL_TIM_SetUpdateSource() argument
1541 MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource); in LL_TIM_SetUpdateSource()
1552 __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx) in LL_TIM_GetUpdateSource() argument
1554 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS)); in LL_TIM_GetUpdateSource()
1566 __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) in LL_TIM_SetOnePulseMode() argument
1568 MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); in LL_TIM_SetOnePulseMode()
1579 __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx) in LL_TIM_GetOnePulseMode() argument
1581 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); in LL_TIM_GetOnePulseMode()
1603 __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) in LL_TIM_SetCounterMode() argument
1605 MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode); in LL_TIM_SetCounterMode()
1623 __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) in LL_TIM_GetCounterMode() argument
1627 counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS)); in LL_TIM_GetCounterMode()
1631 counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); in LL_TIM_GetCounterMode()
1643 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) in LL_TIM_EnableARRPreload() argument
1645 SET_BIT(TIMx->CR1, TIM_CR1_ARPE); in LL_TIM_EnableARRPreload()
1654 __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) in LL_TIM_DisableARRPreload() argument
1656 CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); in LL_TIM_DisableARRPreload()
1665 __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledARRPreload() argument
1667 return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledARRPreload()
1684 __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision) in LL_TIM_SetClockDivision() argument
1686 MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); in LL_TIM_SetClockDivision()
1702 __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx) in LL_TIM_GetClockDivision() argument
1704 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); in LL_TIM_GetClockDivision()
1716 __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) in LL_TIM_SetCounter() argument
1718 WRITE_REG(TIMx->CNT, Counter); in LL_TIM_SetCounter()
1729 __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) in LL_TIM_GetCounter() argument
1731 return (uint32_t)(READ_REG(TIMx->CNT)); in LL_TIM_GetCounter()
1742 __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx) in LL_TIM_GetDirection() argument
1744 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); in LL_TIM_GetDirection()
1758 __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) in LL_TIM_SetPrescaler() argument
1760 WRITE_REG(TIMx->PSC, Prescaler); in LL_TIM_SetPrescaler()
1769 __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx) in LL_TIM_GetPrescaler() argument
1771 return (uint32_t)(READ_REG(TIMx->PSC)); in LL_TIM_GetPrescaler()
1785 __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) in LL_TIM_SetAutoReload() argument
1787 WRITE_REG(TIMx->ARR, AutoReload); in LL_TIM_SetAutoReload()
1798 __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx) in LL_TIM_GetAutoReload() argument
1800 return (uint32_t)(READ_REG(TIMx->ARR)); in LL_TIM_GetAutoReload()
1813 __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter) in LL_TIM_SetRepetitionCounter() argument
1815 WRITE_REG(TIMx->RCR, RepetitionCounter); in LL_TIM_SetRepetitionCounter()
1826 __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx) in LL_TIM_GetRepetitionCounter() argument
1828 return (uint32_t)(READ_REG(TIMx->RCR)); in LL_TIM_GetRepetitionCounter()
1839 __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx) in LL_TIM_EnableUIFRemap() argument
1841 SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); in LL_TIM_EnableUIFRemap()
1850 __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx) in LL_TIM_DisableUIFRemap() argument
1852 CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); in LL_TIM_DisableUIFRemap()
1883 __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx) in LL_TIM_CC_EnablePreload() argument
1885 SET_BIT(TIMx->CR2, TIM_CR2_CCPC); in LL_TIM_CC_EnablePreload()
1896 __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx) in LL_TIM_CC_DisablePreload() argument
1898 CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC); in LL_TIM_CC_DisablePreload()
1907 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) in LL_TIM_CC_IsEnabledPreload() argument
1909 return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); in LL_TIM_CC_IsEnabledPreload()
1923 __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource) in LL_TIM_CC_SetUpdate() argument
1925 MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource); in LL_TIM_CC_SetUpdate()
1937 __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger) in LL_TIM_CC_SetDMAReqTrigger() argument
1939 MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); in LL_TIM_CC_SetDMAReqTrigger()
1950 __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx) in LL_TIM_CC_GetDMAReqTrigger() argument
1952 return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); in LL_TIM_CC_GetDMAReqTrigger()
1969 __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel) in LL_TIM_CC_SetLockLevel() argument
1971 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
1998 __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_EnableChannel() argument
2000 SET_BIT(TIMx->CCER, Channels); in LL_TIM_CC_EnableChannel()
2027 __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_DisableChannel() argument
2029 CLEAR_BIT(TIMx->CCER, Channels); in LL_TIM_CC_DisableChannel()
2056 __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels) in LL_TIM_CC_IsEnabledChannel() argument
2058 return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL); in LL_TIM_CC_IsEnabledChannel()
2101 __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura… in LL_TIM_OC_ConfigOutput() argument
2104 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_ConfigOutput()
2106 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2108 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2146 __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) in LL_TIM_OC_SetMode() argument
2149 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_SetMode()
2185 __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetMode() argument
2188 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_GetMode()
2219 __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) in LL_TIM_OC_SetPolarity() argument
2222 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
2251 __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetPolarity() argument
2254 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
2288 __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState) in LL_TIM_OC_SetIdleState() argument
2291 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2320 __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_GetIdleState() argument
2323 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
2345 __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnableFast() argument
2348 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnableFast()
2371 __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisableFast() argument
2374 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisableFast()
2397 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledFast() argument
2400 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledFast()
2423 __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnablePreload() argument
2426 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnablePreload()
2448 __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisablePreload() argument
2451 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisablePreload()
2473 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledPreload() argument
2476 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledPreload()
2502 __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_EnableClear() argument
2505 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_EnableClear()
2529 __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_DisableClear() argument
2532 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_OC_DisableClear()
2558 __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_OC_IsEnabledClear() argument
2561 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_OC_IsEnabledClear()
2577 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2579 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
2594 __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH1() argument
2596 WRITE_REG(TIMx->CCR1, CompareValue); in LL_TIM_OC_SetCompareCH1()
2611 __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH2() argument
2613 WRITE_REG(TIMx->CCR2, CompareValue); in LL_TIM_OC_SetCompareCH2()
2628 __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH3() argument
2630 WRITE_REG(TIMx->CCR3, CompareValue); in LL_TIM_OC_SetCompareCH3()
2645 __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH4() argument
2647 WRITE_REG(TIMx->CCR4, CompareValue); in LL_TIM_OC_SetCompareCH4()
2659 __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH5() argument
2661 MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue); in LL_TIM_OC_SetCompareCH5()
2673 __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue) in LL_TIM_OC_SetCompareCH6() argument
2675 WRITE_REG(TIMx->CCR6, CompareValue); in LL_TIM_OC_SetCompareCH6()
2689 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH1() argument
2691 return (uint32_t)(READ_REG(TIMx->CCR1)); in LL_TIM_OC_GetCompareCH1()
2705 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH2() argument
2707 return (uint32_t)(READ_REG(TIMx->CCR2)); in LL_TIM_OC_GetCompareCH2()
2721 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH3() argument
2723 return (uint32_t)(READ_REG(TIMx->CCR3)); in LL_TIM_OC_GetCompareCH3()
2737 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH4() argument
2739 return (uint32_t)(READ_REG(TIMx->CCR4)); in LL_TIM_OC_GetCompareCH4()
2750 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH5() argument
2752 return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5)); in LL_TIM_OC_GetCompareCH5()
2763 __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) in LL_TIM_OC_GetCompareCH6() argument
2765 return (uint32_t)(READ_REG(TIMx->CCR6)); in LL_TIM_OC_GetCompareCH6()
2783 __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5) in LL_TIM_SetCH5CombinedChannels() argument
2785 MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5); in LL_TIM_SetCH5CombinedChannels()
2830 __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) in LL_TIM_IC_Config() argument
2833 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_Config()
2837 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
2859 __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv… in LL_TIM_IC_SetActiveInput() argument
2862 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetActiveInput()
2883 __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetActiveInput() argument
2886 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetActiveInput()
2909 __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal… in LL_TIM_IC_SetPrescaler() argument
2912 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetPrescaler()
2934 __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetPrescaler() argument
2937 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetPrescaler()
2972 __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) in LL_TIM_IC_SetFilter() argument
2975 …__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh… in LL_TIM_IC_SetFilter()
3009 __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetFilter() argument
3012 …const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCM… in LL_TIM_IC_GetFilter()
3038 __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity) in LL_TIM_IC_SetPolarity() argument
3041 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
3066 __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) in LL_TIM_IC_GetPolarity() argument
3069 return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> in LL_TIM_IC_GetPolarity()
3081 __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) in LL_TIM_IC_EnableXORCombination() argument
3083 SET_BIT(TIMx->CR2, TIM_CR2_TI1S); in LL_TIM_IC_EnableXORCombination()
3094 __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx) in LL_TIM_IC_DisableXORCombination() argument
3096 CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); in LL_TIM_IC_DisableXORCombination()
3107 __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) in LL_TIM_IC_IsEnabledXORCombination() argument
3109 return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL); in LL_TIM_IC_IsEnabledXORCombination()
3123 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH1() argument
3125 return (uint32_t)(READ_REG(TIMx->CCR1)); in LL_TIM_IC_GetCaptureCH1()
3139 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH2() argument
3141 return (uint32_t)(READ_REG(TIMx->CCR2)); in LL_TIM_IC_GetCaptureCH2()
3155 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH3() argument
3157 return (uint32_t)(READ_REG(TIMx->CCR3)); in LL_TIM_IC_GetCaptureCH3()
3171 __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx) in LL_TIM_IC_GetCaptureCH4() argument
3173 return (uint32_t)(READ_REG(TIMx->CCR4)); in LL_TIM_IC_GetCaptureCH4()
3192 __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx) in LL_TIM_EnableExternalClock() argument
3194 SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_EnableExternalClock()
3205 __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx) in LL_TIM_DisableExternalClock() argument
3207 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_DisableExternalClock()
3218 __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledExternalClock() argument
3220 return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); in LL_TIM_IsEnabledExternalClock()
3242 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) in LL_TIM_SetClockSource() argument
3244 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); in LL_TIM_SetClockSource()
3259 __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) in LL_TIM_SetEncoderMode() argument
3261 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); in LL_TIM_SetEncoderMode()
3288 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) in LL_TIM_SetTriggerOutput() argument
3290 MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); in LL_TIM_SetTriggerOutput()
3318 __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization) in LL_TIM_SetTriggerOutput2() argument
3320 MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization); in LL_TIM_SetTriggerOutput2()
3337 __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) in LL_TIM_SetSlaveMode() argument
3339 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); in LL_TIM_SetSlaveMode()
3359 __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) in LL_TIM_SetTriggerInput() argument
3361 MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); in LL_TIM_SetTriggerInput()
3372 __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx) in LL_TIM_EnableMasterSlaveMode() argument
3374 SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_EnableMasterSlaveMode()
3385 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) in LL_TIM_DisableMasterSlaveMode() argument
3387 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_DisableMasterSlaveMode()
3398 __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledMasterSlaveMode() argument
3400 return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL); in LL_TIM_IsEnabledMasterSlaveMode()
3438 __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale… in LL_TIM_ConfigETR() argument
3441 …MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | E… in LL_TIM_ConfigETR()
3478 __STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource) in LL_TIM_SetETRSource() argument
3480 MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource); in LL_TIM_SetETRSource()
3498 __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx) in LL_TIM_EnableBRK() argument
3500 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3511 __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx) in LL_TIM_DisableBRK() argument
3513 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3558 __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilt… in LL_TIM_ConfigBRK() argument
3561 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3574 __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx) in LL_TIM_DisarmBRK() argument
3576 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3587 __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx) in LL_TIM_EnableBRK2() argument
3589 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3600 __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx) in LL_TIM_DisableBRK2() argument
3602 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3647 __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F… in LL_TIM_ConfigBRK2() argument
3650 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
3663 __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx) in LL_TIM_DisarmBRK2() argument
3665 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM); in LL_TIM_DisarmBRK2()
3683 __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat… in LL_TIM_SetOffStates() argument
3685 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
3696 __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx) in LL_TIM_EnableAutomaticOutput() argument
3698 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
3709 __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx) in LL_TIM_DisableAutomaticOutput() argument
3711 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_DisableAutomaticOutput()
3722 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledAutomaticOutput() argument
3724 return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL); in LL_TIM_IsEnabledAutomaticOutput()
3737 __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx) in LL_TIM_EnableAllOutputs() argument
3739 SET_BIT(TIMx->BDTR, TIM_BDTR_MOE); in LL_TIM_EnableAllOutputs()
3752 __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx) in LL_TIM_DisableAllOutputs() argument
3754 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE); in LL_TIM_DisableAllOutputs()
3765 __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledAllOutputs() argument
3767 return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL); in LL_TIM_IsEnabledAllOutputs()
3792 __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t… in LL_TIM_EnableBreakInputSource() argument
3794 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput)); in LL_TIM_EnableBreakInputSource()
3820 __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_… in LL_TIM_DisableBreakInputSource() argument
3822 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput)); in LL_TIM_DisableBreakInputSource()
3851 __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin… in LL_TIM_SetBreakInputSourcePolarity() argument
3854 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput)); in LL_TIM_SetBreakInputSourcePolarity()
3918 __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_… in LL_TIM_ConfigDMABurst() argument
3920 MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength)); in LL_TIM_ConfigDMABurst()
4003 __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap) in LL_TIM_SetRemap() argument
4005 …MODIFY_REG(TIMx->TISEL, (TIM_TISEL_TI1SEL | TIM_TISEL_TI2SEL | TIM_TISEL_TI3SEL | TIM_TISEL_TI4SEL… in LL_TIM_SetRemap()
4031 __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSou… in LL_TIM_SetOCRefClearInputSource() argument
4033 MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, in LL_TIM_SetOCRefClearInputSource()
4035 MODIFY_REG(TIMx->OR1, TIM_OR1_OCREF_CLR, OCRefClearInputSource); in LL_TIM_SetOCRefClearInputSource()
4050 __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_UPDATE() argument
4052 WRITE_REG(TIMx->SR, ~(TIM_SR_UIF)); in LL_TIM_ClearFlag_UPDATE()
4061 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_UPDATE() argument
4063 return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_UPDATE()
4072 __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC1() argument
4074 WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); in LL_TIM_ClearFlag_CC1()
4083 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC1() argument
4085 return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC1()
4094 __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC2() argument
4096 WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF)); in LL_TIM_ClearFlag_CC2()
4105 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC2() argument
4107 return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC2()
4116 __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC3() argument
4118 WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF)); in LL_TIM_ClearFlag_CC3()
4127 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC3() argument
4129 return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC3()
4138 __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC4() argument
4140 WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF)); in LL_TIM_ClearFlag_CC4()
4149 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC4() argument
4151 return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC4()
4160 __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC5() argument
4162 WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF)); in LL_TIM_ClearFlag_CC5()
4171 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC5() argument
4173 return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC5()
4182 __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC6() argument
4184 WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF)); in LL_TIM_ClearFlag_CC6()
4193 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC6() argument
4195 return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC6()
4204 __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_COM() argument
4206 WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF)); in LL_TIM_ClearFlag_COM()
4215 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_COM() argument
4217 return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_COM()
4226 __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_TRIG() argument
4228 WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); in LL_TIM_ClearFlag_TRIG()
4237 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_TRIG() argument
4239 return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_TRIG()
4248 __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_BRK() argument
4250 WRITE_REG(TIMx->SR, ~(TIM_SR_BIF)); in LL_TIM_ClearFlag_BRK()
4259 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_BRK() argument
4261 return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_BRK()
4270 __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_BRK2() argument
4272 WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF)); in LL_TIM_ClearFlag_BRK2()
4281 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_BRK2() argument
4283 return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_BRK2()
4292 __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC1OVR() argument
4294 WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); in LL_TIM_ClearFlag_CC1OVR()
4304 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC1OVR() argument
4306 return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC1OVR()
4315 __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC2OVR() argument
4317 WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); in LL_TIM_ClearFlag_CC2OVR()
4327 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC2OVR() argument
4329 return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC2OVR()
4338 __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC3OVR() argument
4340 WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); in LL_TIM_ClearFlag_CC3OVR()
4350 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC3OVR() argument
4352 return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC3OVR()
4361 __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_CC4OVR() argument
4363 WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); in LL_TIM_ClearFlag_CC4OVR()
4373 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_CC4OVR() argument
4375 return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_CC4OVR()
4384 __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx) in LL_TIM_ClearFlag_SYSBRK() argument
4386 WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF)); in LL_TIM_ClearFlag_SYSBRK()
4395 __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx) in LL_TIM_IsActiveFlag_SYSBRK() argument
4397 return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL); in LL_TIM_IsActiveFlag_SYSBRK()
4413 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_UPDATE() argument
4415 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE()
4424 __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_UPDATE() argument
4426 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE()
4435 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_UPDATE() argument
4437 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
4446 __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC1() argument
4448 SET_BIT(TIMx->DIER, TIM_DIER_CC1IE); in LL_TIM_EnableIT_CC1()
4457 __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC1() argument
4459 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE); in LL_TIM_DisableIT_CC1()
4468 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC1() argument
4470 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC1()
4479 __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC2() argument
4481 SET_BIT(TIMx->DIER, TIM_DIER_CC2IE); in LL_TIM_EnableIT_CC2()
4490 __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC2() argument
4492 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE); in LL_TIM_DisableIT_CC2()
4501 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC2() argument
4503 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC2()
4512 __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC3() argument
4514 SET_BIT(TIMx->DIER, TIM_DIER_CC3IE); in LL_TIM_EnableIT_CC3()
4523 __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC3() argument
4525 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE); in LL_TIM_DisableIT_CC3()
4534 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC3() argument
4536 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC3()
4545 __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_CC4() argument
4547 SET_BIT(TIMx->DIER, TIM_DIER_CC4IE); in LL_TIM_EnableIT_CC4()
4556 __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_CC4() argument
4558 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE); in LL_TIM_DisableIT_CC4()
4567 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_CC4() argument
4569 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_CC4()
4578 __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_COM() argument
4580 SET_BIT(TIMx->DIER, TIM_DIER_COMIE); in LL_TIM_EnableIT_COM()
4589 __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_COM() argument
4591 CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE); in LL_TIM_DisableIT_COM()
4600 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_COM() argument
4602 return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_COM()
4611 __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_TRIG() argument
4613 SET_BIT(TIMx->DIER, TIM_DIER_TIE); in LL_TIM_EnableIT_TRIG()
4622 __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_TRIG() argument
4624 CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE); in LL_TIM_DisableIT_TRIG()
4633 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_TRIG() argument
4635 return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_TRIG()
4644 __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx) in LL_TIM_EnableIT_BRK() argument
4646 SET_BIT(TIMx->DIER, TIM_DIER_BIE); in LL_TIM_EnableIT_BRK()
4655 __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx) in LL_TIM_DisableIT_BRK() argument
4657 CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE); in LL_TIM_DisableIT_BRK()
4666 __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledIT_BRK() argument
4668 return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_BRK()
4684 __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_UPDATE() argument
4686 SET_BIT(TIMx->DIER, TIM_DIER_UDE); in LL_TIM_EnableDMAReq_UPDATE()
4695 __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_UPDATE() argument
4697 CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE); in LL_TIM_DisableDMAReq_UPDATE()
4706 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_UPDATE() argument
4708 return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_UPDATE()
4717 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC1() argument
4719 SET_BIT(TIMx->DIER, TIM_DIER_CC1DE); in LL_TIM_EnableDMAReq_CC1()
4728 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC1() argument
4730 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE); in LL_TIM_DisableDMAReq_CC1()
4739 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC1() argument
4741 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC1()
4750 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC2() argument
4752 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4761 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC2() argument
4763 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4772 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC2() argument
4774 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
4783 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC3() argument
4785 SET_BIT(TIMx->DIER, TIM_DIER_CC3DE); in LL_TIM_EnableDMAReq_CC3()
4794 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC3() argument
4796 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE); in LL_TIM_DisableDMAReq_CC3()
4805 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC3() argument
4807 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC3()
4816 __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_CC4() argument
4818 SET_BIT(TIMx->DIER, TIM_DIER_CC4DE); in LL_TIM_EnableDMAReq_CC4()
4827 __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_CC4() argument
4829 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE); in LL_TIM_DisableDMAReq_CC4()
4838 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_CC4() argument
4840 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC4()
4849 __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_COM() argument
4851 SET_BIT(TIMx->DIER, TIM_DIER_COMDE); in LL_TIM_EnableDMAReq_COM()
4860 __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_COM() argument
4862 CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE); in LL_TIM_DisableDMAReq_COM()
4871 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_COM() argument
4873 return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_COM()
4882 __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx) in LL_TIM_EnableDMAReq_TRIG() argument
4884 SET_BIT(TIMx->DIER, TIM_DIER_TDE); in LL_TIM_EnableDMAReq_TRIG()
4893 __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx) in LL_TIM_DisableDMAReq_TRIG() argument
4895 CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE); in LL_TIM_DisableDMAReq_TRIG()
4904 __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx) in LL_TIM_IsEnabledDMAReq_TRIG() argument
4906 return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_TRIG()
4922 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_UPDATE() argument
4924 SET_BIT(TIMx->EGR, TIM_EGR_UG); in LL_TIM_GenerateEvent_UPDATE()
4933 __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC1() argument
4935 SET_BIT(TIMx->EGR, TIM_EGR_CC1G); in LL_TIM_GenerateEvent_CC1()
4944 __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC2() argument
4946 SET_BIT(TIMx->EGR, TIM_EGR_CC2G); in LL_TIM_GenerateEvent_CC2()
4955 __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC3() argument
4957 SET_BIT(TIMx->EGR, TIM_EGR_CC3G); in LL_TIM_GenerateEvent_CC3()
4966 __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_CC4() argument
4968 SET_BIT(TIMx->EGR, TIM_EGR_CC4G); in LL_TIM_GenerateEvent_CC4()
4977 __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_COM() argument
4979 SET_BIT(TIMx->EGR, TIM_EGR_COMG); in LL_TIM_GenerateEvent_COM()
4988 __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_TRIG() argument
4990 SET_BIT(TIMx->EGR, TIM_EGR_TG); in LL_TIM_GenerateEvent_TRIG()
4999 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_BRK() argument
5001 SET_BIT(TIMx->EGR, TIM_EGR_BG); in LL_TIM_GenerateEvent_BRK()
5010 __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx) in LL_TIM_GenerateEvent_BRK2() argument
5012 SET_BIT(TIMx->EGR, TIM_EGR_B2G); in LL_TIM_GenerateEvent_BRK2()
5024 ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
5026 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
5028 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC…
5030 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC…
5032 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni…
5034 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_Hall…
5036 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);