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/Zephyr-latest/dts/bindings/sdhc/
Dsdhc.yaml2 # SPDX-License-Identifier: Apache-2.0
8 bus: sd
11 max-current-330:
18 max-current-300:
25 max-current-180:
32 max-bus-freq:
36 Maximum bus frequency for SD card. This should be the highest frequency
37 the SDHC is capable of negotiating with cards on the bus.
39 min-bus-freq:
43 Minimum bus frequency for SD card. This should be the frequency that
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/Zephyr-latest/dts/arm64/renesas/
Drcar_gen3_ca57.dtsi2 * Device Tree Source for the R-Car H3/M3 (R8A77951/R8A77961) SoC
6 * SPDX-License-Identifier: Apache-2.0
8 #include <arm64/armv8-a.dtsi>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
11 #include <zephyr/dt-bindings/clock/r8a7795_cpg_mssr.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
23 compatible = "arm,armv8-timer";
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Dr8a779f0.dtsi2 * Device Tree Source for the R-Car S4 (R8A779F0) SoC
6 * SPDX-License-Identifier: Apache-2.0
8 #include <arm64/armv8-a.dtsi>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
11 #include <zephyr/dt-bindings/clock/r8a779f0_cpg_mssr.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
20 #address-cells = <1>;
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/Zephyr-latest/drivers/i2c/
Di2c_gd32.c4 * SPDX-License-Identifier: Apache-2.0
25 #include "i2c-priv.h"
27 /* Bus error */
33 /* I2C bus busy */
59 I2C_CTL1(cfg->reg) |= I2C_CTL1_ERRIE; in i2c_gd32_enable_interrupts()
60 I2C_CTL1(cfg->reg) |= I2C_CTL1_EVIE; in i2c_gd32_enable_interrupts()
61 I2C_CTL1(cfg->reg) |= I2C_CTL1_BUFIE; in i2c_gd32_enable_interrupts()
66 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_ERRIE; in i2c_gd32_disable_interrupts()
67 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_EVIE; in i2c_gd32_disable_interrupts()
68 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_BUFIE; in i2c_gd32_disable_interrupts()
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Di2c_npcx_controller.c4 * SPDX-License-Identifier: Apache-2.0
15 * support for a two-wire SMBus/I2C synchronous serial interface. The following
21 * +<----------------+<----------------------+
23 * +------+ +------------+ | +------- ----+ | +------- -------+ |
24 * +->| IDLE |-->| WAIT_START |--->| WRITE_FIFO |-+--->| WRITE_SUSPEND |--+
25 * | +------+ +------------+ +------------+ Yes +---------------+ |
27 * | +-----------+ |
28 * +--------------------------------------------| WAIT_STOP |<------------+
29 * STOP is completed +-----------+ Issue STOP
35 * +<-----------------+<---------------------+
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Di2c_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/i2c/it8xxx2-i2c.h>
25 #include "i2c-priv.h"
89 /* operation freq of i2c */
96 uint8_t freq; member
108 /* Bus error */
114 /* Time-out error */
134 const struct i2c_it8xxx2_config *config = dev->config; in i2c_parsing_return_value()
135 struct i2c_it8xxx2_data *data = dev->data; in i2c_parsing_return_value()
137 if (!data->err) { in i2c_parsing_return_value()
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/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_u5.c6 * SPDX-License-Identifier: Apache-2.0
87 __ASSERT(0, "Unexpected startup freq"); in get_startup_frequency()
150 return -ENOTSUP; in enabled_clock()
161 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_on()
163 return -ENOTSUP; in stm32_clock_control_on()
166 sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_on()
167 pclken->enr); in stm32_clock_control_on()
169 temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus); in stm32_clock_control_on()
182 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_off()
184 return -ENOTSUP; in stm32_clock_control_off()
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/Zephyr-latest/dts/arm/nxp/
Dnxp_rt6xx_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
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Dnxp_rt5xx_common.dtsi2 * Copyright 2022-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>
14 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
15 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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Dnxp_rt10xx.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/imx_ccm.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
19 die-temp0 = &tempmon;
23 #address-cells = <1>;
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Dnxp_rt11xx.dtsi2 * Copyright 2021,2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/power/imx_spc.h>
15 #include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>
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/Zephyr-latest/dts/riscv/espressif/esp32c6/
Desp32c6_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <freq.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/interrupt-controller/esp-esp32c6-intmux.h>
11 #include <zephyr/dt-bindings/clock/esp32c6_clock.h>
12 #include <dt-bindings/pinctrl/esp32c6-pinctrl.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
20 zephyr,flash-controller = &flash;
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/Zephyr-latest/soc/nxp/kinetis/ke1xf/
Dsoc.c2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S
5 * Copyright (c) 2014-2015 Wind River Systems, Inc.
8 * SPDX-License-Identifier: Apache-2.0
18 #define ASSERT_WITHIN_RANGE(val, min, max, str) \ argument
19 BUILD_ASSERT(val >= min && val <= max, str)
38 "Invalid SCG bus clock divider value");
71 .freq = DT_PROP(SCG_CLOCK_NODE(sosc_clk), clock_frequency),
121 /* System Phase-Locked Loop (SPLL) configuration */
144 .prediv = (SCG_CLOCK_DIV(pll) - 1U),
145 .mult = (SCG_CLOCK_MULT(pll) - 16U)
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/Zephyr-latest/dts/x86/intel/
Dalder_lake.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/pcie/pcie.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "intel,alder-lake", "intel,x86_64";
22 d-cache-line-size = <64>;
28 compatible = "intel,alder-lake";
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/Zephyr-latest/dts/riscv/espressif/esp32c3/
Desp32c3_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <freq.h>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/interrupt-controller/esp-esp32c3-intmux.h>
12 #include <zephyr/dt-bindings/clock/esp32c3_clock.h>
13 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
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/Zephyr-latest/dts/xtensa/espressif/esp32s3/
Desp32s3_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <freq.h>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/clock/esp32s3_clock.h>
13 #include <zephyr/dt-bindings/interrupt-controller/esp32s3-xtensa-intmux.h>
14 #include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
19 die-temp0 = &coretemp;
25 zephyr,flash-controller = &flash;
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/Zephyr-latest/dts/xtensa/espressif/esp32s2/
Desp32s2_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <freq.h>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/clock/esp32s2_clock.h>
13 #include <zephyr/dt-bindings/interrupt-controller/esp32s2-xtensa-intmux.h>
14 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
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/Zephyr-latest/dts/xtensa/espressif/esp32/
Desp32_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <freq.h>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/clock/esp32_clock.h>
13 #include <zephyr/dt-bindings/interrupt-controller/esp-xtensa-intmux.h>
14 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
21 zephyr,flash-controller = &flash;
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/Zephyr-latest/include/zephyr/sd/
Dsd_spec.h2 * Copyright 2022-2023 NXP
4 * SPDX-License-Identifier: Apache-2.0
69 * to inform the SD card the next command is an application-specific one.
87 /* Bits 0-2 reserved */
99 /* Bits 17-18 reserved */
184 #define SD_SPI_CMD_BODY_SIZE (SD_SPI_CMD_SIZE - 1)
271 /** VDD 2.7-2.8 */
273 /** VDD 2.8-2.9 */
275 /** VDD 2.9-3.0 */
277 /** VDD 3.0-3.1 */
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/Zephyr-latest/drivers/sdhc/
Dintel_emmc_host.c4 * SPDX-License-Identifier: Apache-2.0
62 regs->normal_int_stat_en = EMMC_HOST_NORMAL_INTR_MASK; in enable_interrupts()
63 regs->err_int_stat_en = EMMC_HOST_ERROR_INTR_MASK; in enable_interrupts()
64 regs->normal_int_signal_en = EMMC_HOST_NORMAL_INTR_MASK; in enable_interrupts()
65 regs->err_int_signal_en = EMMC_HOST_ERROR_INTR_MASK; in enable_interrupts()
66 regs->timeout_ctrl = EMMC_HOST_MAX_TIMEOUT; in enable_interrupts()
74 regs->normal_int_stat_en = EMMC_HOST_NORMAL_INTR_MASK; in disable_interrupts()
75 regs->err_int_stat_en = EMMC_HOST_ERROR_INTR_MASK; in disable_interrupts()
78 regs->normal_int_signal_en &= 0; in disable_interrupts()
79 regs->err_int_signal_en &= 0; in disable_interrupts()
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/Zephyr-latest/drivers/flash/
Dflash_mspi_atxp032.c4 * SPDX-License-Identifier: Apache-2.0
52 const struct device *bus; member
114 const struct flash_mspi_atxp032_config *cfg = flash->config; in flash_mspi_atxp032_command_write()
115 struct flash_mspi_atxp032_data *data = flash->data; in flash_mspi_atxp032_command_write()
118 data->packet.dir = MSPI_TX; in flash_mspi_atxp032_command_write()
119 data->packet.cmd = cmd; in flash_mspi_atxp032_command_write()
120 data->packet.address = addr; in flash_mspi_atxp032_command_write()
121 data->packet.data_buf = wdata; in flash_mspi_atxp032_command_write()
122 data->packet.num_bytes = length; in flash_mspi_atxp032_command_write()
124 data->trans.async = false; in flash_mspi_atxp032_command_write()
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/Zephyr-latest/dts/arm/ambiq/
Dambiq_apollo3_blue.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <freq.h>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
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Dambiq_apollo4p.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <freq.h>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
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Dambiq_apollo3p_blue.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <freq.h>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
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/Zephyr-latest/drivers/counter/
Dmaxim_ds3231.c2 * Copyright (c) 2019-2020 Peter Bigot Consulting, LLC
4 * SPDX-License-Identifier: Apache-2.0
33 /* Return lower 32-bits of time as counter value */
46 uint8_t min; member
55 uint8_t min; member
61 uint8_t min; member
76 struct i2c_dt_spec bus; member
107 * such an operation, or when doing a no-notify synchronize
148 struct ds3231_data *data = dev->data; in sc_ctrl()
149 const struct ds3231_config *cfg = dev->config; in sc_ctrl()
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