Home
last modified time | relevance | path

Searched refs:resets (Results 51 – 75 of 174) sorted by relevance

1234567

/Zephyr-latest/dts/arm/st/h7rs/
Dstm32h7rs.dtsi333 resets = <&rctl STM32_RESET(APB2, 4U)>;
341 resets = <&rctl STM32_RESET(APB1L, 17U)>;
349 resets = <&rctl STM32_RESET(APB1L, 18U)>;
357 resets = <&rctl STM32_RESET(APB1L, 19U)>;
365 resets = <&rctl STM32_RESET(APB1L, 20U)>;
373 resets = <&rctl STM32_RESET(APB1L, 30U)>;
381 resets = <&rctl STM32_RESET(APB1L, 31U)>;
390 resets = <&rctl STM32_RESET(APB4, 3U)>;
514 resets = <&rctl STM32_RESET(APB2, 0U)>;
531 resets = <&rctl STM32_RESET(APB1L, 0U)>;
[all …]
/Zephyr-latest/dts/arm/st/g0/
Dstm32g071.dtsi19 resets = <&rctl STM32_RESET(APB1L, 18U)>;
28 resets = <&rctl STM32_RESET(APB1L, 19U)>;
Dstm32g0b1.dtsi61 resets = <&rctl STM32_RESET(APB1L, 8U)>;
70 resets = <&rctl STM32_RESET(APB1L, 9U)>;
79 resets = <&rctl STM32_RESET(APB1L, 7U)>;
88 resets = <&rctl STM32_RESET(APB1L, 2U)>;
Dstm32g0b0.dtsi27 resets = <&rctl STM32_RESET(APB1L, 8U)>;
36 resets = <&rctl STM32_RESET(APB1L, 9U)>;
45 resets = <&rctl STM32_RESET(APB1L, 2U)>;
/Zephyr-latest/dts/arm/st/f0/
Dstm32f070.dtsi17 resets = <&rctl STM32_RESET(APB1, 17U)>;
26 resets = <&rctl STM32_RESET(APB2, 16U)>;
Dstm32f042.dtsi28 resets = <&rctl STM32_RESET(APB1, 17U)>;
55 resets = <&rctl STM32_RESET(APB2, 16U)>;
/Zephyr-latest/dts/arm/st/f3/
Dstm32f3.dtsi188 resets = <&rctl STM32_RESET(APB2, 14U)>;
197 resets = <&rctl STM32_RESET(APB1, 17U)>;
206 resets = <&rctl STM32_RESET(APB1, 18U)>;
215 resets = <&rctl STM32_RESET(APB1, 19U)>;
270 resets = <&rctl STM32_RESET(APB1, 0U)>;
292 resets = <&rctl STM32_RESET(APB1, 1U)>;
314 resets = <&rctl STM32_RESET(APB1, 4U)>;
330 resets = <&rctl STM32_RESET(APB1, 5U)>;
346 resets = <&rctl STM32_RESET(APB2, 16U)>;
368 resets = <&rctl STM32_RESET(APB2, 17U)>;
[all …]
/Zephyr-latest/dts/arm/st/l1/
Dstm32l1.dtsi131 resets = <&rctl STM32_RESET(APB1, 17U)>;
140 resets = <&rctl STM32_RESET(APB1, 18U)>;
149 resets = <&rctl STM32_RESET(APB1, 19U)>;
158 resets = <&rctl STM32_RESET(APB1, 20U)>;
211 resets = <&rctl STM32_RESET(APB2, 14U)>;
261 resets = <&rctl STM32_RESET(APB1, 0U)>;
283 resets = <&rctl STM32_RESET(APB1, 1U)>;
305 resets = <&rctl STM32_RESET(APB1, 2U)>;
327 resets = <&rctl STM32_RESET(APB2, 2U)>;
349 resets = <&rctl STM32_RESET(APB2, 3U)>;
[all …]
/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc55S6x_common.dtsi227 resets = <&reset NXP_SYSCON_RESET(0, 26)>;
236 resets = <&reset NXP_SYSCON_RESET(1, 11)>;
247 resets = <&reset NXP_SYSCON_RESET(1, 12)>;
258 resets = <&reset NXP_SYSCON_RESET(1, 13)>;
269 resets = <&reset NXP_SYSCON_RESET(1, 14)>;
280 resets = <&reset NXP_SYSCON_RESET(1, 15)>;
291 resets = <&reset NXP_SYSCON_RESET(1, 16)>;
302 resets = <&reset NXP_SYSCON_RESET(1, 17)>;
313 resets = <&reset NXP_SYSCON_RESET(1, 18)>;
338 resets = <&reset NXP_SYSCON_RESET(2, 28)>;
[all …]
Dnxp_lpc55S3x_common.dtsi190 resets = <&reset NXP_SYSCON_RESET(1, 11)>;
201 resets = <&reset NXP_SYSCON_RESET(1, 12)>;
212 resets = <&reset NXP_SYSCON_RESET(1, 13)>;
223 resets = <&reset NXP_SYSCON_RESET(1, 14)>;
234 resets = <&reset NXP_SYSCON_RESET(1, 15)>;
245 resets = <&reset NXP_SYSCON_RESET(1, 16)>;
256 resets = <&reset NXP_SYSCON_RESET(1, 17)>;
267 resets = <&reset NXP_SYSCON_RESET(1, 18)>;
278 resets = <&reset NXP_SYSCON_RESET(2, 28)>;
338 resets = <&reset NXP_SYSCON_RESET(1, 7)>;
Dnxp_rt6xx_common.dtsi213 resets = <&rstctl1 NXP_SYSCON_RESET(0, 8)>;
222 resets = <&rstctl1 NXP_SYSCON_RESET(0, 9)>;
231 resets = <&rstctl1 NXP_SYSCON_RESET(0, 10)>;
240 resets = <&rstctl1 NXP_SYSCON_RESET(0, 11)>;
249 resets = <&rstctl1 NXP_SYSCON_RESET(0, 12)>;
258 resets = <&rstctl1 NXP_SYSCON_RESET(0, 13)>;
267 resets = <&rstctl1 NXP_SYSCON_RESET(0, 14)>;
276 resets = <&rstctl1 NXP_SYSCON_RESET(0, 15)>;
285 resets = <&rstctl1 NXP_SYSCON_RESET(0, 23)>;
314 resets = <&rstctl1 NXP_SYSCON_RESET(0, 22)>;
[all …]
/Zephyr-latest/dts/arm/st/h7/
Dstm32h7.dtsi292 resets = <&rctl STM32_RESET(APB2, 4U)>;
300 resets = <&rctl STM32_RESET(APB1L, 17U)>;
308 resets = <&rctl STM32_RESET(APB1L, 18U)>;
316 resets = <&rctl STM32_RESET(APB1L, 19U)>;
324 resets = <&rctl STM32_RESET(APB1L, 20U)>;
332 resets = <&rctl STM32_RESET(APB2, 5U)>;
340 resets = <&rctl STM32_RESET(APB1L, 30U)>;
348 resets = <&rctl STM32_RESET(APB1L, 31U)>;
357 resets = <&rctl STM32_RESET(APB4, 3U)>;
552 resets = <&rctl STM32_RESET(APB2, 0U)>;
[all …]
/Zephyr-latest/dts/arm/st/mp1/
Dstm32mp157.dtsi269 resets = <&rctl STM32_RESET(APB1, 14U)>;
278 resets = <&rctl STM32_RESET(APB1, 15U)>;
287 resets = <&rctl STM32_RESET(APB1, 16U)>;
296 resets = <&rctl STM32_RESET(APB1, 17U)>;
305 resets = <&rctl STM32_RESET(APB2, 13U)>;
314 resets = <&rctl STM32_RESET(APB1, 18U)>;
323 resets = <&rctl STM32_RESET(APB1, 19U)>;
344 resets = <&rctl STM32_RESET(APB1, 1U)>;
366 resets = <&rctl STM32_RESET(APB1, 3U)>;
399 resets = <&rctl STM32_RESET(APB4, 26U)>;
/Zephyr-latest/dts/arm/st/g4/
Dstm32g4.dtsi267 resets = <&rctl STM32_RESET(APB2, 14U)>;
276 resets = <&rctl STM32_RESET(APB1L, 17U)>;
285 resets = <&rctl STM32_RESET(APB1L, 18U)>;
294 resets = <&rctl STM32_RESET(APB1L, 19U)>;
303 resets = <&rctl STM32_RESET(APB1H, 0U)>;
414 resets = <&rctl STM32_RESET(APB2, 11U)>;
431 resets = <&rctl STM32_RESET(APB1L, 0U)>;
453 resets = <&rctl STM32_RESET(APB1L, 1U)>;
475 resets = <&rctl STM32_RESET(APB1L, 2U)>;
497 resets = <&rctl STM32_RESET(APB1L, 4U)>;
[all …]
Dstm32g491.dtsi28 resets = <&rctl STM32_RESET(APB2, 20U)>;
76 resets = <&rctl STM32_RESET(APB1L, 20U)>;
/Zephyr-latest/dts/arm/st/l5/
Dstm32l5.dtsi268 resets = <&rctl STM32_RESET(APB2, 14U)>;
277 resets = <&rctl STM32_RESET(APB1L, 17U)>;
286 resets = <&rctl STM32_RESET(APB1L, 18U)>;
295 resets = <&rctl STM32_RESET(APB1L, 19U)>;
304 resets = <&rctl STM32_RESET(APB1L, 20U)>;
313 resets = <&rctl STM32_RESET(APB1H, 0U)>;
402 resets = <&rctl STM32_RESET(AHB2, 22U)>;
473 resets = <&rctl STM32_RESET(APB2, 11U)>;
490 resets = <&rctl STM32_RESET(APB1L, 0U)>;
512 resets = <&rctl STM32_RESET(APB1L, 1U)>;
[all …]
Dstm32l562.dtsi17 resets = <&rctl STM32_RESET(AHB2, 16U)>;
/Zephyr-latest/drivers/watchdog/
Dwdt_dw.c49 #if DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets)
127 #if DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets)
166 #if DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets)
259 IF_ENABLED(DT_INST_NODE_HAS_PROP(inst, resets), \
/Zephyr-latest/dts/arm/st/l4/
Dstm32l451.dtsi94 resets = <&rctl STM32_RESET(APB1L, 18U)>;
103 resets = <&rctl STM32_RESET(APB1L, 19U)>;
112 resets = <&rctl STM32_RESET(APB1L, 1U)>;
152 resets = <&rctl STM32_RESET(APB2, 10U)>;
Dstm32l431.dtsi84 resets = <&rctl STM32_RESET(APB1L, 18U)>;
93 resets = <&rctl STM32_RESET(APB1L, 5U)>;
119 resets = <&rctl STM32_RESET(APB2, 10U)>;
/Zephyr-latest/dts/arm/st/u5/
Dstm32u5.dtsi316 resets = <&rctl STM32_RESET(APB2, 14U)>;
325 resets = <&rctl STM32_RESET(APB1L, 17U)>;
334 resets = <&rctl STM32_RESET(APB1L, 18U)>;
343 resets = <&rctl STM32_RESET(APB1L, 19U)>;
352 resets = <&rctl STM32_RESET(APB1L, 20U)>;
361 resets = <&rctl STM32_RESET(APB3, 6U)>;
502 resets = <&rctl STM32_RESET(APB2, 11U)>;
518 resets = <&rctl STM32_RESET(APB1L, 0U)>;
534 resets = <&rctl STM32_RESET(APB1L, 1U)>;
550 resets = <&rctl STM32_RESET(APB1L, 2U)>;
[all …]
/Zephyr-latest/dts/arm/gd/gd32f3x0/
Dgd32f350.dtsi16 resets = <&rctl GD32_RESET_DAC>;
/Zephyr-latest/dts/arm/st/f4/
Dstm32f423.dtsi17 resets = <&rctl STM32_RESET(AHB2, 4U)>;
Dstm32f417.dtsi17 resets = <&rctl STM32_RESET(AHB2, 4U)>;
Dstm32f4.dtsi241 resets = <&rctl STM32_RESET(APB2, 4U)>;
250 resets = <&rctl STM32_RESET(APB1, 17U)>;
259 resets = <&rctl STM32_RESET(APB2, 5U)>;
328 resets = <&rctl STM32_RESET(APB2, 0U)>;
351 resets = <&rctl STM32_RESET(APB1, 0U)>;
379 resets = <&rctl STM32_RESET(APB1, 1U)>;
407 resets = <&rctl STM32_RESET(APB1, 2U)>;
435 resets = <&rctl STM32_RESET(APB1, 3U)>;
463 resets = <&rctl STM32_RESET(APB2, 16U)>;
485 resets = <&rctl STM32_RESET(APB2, 17U)>;
[all …]

1234567