1/* 2 * Copyright 2022, 2024 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv8-m.dtsi> 8#include <zephyr/dt-bindings/adc/adc.h> 9#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h> 10#include <zephyr/dt-bindings/gpio/gpio.h> 11#include <zephyr/dt-bindings/i2c/i2c.h> 12#include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h> 13#include <mem.h> 14#include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h> 15 16/ { 17 cpus { 18 #address-cells = <1>; 19 #size-cells = <0>; 20 21 cpu@0 { 22 compatible = "arm,cortex-m33f"; 23 reg = <0>; 24 #address-cells = <1>; 25 #size-cells = <1>; 26 27 mpu: mpu@e000ed90 { 28 compatible = "arm,armv8m-mpu"; 29 reg = <0xe000ed90 0x40>; 30 }; 31 }; 32 }; 33}; 34 35&sram { 36 #address-cells = <1>; 37 #size-cells = <1>; 38 39 /* lpc55_3x Memory configurations: 40 * 41 * LPC55x36: RAMX: 16K, SRAM0: 16K, SRAM1: 16K, SRAM2: 32K, SRAM3: 32K, SRAM4: 16K 42 */ 43 sramx: memory@4000000 { 44 compatible = "mmio-sram"; 45 reg = <0x04000000 DT_SIZE_K(16)>; 46 }; 47 sram0: memory@20000000 { 48 compatible = "mmio-sram"; 49 reg = <0x20000000 DT_SIZE_K(16)>; 50 }; 51 sram1: memory@20004000 { 52 compatible = "mmio-sram"; 53 reg = <0x20004000 DT_SIZE_K(16)>; 54 }; 55 sram2: memory@20008000 { 56 compatible = "mmio-sram"; 57 reg = <0x20008000 DT_SIZE_K(32)>; 58 }; 59 sram3: memory@20010000 { 60 compatible = "mmio-sram"; 61 reg = <0x20010000 DT_SIZE_K(32)>; 62 }; 63 sram4: memory@20018000 { 64 compatible = "mmio-sram"; 65 reg = <0x20018000 DT_SIZE_K(16)>; 66 }; 67}; 68 69&peripheral { 70 #address-cells = <1>; 71 #size-cells = <1>; 72 73 syscon: syscon@0 { 74 compatible = "nxp,lpc-syscon"; 75 reg = <0x0 0x1000>; 76 #clock-cells = <1>; 77 reset: reset { 78 compatible = "nxp,lpc-syscon-reset"; 79 #reset-cells = <1>; 80 }; 81 }; 82 83 iap: flash-controller@34000 { 84 compatible = "nxp,iap-fmc553"; 85 reg = <0x34000 0x1000>; 86 #address-cells = <1>; 87 #size-cells = <1>; 88 status = "ok"; 89 90 flash0: flash@0 { 91 compatible = "soc-nv-flash"; 92 reg = <0x0 DT_SIZE_K(246)>; 93 erase-block-size = <512>; 94 write-block-size = <512>; 95 }; 96 97 flash_reserved: flash@3d800 { 98 compatible = "soc-nv-flash"; 99 reg = <0x0003d800 DT_SIZE_K(10)>; 100 status = "disabled"; 101 }; 102 103 boot_rom: flash@3000000 { 104 compatible = "soc-nv-flash"; 105 reg = <0x3000000 DT_SIZE_K(128)>; 106 }; 107 }; 108 109 iocon: iocon@1000 { 110 compatible = "nxp,lpc-iocon"; 111 reg = <0x1000 0x100>; 112 #address-cells = <1>; 113 #size-cells = <1>; 114 ranges = <0x0 0x1000 0x100>; 115 pinctrl: pinctrl { 116 compatible = "nxp,lpc-iocon-pinctrl"; 117 }; 118 }; 119 120 gpio: gpio@8c000 { 121 compatible = "nxp,lpc-gpio"; 122 reg = <0x8c000 0x2488>; 123 #address-cells = <1>; 124 #size-cells = <0>; 125 gpio0: gpio@0 { 126 compatible = "nxp,lpc-gpio-port"; 127 int-source = "pint"; 128 gpio-controller; 129 #gpio-cells = <2>; 130 reg = <0>; 131 }; 132 133 gpio1: gpio@1 { 134 compatible = "nxp,lpc-gpio-port"; 135 int-source = "pint"; 136 gpio-controller; 137 #gpio-cells = <2>; 138 reg = <1>; 139 }; 140 141 gpio2: gpio@2 { 142 compatible = "nxp,lpc-gpio-port"; 143 gpio-controller; 144 #gpio-cells = <2>; 145 reg = <2>; 146 }; 147 }; 148 149 dma0: dma-controller@82000 { 150 compatible = "nxp,lpc-dma"; 151 reg = <0x82000 0x1000>; 152 interrupts = <1 0>; 153 dma-channels = <52>; 154 nxp,dma-num-of-otrigs = <4>; 155 nxp,dma-otrig-base-address = <LPC55S36_DMA0_OTRIG_BASE>; 156 nxp,dma-itrig-base-address = <LPC55S36_DMA0_ITRIG_BASE>; 157 status = "disabled"; 158 #dma-cells = <1>; 159 }; 160 161 dma1: dma-controller@a7000 { 162 compatible = "nxp,lpc-dma"; 163 reg = <0xa7000 0x1000>; 164 interrupts = <58 0>; 165 dma-channels = <16>; 166 nxp,dma-num-of-otrigs = <4>; 167 nxp,dma-otrig-base-address = <LPC55S36_DMA1_OTRIG_BASE>; 168 nxp,dma-itrig-base-address = <LPC55S36_DMA1_ITRIG_BASE>; 169 status = "disabled"; 170 #dma-cells = <1>; 171 }; 172 173 pint: pint@4000 { 174 compatible = "nxp,pint"; 175 reg = <0x4000 0x1000>; 176 interrupt-controller; 177 #interrupt-cells = <1>; 178 #address-cells = <0>; 179 interrupts = <4 2>, <5 2>, <6 2>, <7 2>, 180 <32 2>, <33 2>, <34 2>, <35 2>; 181 num-lines = <8>; 182 num-inputs = <64>; 183 }; 184 185 flexcomm0: flexcomm@86000 { 186 compatible = "nxp,lpc-flexcomm"; 187 reg = <0x86000 0x1000>; 188 interrupts = <14 0>; 189 clocks = <&syscon MCUX_FLEXCOMM0_CLK>; 190 resets = <&reset NXP_SYSCON_RESET(1, 11)>; 191 dmas = <&dma0 4>, <&dma0 5>; 192 dma-names = "rx", "tx"; 193 status = "disabled"; 194 }; 195 196 flexcomm1: flexcomm@87000 { 197 compatible = "nxp,lpc-flexcomm"; 198 reg = <0x87000 0x1000>; 199 interrupts = <15 0>; 200 clocks = <&syscon MCUX_FLEXCOMM1_CLK>; 201 resets = <&reset NXP_SYSCON_RESET(1, 12)>; 202 dmas = <&dma0 6>, <&dma0 7>; 203 dma-names = "rx", "tx"; 204 status = "disabled"; 205 }; 206 207 flexcomm2: flexcomm@88000 { 208 compatible = "nxp,lpc-flexcomm"; 209 reg = <0x88000 0x1000>; 210 interrupts = <16 0>; 211 clocks = <&syscon MCUX_FLEXCOMM2_CLK>; 212 resets = <&reset NXP_SYSCON_RESET(1, 13)>; 213 dmas = <&dma0 10>, <&dma0 11>; 214 dma-names = "rx", "tx"; 215 status = "disabled"; 216 }; 217 218 flexcomm3: flexcomm@89000 { 219 compatible = "nxp,lpc-flexcomm"; 220 reg = <0x89000 0x1000>; 221 interrupts = <17 0>; 222 clocks = <&syscon MCUX_FLEXCOMM3_CLK>; 223 resets = <&reset NXP_SYSCON_RESET(1, 14)>; 224 dmas = <&dma0 8>, <&dma0 9>; 225 dma-names = "rx", "tx"; 226 status = "disabled"; 227 }; 228 229 flexcomm4: flexcomm@8a000 { 230 compatible = "nxp,lpc-flexcomm"; 231 reg = <0x8a000 0x1000>; 232 interrupts = <18 0>; 233 clocks = <&syscon MCUX_FLEXCOMM4_CLK>; 234 resets = <&reset NXP_SYSCON_RESET(1, 15)>; 235 dmas = <&dma0 12>, <&dma0 13>; 236 dma-names = "rx", "tx"; 237 status = "disabled"; 238 }; 239 240 flexcomm5: flexcomm@96000 { 241 compatible = "nxp,lpc-flexcomm"; 242 reg = <0x96000 0x1000>; 243 interrupts = <19 0>; 244 clocks = <&syscon MCUX_FLEXCOMM5_CLK>; 245 resets = <&reset NXP_SYSCON_RESET(1, 16)>; 246 dmas = <&dma0 14>, <&dma0 15>; 247 dma-names = "rx", "tx"; 248 status = "disabled"; 249 }; 250 251 flexcomm6: flexcomm@97000 { 252 compatible = "nxp,lpc-flexcomm"; 253 reg = <0x97000 0x1000>; 254 interrupts = <20 0>; 255 clocks = <&syscon MCUX_FLEXCOMM6_CLK>; 256 resets = <&reset NXP_SYSCON_RESET(1, 17)>; 257 dmas = <&dma0 16>, <&dma0 17>; 258 dma-names = "rx", "tx"; 259 status = "disabled"; 260 }; 261 262 flexcomm7: flexcomm@98000 { 263 compatible = "nxp,lpc-flexcomm"; 264 reg = <0x98000 0x1000>; 265 interrupts = <21 0>; 266 clocks = <&syscon MCUX_FLEXCOMM7_CLK>; 267 resets = <&reset NXP_SYSCON_RESET(1, 18)>; 268 dmas = <&dma0 18>, <&dma0 19>; 269 dma-names = "rx", "tx"; 270 status = "disabled"; 271 }; 272 273 hs_lspi: spi@9f000 { 274 compatible = "nxp,lpc-spi"; 275 reg = <0x9f000 0x1000>; 276 interrupts = <59 0>; 277 clocks = <&syscon MCUX_HS_SPI_CLK>; 278 resets = <&reset NXP_SYSCON_RESET(2, 28)>; 279 dmas = <&dma0 2>, <&dma0 3>; 280 dma-names = "rx", "tx"; 281 status = "disabled"; 282 #address-cells = <1>; 283 #size-cells = <0>; 284 }; 285 286 adc0: adc@A0000 { 287 compatible = "nxp,lpc-lpadc"; 288 reg = <0xA0000 0x1000>; 289 interrupts = <22 0>; 290 status = "disabled"; 291 clk-divider = <8>; 292 clk-source = <0>; 293 voltage-ref= <1>; 294 calibration-average = <128>; 295 power-level = <0>; 296 offset-value-a = <10>; 297 offset-value-b = <10>; 298 #io-channel-cells = <1>; 299 dmas = <&dma0 21>, <&dma0 22>; 300 dma-names = "adc0-dma0", "adc0-dma1"; 301 nxp,references = <&vref0 1800>; 302 clocks = <&syscon MCUX_LPADC1_CLK>; 303 }; 304 305 dac0: dac@b2000 { 306 compatible = "nxp,lpdac"; 307 reg = < 0xb2000 0x1000>; 308 interrupts = <74 0>; 309 status = "disabled"; 310 voltage-reference = <0>; 311 #io-channel-cells = <1>; 312 }; 313 314 dac1: dac@b6000 { 315 compatible = "nxp,lpdac"; 316 reg = < 0xb6000 0x1000>; 317 interrupts = <75 0>; 318 status = "disabled"; 319 voltage-reference = <0>; 320 #io-channel-cells = <1>; 321 }; 322 323 dac2: dac@b9000 { 324 compatible = "nxp,lpdac"; 325 reg = < 0xb9000 0x1000>; 326 interrupts = <76 0>; 327 status = "disabled"; 328 voltage-reference = <0>; 329 #io-channel-cells = <1>; 330 }; 331 332 can0: can@4009d000 { 333 compatible = "nxp,lpc-mcan"; 334 reg = <0x4009d000 0x1000>; 335 interrupts = <43 0>, <44 0>; 336 interrupt-names = "int0", "int1"; 337 clocks = <&syscon MCUX_MCAN_CLK>; 338 resets = <&reset NXP_SYSCON_RESET(1, 7)>; 339 bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>; 340 status = "disabled"; 341 }; 342 343 flexpwm0: flexpwm@400C3000 { 344 compatible = "nxp,flexpwm"; 345 reg = <0x400C3000 0x1000>; 346 interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR"; 347 interrupts = <80 0>, <81 0>, <82 0>; 348 flexpwm0_pwm0: pwm0 { 349 compatible = "nxp,imx-pwm"; 350 index = <0>; 351 interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0"; 352 interrupts = <83 0>, <84 0>; 353 #pwm-cells = <3>; 354 clocks = <&syscon MCUX_BUS_CLK 0 0>; 355 nxp,prescaler = <128>; 356 status = "disabled"; 357 run-in-wait; 358 }; 359 360 flexpwm0_pwm1: pwm1 { 361 compatible = "nxp,imx-pwm"; 362 index = <1>; 363 interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1"; 364 interrupts = <85 0>, <86 0>; 365 #pwm-cells = <3>; 366 clocks = <&syscon MCUX_BUS_CLK 0 0>; 367 nxp,prescaler = <128>; 368 status = "disabled"; 369 run-in-wait; 370 }; 371 372 flexpwm0_pwm2: pwm2 { 373 compatible = "nxp,imx-pwm"; 374 index = <2>; 375 interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2"; 376 interrupts = <87 0>, <88 0>; 377 #pwm-cells = <3>; 378 clocks = <&syscon MCUX_BUS_CLK 0 0>; 379 nxp,prescaler = <128>; 380 status = "disabled"; 381 run-in-wait; 382 }; 383 384 flexpwm0_pwm3: pwm3 { 385 compatible = "nxp,imx-pwm"; 386 index = <3>; 387 interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3"; 388 interrupts = <89 0>, <90 0>; 389 #pwm-cells = <3>; 390 clocks = <&syscon MCUX_BUS_CLK 0 0>; 391 nxp,prescaler = <128>; 392 status = "disabled"; 393 run-in-wait; 394 }; 395 }; 396 397 398 flexpwm1: flexpwm@400C5000 { 399 compatible = "nxp,flexpwm"; 400 reg = <0x400C5000 0x1000>; 401 interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR"; 402 interrupts = <91 0>, <92 0>, <93 0>; 403 flexpwm1_pwm0: pwm0 { 404 compatible = "nxp,imx-pwm"; 405 index = <0>; 406 interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0"; 407 interrupts = <94 0>, <95 0>; 408 #pwm-cells = <3>; 409 clocks = <&syscon MCUX_BUS_CLK 0 0>; 410 nxp,prescaler = <128>; 411 status = "disabled"; 412 run-in-wait; 413 }; 414 415 flexpwm1_pwm1: pwm1 { 416 compatible = "nxp,imx-pwm"; 417 index = <1>; 418 interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1"; 419 interrupts = <96 0>, <97 0>; 420 #pwm-cells = <3>; 421 clocks = <&syscon MCUX_BUS_CLK 0 0>; 422 nxp,prescaler = <128>; 423 status = "disabled"; 424 run-in-wait; 425 }; 426 427 flexpwm1_pwm2: pwm2 { 428 compatible = "nxp,imx-pwm"; 429 index = <2>; 430 interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2"; 431 interrupts = <98 0>, <99 0>; 432 #pwm-cells = <3>; 433 clocks = <&syscon MCUX_BUS_CLK 0 0>; 434 nxp,prescaler = <128>; 435 status = "disabled"; 436 run-in-wait; 437 }; 438 439 flexpwm1_pwm3: pwm3 { 440 compatible = "nxp,imx-pwm"; 441 index = <3>; 442 interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3"; 443 interrupts = <100 0>, <101 0>; 444 #pwm-cells = <3>; 445 clocks = <&syscon MCUX_BUS_CLK 0 0>; 446 nxp,prescaler = <128>; 447 status = "disabled"; 448 run-in-wait; 449 }; 450 }; 451 452 usbfs: usbfs@84000 { 453 compatible = "nxp,lpcip3511"; 454 reg = <0x84000 0x1000>; 455 interrupts = <28 0>; 456 num-bidir-endpoints = <5>; 457 maximum-speed = "full-speed"; 458 status = "disabled"; 459 }; 460 461 sc_timer: pwm@85000 { 462 compatible = "nxp,sctimer-pwm"; 463 reg = <0x85000 0x1000>; 464 interrupts = <12 0>; 465 status = "disabled"; 466 clocks = <&syscon MCUX_SCTIMER_CLK 0 0>; 467 prescaler = <2>; 468 #pwm-cells = <3>; 469 }; 470 471 vref0: vref@b5000 { 472 compatible = "nxp,vref"; 473 regulator-name = "lpc55s36-vref"; 474 reg = <0xb5000 0x30>; 475 status = "disabled"; 476 #nxp,reference-cells = <1>; 477 nxp,buffer-startup-delay-us = <400>; 478 nxp,bandgap-startup-time-us = <20>; 479 }; 480}; 481 482&nvic { 483 arm,num-irq-priority-bits = <3>; 484}; 485
