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/Zephyr-latest/dts/bindings/counter/
Dnordic,nrf-timer.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nordic,nrf-timer"
14 cc-num:
17 description: Number of capture/compare (CC) registers available
19 max-bit-width:
27 max-frequency:
40 description: Prescaler value determines frequency (max-frequency/2^prescaler)
/Zephyr-latest/dts/arm/nordic/
Dnrf52820.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
27 #address-cells = <1>;
28 #size-cells = <1>;
[all …]
Dnrf52840.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
6 #include <zephyr/dt-bindings/regulator/nrf5x.h>
10 zephyr,bt-hci = &bt_hci_controller;
12 zephyr,flash-controller = &flash_controller;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m4f";
23 #address-cells = <1>;
[all …]
Dnrf52833.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4f";
27 #address-cells = <1>;
[all …]
Dnrf52832.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
6 #include <zephyr/dt-bindings/regulator/nrf5x.h>
10 zephyr,bt-hci = &bt_hci_controller;
12 zephyr,flash-controller = &flash_controller;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m4f";
23 #address-cells = <1>;
[all …]
Dnrf51822.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv6-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-adc.h>
9 zephyr,bt-hci = &bt_hci_controller;
11 zephyr,flash-controller = &flash_controller;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-m0";
27 compatible = "nordic,nrf-ficr";
29 #nordic,ficr-cells = <1>;
[all …]
Dnrf5340_cpunet.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
12 zephyr,bt-hci = &bt_hci_controller;
14 zephyr,flash-controller = &flash_controller;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-m33";
25 #address-cells = <1>;
26 #size-cells = <1>;
29 compatible = "arm,armv8m-mpu";
[all …]
Dnrf52805.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
32 compatible = "nordic,nrf-ficr";
[all …]
Dnrf52810.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
6 #include <zephyr/dt-bindings/regulator/nrf5x.h>
10 zephyr,bt-hci = &bt_hci_controller;
12 zephyr,flash-controller = &flash_controller;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m4";
23 #address-cells = <1>;
[all …]
Dnrf52811.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
27 #address-cells = <1>;
[all …]
Dnrf91_peripherals.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 flash_controller: flash-controller@39000 {
8 compatible = "nordic,nrf91-flash-controller";
10 partial-erase;
12 #address-cells = <1>;
13 #size-cells = <1>;
17 compatible = "soc-nv-flash";
18 erase-block-size = <4096>;
19 write-block-size = <4>;
24 compatible = "nordic,nrf-saadc";
[all …]
Dnrf5340_cpuapp_peripherals.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/regulator/nrf5x.h>
10 compatible = "nordic,nrf-dcnf";
15 oscillators: clock-controller@4000 {
16 compatible = "nordic,nrf53-oscillators";
20 compatible = "nordic,nrf53-lfxo";
21 #clock-cells = <0>;
22 clock-frequency = <32768>;
26 compatible = "nordic,nrf53-hfxo";
27 #clock-cells = <0>;
[all …]
/Zephyr-latest/dts/bindings/rtc/
Dnordic,nrf-rtc.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Nordic nRF RTC (Real-Time Counter)
6 compatible: "nordic,nrf-rtc"
14 cc-num:
18 Number of compare (CC) registers available.
26 ppi-wrap:
33 fixed-top:
/Zephyr-latest/dts/bindings/timer/
Dnordic,nrf-grtc.yaml4 # SPDX-License-Identifier: Apache-2.0
9 compatible: "nordic,nrf-grtc"
12 - "base.yaml"
13 - "nordic,split-channels.yaml"
22 cc-num:
/Zephyr-latest/dts/common/nordic/
Dnrf9280.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/nrf-saadc.h>
10 #include <zephyr/dt-bindings/misc/nordic-nrf-ficr-nrf9230-engb.h>
11 #include <zephyr/dt-bindings/misc/nordic-domain-id-nrf9230.h>
12 #include <zephyr/dt-bindings/misc/nordic-owner-id-nrf9230.h>
13 #include <zephyr/dt-bindings/reserved-memory/nordic-owned-memory.h>
15 /delete-node/ &sw_pwm;
18 #address-cells = <1>;
19 #size-cells = <1>;
22 #address-cells = <1>;
[all …]
Dnrf54h20.dtsi4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/adc/nrf-saadc.h>
11 #include <zephyr/dt-bindings/misc/nordic-nrf-ficr-nrf54h20.h>
12 #include <zephyr/dt-bindings/misc/nordic-domain-id-nrf54h20.h>
13 #include <zephyr/dt-bindings/misc/nordic-owner-id-nrf54h20.h>
14 #include <zephyr/dt-bindings/misc/nordic-tddconf.h>
15 #include <zephyr/dt-bindings/reserved-memory/nordic-owned-memory.h>
16 #include <zephyr/dt-bindings/power/nordic-nrf-gpd.h>
18 /delete-node/ &sw_pwm;
21 #address-cells = <1>;
[all …]
Dnrf54l20.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
12 /delete-node/ &sw_pwm;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
23 compatible = "arm,cortex-m33f";
26 clock-frequency = <DT_FREQ_M(128)>;
[all …]
Dnrf54l_05_10_15.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
12 /delete-node/ &sw_pwm;
19 #address-cells = <1>;
20 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,cortex-m33f";
30 clock-frequency = <DT_FREQ_M(128)>;
[all …]
/Zephyr-latest/drivers/disk/nvme/
Dnvme_controller.c3 * SPDX-License-Identifier: Apache-2.0
28 struct nvme_controller *nvme_ctrlr = dev->data; in nvme_controller_wait_for_ready()
31 k_ms_to_ticks_ceil32(nvme_ctrlr->ready_timeout_in_ms); in nvme_controller_wait_for_ready()
39 return -EIO; in nvme_controller_wait_for_ready()
47 if ((int64_t)timeout - sys_clock_tick_get_32() < 0) { in nvme_controller_wait_for_ready()
49 return -EIO; in nvme_controller_wait_for_ready()
62 uint32_t cc, csts; in nvme_controller_disable() local
66 cc = nvme_mmio_read_4(regs, cc); in nvme_controller_disable()
71 enabled = (cc >> NVME_CC_REG_EN_SHIFT) & NVME_CC_REG_EN_MASK; in nvme_controller_disable()
89 cc &= ~NVME_CC_REG_EN_MASK; in nvme_controller_disable()
[all …]
/Zephyr-latest/dts/arm/gd/gd32a50x/
Dgd32a50x.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/clock/gd32a50x-clocks.h>
14 #include <zephyr/dt-bindings/reset/gd32a50x.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
[all …]
/Zephyr-latest/dts/arm/gd/gd32e10x/
Dgd32e10x.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/clock/gd32e10x-clocks.h>
13 #include <zephyr/dt-bindings/reset/gd32e10x.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
21 clock-frequency = <DT_FREQ_M(120)>;
[all …]
/Zephyr-latest/dts/arm/st/c0/
Dstm32c0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/stm32c0_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/dma/stm32_dma.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/f0/
Dstm32f0.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv6-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f0_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
[all …]
/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e50x.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include <zephyr/dt-bindings/clock/gd32e50x-clocks.h>
13 #include <zephyr/dt-bindings/reset/gd32e50x.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-m33";
[all …]
/Zephyr-latest/dts/arm/gd/gd32f403/
Dgd32f403.dtsi5 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/adc/adc.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/clock/gd32f403-clocks.h>
14 #include <zephyr/dt-bindings/reset/gd32f403.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-m4f";
[all …]

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