1/*
2 * Copyright (c) 2020 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv7-m.dtsi>
8#include <nordic/nrf_common.dtsi>
9#include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
10#include <zephyr/dt-bindings/regulator/nrf5x.h>
11
12/ {
13	chosen {
14		zephyr,bt-hci = &bt_hci_controller;
15		zephyr,entropy = &rng;
16		zephyr,flash-controller = &flash_controller;
17	};
18
19	cpus {
20		#address-cells = <1>;
21		#size-cells = <0>;
22
23		cpu@0 {
24			device_type = "cpu";
25			compatible = "arm,cortex-m4";
26			reg = <0>;
27		};
28	};
29
30	soc {
31		ficr: ficr@10000000 {
32			compatible = "nordic,nrf-ficr";
33			reg = <0x10000000 0x1000>;
34			#nordic,ficr-cells = <1>;
35			status = "okay";
36		};
37
38		uicr: uicr@10001000 {
39			compatible = "nordic,nrf-uicr";
40			reg = <0x10001000 0x1000>;
41			status = "okay";
42		};
43
44		sram0: memory@20000000 {
45			compatible = "mmio-sram";
46		};
47
48		clock: clock@40000000 {
49			compatible = "nordic,nrf-clock";
50			reg = <0x40000000 0x1000>;
51			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
52			status = "okay";
53		};
54
55		power: power@40000000 {
56			compatible = "nordic,nrf-power";
57			reg = <0x40000000 0x1000>;
58			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
59			status = "okay";
60			#address-cells = <1>;
61			#size-cells = <1>;
62
63			gpregret1: gpregret1@4000051c {
64				#address-cells = <1>;
65				#size-cells = <1>;
66				compatible = "nordic,nrf-gpregret";
67				reg = <0x4000051c 0x1>;
68				status = "okay";
69			};
70
71			gpregret2: gpregret2@40000520 {
72				#address-cells = <1>;
73				#size-cells = <1>;
74				compatible = "nordic,nrf-gpregret";
75				reg = <0x40000520 0x1>;
76				status = "okay";
77			};
78
79			reg: regulator@40000578 {
80				compatible = "nordic,nrf5x-regulator";
81				reg = <0x40000578 0x1>;
82				regulator-name = "REG";
83				regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
84			};
85		};
86
87		bprot: bprot@40000000 {
88			compatible = "nordic,nrf-bprot";
89			reg = <0x40000000 0x1000>;
90			status = "okay";
91		};
92
93		radio: radio@40001000 {
94			compatible = "nordic,nrf-radio";
95			reg = <0x40001000 0x1000>;
96			interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>;
97			status = "okay";
98			ble-2mbps-supported;
99
100			/* Note: In the nRF Connect SDK the SoftDevice Controller
101			 * is added and set as the default Bluetooth Controller.
102			 */
103			bt_hci_controller: bt_hci_controller {
104				compatible = "zephyr,bt-hci-ll-sw-split";
105				status = "okay";
106			};
107		};
108
109		uart0: uart@40002000 {
110			/* uart can be either UART or UARTE, for the user to pick */
111			/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
112			compatible = "nordic,nrf-uarte";
113			reg = <0x40002000 0x1000>;
114			interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>;
115			status = "disabled";
116		};
117
118		i2c0: i2c@40003000 {
119			/*
120			 * This i2c node can be TWI, TWIM, or TWIS,
121			 * for the user to pick:
122			 * compatible = "nordic,nrf-twi" or
123			 *              "nordic,nrf-twim" or
124			 *              "nordic,nrf-twis".
125			 */
126			compatible = "nordic,nrf-twim";
127			#address-cells = <1>;
128			#size-cells = <0>;
129			reg = <0x40003000 0x1000>;
130			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
131			easydma-maxcnt-bits = <14>;
132			status = "disabled";
133			zephyr,pm-device-runtime-auto;
134		};
135
136		spi0: spi@40004000 {
137			/*
138			 * This spi node can be SPI, SPIM, or SPIS,
139			 * for the user to pick:
140			 * compatible = "nordic,nrf-spi" or
141			 *              "nordic,nrf-spim" or
142			 *              "nordic,nrf-spis".
143			 */
144			compatible = "nordic,nrf-spim";
145			#address-cells = <1>;
146			#size-cells = <0>;
147			reg = <0x40004000 0x1000>;
148			interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
149			max-frequency = <DT_FREQ_M(8)>;
150			easydma-maxcnt-bits = <14>;
151			status = "disabled";
152		};
153
154		gpiote: gpiote0: gpiote@40006000 {
155			compatible = "nordic,nrf-gpiote";
156			reg = <0x40006000 0x1000>;
157			interrupts = <6 5>;
158			status = "disabled";
159			instance = <0>;
160		};
161
162		adc: adc@40007000 {
163			compatible = "nordic,nrf-saadc";
164			reg = <0x40007000 0x1000>;
165			interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>;
166			status = "disabled";
167			#io-channel-cells = <1>;
168		};
169
170		timer0: timer@40008000 {
171			compatible = "nordic,nrf-timer";
172			status = "disabled";
173			reg = <0x40008000 0x1000>;
174			cc-num = <4>;
175			max-bit-width = <32>;
176			interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
177			prescaler = <0>;
178		};
179
180		timer1: timer@40009000 {
181			compatible = "nordic,nrf-timer";
182			status = "disabled";
183			reg = <0x40009000 0x1000>;
184			cc-num = <4>;
185			max-bit-width = <32>;
186			interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
187			prescaler = <0>;
188		};
189
190		timer2: timer@4000a000 {
191			compatible = "nordic,nrf-timer";
192			status = "disabled";
193			reg = <0x4000a000 0x1000>;
194			cc-num = <4>;
195			max-bit-width = <32>;
196			interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
197			prescaler = <0>;
198		};
199
200		rtc0: rtc@4000b000 {
201			compatible = "nordic,nrf-rtc";
202			reg = <0x4000b000 0x1000>;
203			cc-num = <3>;
204			interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
205			status = "disabled";
206			clock-frequency = <32768>;
207			prescaler = <1>;
208		};
209
210		temp: temp@4000c000 {
211			compatible = "nordic,nrf-temp";
212			reg = <0x4000c000 0x1000>;
213			interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
214			status = "okay";
215		};
216
217		rng: random@4000d000 {
218			compatible = "nordic,nrf-rng";
219			reg = <0x4000d000 0x1000>;
220			interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
221			status = "okay";
222		};
223
224		ecb: ecb@4000e000 {
225			compatible = "nordic,nrf-ecb";
226			reg = <0x4000e000 0x1000>;
227			interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
228			status = "okay";
229		};
230
231		ccm: ccm@4000f000 {
232			compatible = "nordic,nrf-ccm";
233			reg = <0x4000f000 0x1000>;
234			interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>;
235			length-field-length-8-bits;
236			status = "okay";
237		};
238
239		wdt: wdt0: watchdog@40010000 {
240			compatible = "nordic,nrf-wdt";
241			reg = <0x40010000 0x1000>;
242			interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
243			status = "okay";
244		};
245
246		rtc1: rtc@40011000 {
247			compatible = "nordic,nrf-rtc";
248			reg = <0x40011000 0x1000>;
249			cc-num = <4>;
250			interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
251			status = "disabled";
252			clock-frequency = <32768>;
253			prescaler = <1>;
254		};
255
256		qdec: qdec0: qdec@40012000 {
257			compatible = "nordic,nrf-qdec";
258			reg = <0x40012000 0x1000>;
259			interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
260			status = "disabled";
261		};
262
263		egu0: swi0: egu@40014000 {
264			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
265			reg = <0x40014000 0x1000>;
266			interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
267			status = "okay";
268		};
269
270		egu1: swi1: egu@40015000 {
271			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
272			reg = <0x40015000 0x1000>;
273			interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>;
274			status = "okay";
275		};
276
277		swi2: swi@40016000 {
278			compatible = "nordic,nrf-swi";
279			reg = <0x40016000 0x1000>;
280			interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
281			status = "okay";
282		};
283
284		swi3: swi@40017000 {
285			compatible = "nordic,nrf-swi";
286			reg = <0x40017000 0x1000>;
287			interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>;
288			status = "okay";
289		};
290
291		swi4: swi@40018000 {
292			compatible = "nordic,nrf-swi";
293			reg = <0x40018000 0x1000>;
294			interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
295			status = "okay";
296		};
297
298		swi5: swi@40019000 {
299			compatible = "nordic,nrf-swi";
300			reg = <0x40019000 0x1000>;
301			interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
302			status = "okay";
303		};
304
305		flash_controller: flash-controller@4001e000 {
306			compatible = "nordic,nrf52-flash-controller";
307			reg = <0x4001e000 0x1000>;
308			partial-erase;
309
310			#address-cells = <1>;
311			#size-cells = <1>;
312
313
314			flash0: flash@0 {
315				compatible = "soc-nv-flash";
316				erase-block-size = <4096>;
317				write-block-size = <4>;
318			};
319		};
320
321		ppi: ppi@4001f000 {
322			compatible = "nordic,nrf-ppi";
323			reg = <0x4001f000 0x1000>;
324			status = "okay";
325		};
326
327		gpio0: gpio@50000000 {
328			compatible = "nordic,nrf-gpio";
329			gpio-controller;
330			reg = <0x50000000 0x1000>;
331			#gpio-cells = <2>;
332			status = "disabled";
333			port = <0>;
334			gpiote-instance = <&gpiote>;
335		};
336	};
337};
338
339&nvic {
340	arm,num-irq-priority-bits = <3>;
341};
342
343&systick {
344	/* Use RTC for system clock, instead of SysTick. */
345	status = "disabled";
346};
347