1/*
2 * Copyright (c) 2019 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv7-m.dtsi>
8#include <nordic/nrf_common.dtsi>
9#include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
10#include <zephyr/dt-bindings/regulator/nrf5x.h>
11
12/ {
13	chosen {
14		zephyr,bt-hci = &bt_hci_controller;
15		zephyr,entropy = &rng;
16		zephyr,flash-controller = &flash_controller;
17	};
18
19	cpus {
20		#address-cells = <1>;
21		#size-cells = <0>;
22
23		cpu@0 {
24			device_type = "cpu";
25			compatible = "arm,cortex-m4";
26			reg = <0>;
27			#address-cells = <1>;
28			#size-cells = <1>;
29
30			itm: itm@e0000000 {
31				compatible = "arm,armv7m-itm";
32				reg = <0xe0000000 0x1000>;
33				swo-ref-frequency = <32000000>;
34			};
35		};
36	};
37
38	soc {
39		ficr: ficr@10000000 {
40			compatible = "nordic,nrf-ficr";
41			reg = <0x10000000 0x1000>;
42			#nordic,ficr-cells = <1>;
43			status = "okay";
44		};
45
46		uicr: uicr@10001000 {
47			compatible = "nordic,nrf-uicr";
48			reg = <0x10001000 0x1000>;
49			status = "okay";
50		};
51
52		sram0: memory@20000000 {
53			compatible = "mmio-sram";
54		};
55
56		clock: clock@40000000 {
57			compatible = "nordic,nrf-clock";
58			reg = <0x40000000 0x1000>;
59			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
60			status = "okay";
61		};
62
63		power: power@40000000 {
64			compatible = "nordic,nrf-power";
65			reg = <0x40000000 0x1000>;
66			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
67			status = "okay";
68			#address-cells = <1>;
69			#size-cells = <1>;
70
71			gpregret1: gpregret1@4000051c {
72				#address-cells = <1>;
73				#size-cells = <1>;
74				compatible = "nordic,nrf-gpregret";
75				reg = <0x4000051c 0x1>;
76				status = "okay";
77			};
78
79			gpregret2: gpregret2@40000520 {
80				#address-cells = <1>;
81				#size-cells = <1>;
82				compatible = "nordic,nrf-gpregret";
83				reg = <0x40000520 0x1>;
84				status = "okay";
85			};
86
87			reg: regulator@40000578 {
88				compatible = "nordic,nrf5x-regulator";
89				reg = <0x40000578 0x1>;
90				regulator-name = "REG";
91				regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
92			};
93		};
94
95		bprot: bprot@40000000 {
96			compatible = "nordic,nrf-bprot";
97			reg = <0x40000000 0x1000>;
98			status = "okay";
99		};
100
101		radio: radio@40001000 {
102			compatible = "nordic,nrf-radio";
103			reg = <0x40001000 0x1000>;
104			interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>;
105			status = "okay";
106			dfe-supported;
107			ieee802154-supported;
108			ble-2mbps-supported;
109			ble-coded-phy-supported;
110
111			ieee802154: ieee802154 {
112				compatible = "nordic,nrf-ieee802154";
113				status = "disabled";
114			};
115
116			/* Note: In the nRF Connect SDK the SoftDevice Controller
117			 * is added and set as the default Bluetooth Controller.
118			 */
119			bt_hci_controller: bt_hci_controller {
120				compatible = "zephyr,bt-hci-ll-sw-split";
121				status = "okay";
122			};
123		};
124
125		uart0: uart@40002000 {
126			/* uart can be either UART or UARTE, for the user to pick */
127			/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
128			compatible = "nordic,nrf-uarte";
129			reg = <0x40002000 0x1000>;
130			interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>;
131			status = "disabled";
132		};
133
134		i2c0: i2c@40003000 {
135			/*
136			 * This i2c node can be TWI, TWIM, or TWIS,
137			 * for the user to pick:
138			 * compatible = "nordic,nrf-twi" or
139			 *              "nordic,nrf-twim" or
140			 *              "nordic,nrf-twis".
141			 */
142			compatible = "nordic,nrf-twim";
143			#address-cells = <1>;
144			#size-cells = <0>;
145			reg = <0x40003000 0x1000>;
146			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
147			easydma-maxcnt-bits = <14>;
148			status = "disabled";
149			zephyr,pm-device-runtime-auto;
150		};
151
152		spi1: spi@40003000 {
153		/* cannot be used with i2c0 */
154			/*
155			 * This spi node can be SPI, SPIM, or SPIS,
156			 * for the user to pick:
157			 * compatible = "nordic,nrf-spi" or
158			 *              "nordic,nrf-spim" or
159			 *              "nordic,nrf-spis".
160			 */
161			compatible = "nordic,nrf-spim";
162			#address-cells = <1>;
163			#size-cells = <0>;
164			reg = <0x40003000 0x1000>;
165			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
166			max-frequency = <DT_FREQ_M(8)>;
167			easydma-maxcnt-bits = <14>;
168			status = "disabled";
169		};
170
171		spi0: spi@40004000 {
172			/*
173			 * This spi node can be SPI, SPIM, or SPIS,
174			 * for the user to pick:
175			 * compatible = "nordic,nrf-spi" or
176			 *              "nordic,nrf-spim" or
177			 *              "nordic,nrf-spis".
178			 */
179			compatible = "nordic,nrf-spim";
180			#address-cells = <1>;
181			#size-cells = <0>;
182			reg = <0x40004000 0x1000>;
183			interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
184			max-frequency = <DT_FREQ_M(8)>;
185			easydma-maxcnt-bits = <14>;
186			status = "disabled";
187		};
188
189		gpiote: gpiote0: gpiote@40006000 {
190			compatible = "nordic,nrf-gpiote";
191			reg = <0x40006000 0x1000>;
192			interrupts = <6 5>;
193			status = "disabled";
194			instance = <0>;
195		};
196
197		adc: adc@40007000 {
198			compatible = "nordic,nrf-saadc";
199			reg = <0x40007000 0x1000>;
200			interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>;
201			status = "disabled";
202			#io-channel-cells = <1>;
203		};
204
205		timer0: timer@40008000 {
206			compatible = "nordic,nrf-timer";
207			status = "disabled";
208			reg = <0x40008000 0x1000>;
209			cc-num = <4>;
210			max-bit-width = <32>;
211			interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
212			prescaler = <0>;
213		};
214
215		timer1: timer@40009000 {
216			compatible = "nordic,nrf-timer";
217			status = "disabled";
218			reg = <0x40009000 0x1000>;
219			cc-num = <4>;
220			max-bit-width = <32>;
221			interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
222			prescaler = <0>;
223		};
224
225		timer2: timer@4000a000 {
226			compatible = "nordic,nrf-timer";
227			status = "disabled";
228			reg = <0x4000a000 0x1000>;
229			cc-num = <4>;
230			max-bit-width = <32>;
231			interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
232			prescaler = <0>;
233		};
234
235		rtc0: rtc@4000b000 {
236			compatible = "nordic,nrf-rtc";
237			reg = <0x4000b000 0x1000>;
238			cc-num = <3>;
239			interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
240			status = "disabled";
241			clock-frequency = <32768>;
242			prescaler = <1>;
243		};
244
245		temp: temp@4000c000 {
246			compatible = "nordic,nrf-temp";
247			reg = <0x4000c000 0x1000>;
248			interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
249			status = "okay";
250		};
251
252		rng: random@4000d000 {
253			compatible = "nordic,nrf-rng";
254			reg = <0x4000d000 0x1000>;
255			interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
256			status = "okay";
257		};
258
259		ecb: ecb@4000e000 {
260			compatible = "nordic,nrf-ecb";
261			reg = <0x4000e000 0x1000>;
262			interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
263			status = "okay";
264		};
265
266		ccm: ccm@4000f000 {
267			compatible = "nordic,nrf-ccm";
268			reg = <0x4000f000 0x1000>;
269			interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>;
270			length-field-length-8-bits;
271			status = "okay";
272		};
273
274		wdt: wdt0: watchdog@40010000 {
275			compatible = "nordic,nrf-wdt";
276			reg = <0x40010000 0x1000>;
277			interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
278			status = "okay";
279		};
280
281		rtc1: rtc@40011000 {
282			compatible = "nordic,nrf-rtc";
283			reg = <0x40011000 0x1000>;
284			cc-num = <4>;
285			interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
286			status = "disabled";
287			clock-frequency = <32768>;
288			prescaler = <1>;
289		};
290
291		qdec: qdec0: qdec@40012000 {
292			compatible = "nordic,nrf-qdec";
293			reg = <0x40012000 0x1000>;
294			interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
295			status = "disabled";
296		};
297
298		comp: comparator@40013000 {
299			compatible = "nordic,nrf-comp";
300			reg = <0x40013000 0x1000>;
301			interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>;
302			status = "disabled";
303		};
304
305		egu0: swi0: egu@40014000 {
306			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
307			reg = <0x40014000 0x1000>;
308			interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
309			status = "okay";
310		};
311
312		egu1: swi1: egu@40015000 {
313			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
314			reg = <0x40015000 0x1000>;
315			interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>;
316			status = "okay";
317		};
318
319		swi2: swi@40016000 {
320			compatible = "nordic,nrf-swi";
321			reg = <0x40016000 0x1000>;
322			interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
323			status = "okay";
324		};
325
326		swi3: swi@40017000 {
327			compatible = "nordic,nrf-swi";
328			reg = <0x40017000 0x1000>;
329			interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>;
330			status = "okay";
331		};
332
333		swi4: swi@40018000 {
334			compatible = "nordic,nrf-swi";
335			reg = <0x40018000 0x1000>;
336			interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
337			status = "okay";
338		};
339
340		swi5: swi@40019000 {
341			compatible = "nordic,nrf-swi";
342			reg = <0x40019000 0x1000>;
343			interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
344			status = "okay";
345		};
346
347		pwm0: pwm@4001c000 {
348			compatible = "nordic,nrf-pwm";
349			reg = <0x4001c000 0x1000>;
350			interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>;
351			status = "disabled";
352			#pwm-cells = <3>;
353		};
354
355		pdm0: pdm@4001d000 {
356			compatible = "nordic,nrf-pdm";
357			reg = <0x4001d000 0x1000>;
358			interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>;
359			status = "disabled";
360		};
361
362		flash_controller: flash-controller@4001e000 {
363			compatible = "nordic,nrf52-flash-controller";
364			reg = <0x4001e000 0x1000>;
365			partial-erase;
366
367			#address-cells = <1>;
368			#size-cells = <1>;
369
370
371			flash0: flash@0 {
372				compatible = "soc-nv-flash";
373				erase-block-size = <4096>;
374				write-block-size = <4>;
375			};
376		};
377
378		ppi: ppi@4001f000 {
379			compatible = "nordic,nrf-ppi";
380			reg = <0x4001f000 0x1000>;
381			status = "okay";
382		};
383
384		gpio0: gpio@50000000 {
385			compatible = "nordic,nrf-gpio";
386			gpio-controller;
387			/* This way of addressing is used to be compatible */
388			/* with nrf52840.dtsi */
389			reg = <0x50000000 0x200
390			       0x50000500 0x300>;
391			#gpio-cells = <2>;
392			status = "disabled";
393			port = <0>;
394			gpiote-instance = <&gpiote>;
395		};
396	};
397};
398
399&nvic {
400	arm,num-irq-priority-bits = <3>;
401};
402
403&systick {
404	/* Use RTC for system clock, instead of SysTick. */
405	status = "disabled";
406};
407