1/* 2 * Copyright (c) 2020 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv7-m.dtsi> 8#include <nordic/nrf_common.dtsi> 9#include <zephyr/dt-bindings/regulator/nrf5x.h> 10 11/ { 12 13 chosen { 14 zephyr,bt-hci = &bt_hci_controller; 15 zephyr,entropy = &rng; 16 zephyr,flash-controller = &flash_controller; 17 }; 18 19 cpus { 20 #address-cells = <1>; 21 #size-cells = <0>; 22 23 cpu@0 { 24 device_type = "cpu"; 25 compatible = "arm,cortex-m4"; 26 reg = <0>; 27 #address-cells = <1>; 28 #size-cells = <1>; 29 30 itm: itm@e0000000 { 31 compatible = "arm,armv7m-itm"; 32 reg = <0xe0000000 0x1000>; 33 swo-ref-frequency = <32000000>; 34 }; 35 }; 36 }; 37 38 soc { 39 ficr: ficr@10000000 { 40 compatible = "nordic,nrf-ficr"; 41 reg = <0x10000000 0x1000>; 42 #nordic,ficr-cells = <1>; 43 status = "okay"; 44 }; 45 46 uicr: uicr@10001000 { 47 compatible = "nordic,nrf-uicr"; 48 reg = <0x10001000 0x1000>; 49 status = "okay"; 50 }; 51 52 sram0: memory@20000000 { 53 compatible = "mmio-sram"; 54 }; 55 56 clock: clock@40000000 { 57 compatible = "nordic,nrf-clock"; 58 reg = <0x40000000 0x1000>; 59 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 60 status = "okay"; 61 }; 62 63 power: power@40000000 { 64 compatible = "nordic,nrf-power"; 65 reg = <0x40000000 0x1000>; 66 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 67 status = "okay"; 68 #address-cells = <1>; 69 #size-cells = <1>; 70 71 gpregret1: gpregret1@4000051c { 72 #address-cells = <1>; 73 #size-cells = <1>; 74 compatible = "nordic,nrf-gpregret"; 75 reg = <0x4000051c 0x1>; 76 status = "okay"; 77 }; 78 79 gpregret2: gpregret2@40000520 { 80 #address-cells = <1>; 81 #size-cells = <1>; 82 compatible = "nordic,nrf-gpregret"; 83 reg = <0x40000520 0x1>; 84 status = "okay"; 85 }; 86 87 reg1: regulator@40000578 { 88 compatible = "nordic,nrf5x-regulator"; 89 reg = <0x40000578 0x1>; 90 regulator-name = "REG1"; 91 regulator-initial-mode = <NRF5X_REG_MODE_LDO>; 92 }; 93 94 reg0: regulator@40000580 { 95 compatible = "nordic,nrf52x-regulator-hv"; 96 reg = <0x40000580 0x1>; 97 regulator-name = "REG0"; 98 status = "disabled"; 99 }; 100 }; 101 102 radio: radio@40001000 { 103 compatible = "nordic,nrf-radio"; 104 reg = <0x40001000 0x1000>; 105 interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>; 106 status = "okay"; 107 dfe-supported; 108 ieee802154-supported; 109 ble-2mbps-supported; 110 ble-coded-phy-supported; 111 tx-high-power-supported; 112 113 ieee802154: ieee802154 { 114 compatible = "nordic,nrf-ieee802154"; 115 status = "disabled"; 116 }; 117 118 /* Note: In the nRF Connect SDK another Bluetooth controller 119 * is added and set as the default. 120 */ 121 bt_hci_controller: bt_hci_controller { 122 compatible = "zephyr,bt-hci-ll-sw-split"; 123 status = "okay"; 124 }; 125 }; 126 127 uart0: uart@40002000 { 128 /* uart can be either UART or UARTE, for the user to pick */ 129 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ 130 compatible = "nordic,nrf-uarte"; 131 reg = <0x40002000 0x1000>; 132 interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>; 133 status = "disabled"; 134 }; 135 136 i2c0: i2c@40003000 { 137 /* 138 * This i2c node can be TWI, TWIM, or TWIS, 139 * for the user to pick: 140 * compatible = "nordic,nrf-twi" or 141 * "nordic,nrf-twim" or 142 * "nordic,nrf-twis". 143 */ 144 compatible = "nordic,nrf-twim"; 145 #address-cells = <1>; 146 #size-cells = <0>; 147 reg = <0x40003000 0x1000>; 148 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 149 easydma-maxcnt-bits = <15>; 150 status = "disabled"; 151 zephyr,pm-device-runtime-auto; 152 }; 153 154 spi0: spi@40003000 { 155 /* 156 * This spi node can be SPI, SPIM, or SPIS, 157 * for the user to pick: 158 * compatible = "nordic,nrf-spi" or 159 * "nordic,nrf-spim" or 160 * "nordic,nrf-spis". 161 */ 162 compatible = "nordic,nrf-spim"; 163 #address-cells = <1>; 164 #size-cells = <0>; 165 reg = <0x40003000 0x1000>; 166 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 167 max-frequency = <DT_FREQ_M(8)>; 168 easydma-maxcnt-bits = <15>; 169 status = "disabled"; 170 }; 171 172 i2c1: i2c@40004000 { 173 /* 174 * This i2c node can be TWI, TWIM, or TWIS, 175 * for the user to pick: 176 * compatible = "nordic,nrf-twi" or 177 * "nordic,nrf-twim" or 178 * "nordic,nrf-twis". 179 */ 180 compatible = "nordic,nrf-twim"; 181 #address-cells = <1>; 182 #size-cells = <0>; 183 reg = <0x40004000 0x1000>; 184 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 185 easydma-maxcnt-bits = <15>; 186 status = "disabled"; 187 zephyr,pm-device-runtime-auto; 188 }; 189 190 spi1: spi@40004000 { 191 /* 192 * This spi node can be SPI, SPIM, or SPIS, 193 * for the user to pick: 194 * compatible = "nordic,nrf-spi" or 195 * "nordic,nrf-spim" or 196 * "nordic,nrf-spis". 197 */ 198 compatible = "nordic,nrf-spim"; 199 #address-cells = <1>; 200 #size-cells = <0>; 201 reg = <0x40004000 0x1000>; 202 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 203 max-frequency = <DT_FREQ_M(8)>; 204 easydma-maxcnt-bits = <15>; 205 status = "disabled"; 206 }; 207 208 gpiote: gpiote0: gpiote@40006000 { 209 compatible = "nordic,nrf-gpiote"; 210 reg = <0x40006000 0x1000>; 211 interrupts = <6 5>; 212 status = "disabled"; 213 instance = <0>; 214 }; 215 216 timer0: timer@40008000 { 217 compatible = "nordic,nrf-timer"; 218 status = "disabled"; 219 reg = <0x40008000 0x1000>; 220 cc-num = <4>; 221 max-bit-width = <32>; 222 interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; 223 prescaler = <0>; 224 }; 225 226 timer1: timer@40009000 { 227 compatible = "nordic,nrf-timer"; 228 status = "disabled"; 229 reg = <0x40009000 0x1000>; 230 cc-num = <4>; 231 max-bit-width = <32>; 232 interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; 233 prescaler = <0>; 234 }; 235 236 timer2: timer@4000a000 { 237 compatible = "nordic,nrf-timer"; 238 status = "disabled"; 239 reg = <0x4000a000 0x1000>; 240 cc-num = <4>; 241 max-bit-width = <32>; 242 interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; 243 prescaler = <0>; 244 }; 245 246 rtc0: rtc@4000b000 { 247 compatible = "nordic,nrf-rtc"; 248 reg = <0x4000b000 0x1000>; 249 cc-num = <3>; 250 interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; 251 status = "disabled"; 252 clock-frequency = <32768>; 253 prescaler = <1>; 254 }; 255 256 temp: temp@4000c000 { 257 compatible = "nordic,nrf-temp"; 258 reg = <0x4000c000 0x1000>; 259 interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; 260 status = "okay"; 261 }; 262 263 rng: random@4000d000 { 264 compatible = "nordic,nrf-rng"; 265 reg = <0x4000d000 0x1000>; 266 interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; 267 status = "okay"; 268 }; 269 270 ecb: ecb@4000e000 { 271 compatible = "nordic,nrf-ecb"; 272 reg = <0x4000e000 0x1000>; 273 interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; 274 status = "okay"; 275 }; 276 277 ccm: ccm@4000f000 { 278 compatible = "nordic,nrf-ccm"; 279 reg = <0x4000f000 0x1000>; 280 interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>; 281 length-field-length-8-bits; 282 headermask-supported; 283 status = "okay"; 284 }; 285 286 wdt: wdt0: watchdog@40010000 { 287 compatible = "nordic,nrf-wdt"; 288 reg = <0x40010000 0x1000>; 289 interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; 290 status = "okay"; 291 }; 292 293 rtc1: rtc@40011000 { 294 compatible = "nordic,nrf-rtc"; 295 reg = <0x40011000 0x1000>; 296 cc-num = <4>; 297 interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; 298 status = "disabled"; 299 clock-frequency = <32768>; 300 prescaler = <1>; 301 }; 302 303 qdec: qdec0: qdec@40012000 { 304 compatible = "nordic,nrf-qdec"; 305 reg = <0x40012000 0x1000>; 306 interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; 307 status = "disabled"; 308 }; 309 310 comp: comparator@40013000 { 311 compatible = "nordic,nrf-comp"; 312 reg = <0x40013000 0x1000>; 313 interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; 314 status = "disabled"; 315 }; 316 317 egu0: swi0: egu@40014000 { 318 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 319 reg = <0x40014000 0x1000>; 320 interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; 321 status = "okay"; 322 }; 323 324 egu1: swi1: egu@40015000 { 325 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 326 reg = <0x40015000 0x1000>; 327 interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>; 328 status = "okay"; 329 }; 330 331 egu2: swi2: egu@40016000 { 332 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 333 reg = <0x40016000 0x1000>; 334 interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; 335 status = "okay"; 336 }; 337 338 egu3: swi3: egu@40017000 { 339 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 340 reg = <0x40017000 0x1000>; 341 interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>; 342 status = "okay"; 343 }; 344 345 egu4: swi4: egu@40018000 { 346 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 347 reg = <0x40018000 0x1000>; 348 interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; 349 status = "okay"; 350 }; 351 352 egu5: swi5: egu@40019000 { 353 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 354 reg = <0x40019000 0x1000>; 355 interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; 356 status = "okay"; 357 }; 358 359 timer3: timer@4001a000 { 360 compatible = "nordic,nrf-timer"; 361 status = "disabled"; 362 reg = <0x4001a000 0x1000>; 363 cc-num = <6>; 364 max-bit-width = <32>; 365 interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>; 366 prescaler = <0>; 367 }; 368 369 acl: acl@4001e000 { 370 compatible = "nordic,nrf-acl"; 371 reg = <0x4001e000 0x1000>; 372 status = "okay"; 373 }; 374 375 flash_controller: flash-controller@4001e000 { 376 compatible = "nordic,nrf52-flash-controller"; 377 reg = <0x4001e000 0x1000>; 378 partial-erase; 379 380 #address-cells = <1>; 381 #size-cells = <1>; 382 383 384 flash0: flash@0 { 385 compatible = "soc-nv-flash"; 386 erase-block-size = <4096>; 387 write-block-size = <4>; 388 }; 389 }; 390 391 ppi: ppi@4001f000 { 392 compatible = "nordic,nrf-ppi"; 393 reg = <0x4001f000 0x1000>; 394 status = "okay"; 395 }; 396 397 usbd: usbd@40027000 { 398 compatible = "nordic,nrf-usbd"; 399 reg = <0x40027000 0x1000>; 400 interrupts = <39 NRF_DEFAULT_IRQ_PRIORITY>; 401 num-bidir-endpoints = <1>; 402 num-in-endpoints = <7>; 403 num-out-endpoints = <7>; 404 num-isoin-endpoints = <1>; 405 num-isoout-endpoints = <1>; 406 status = "disabled"; 407 }; 408 409 gpio0: gpio@50000000 { 410 compatible = "nordic,nrf-gpio"; 411 gpio-controller; 412 reg = <0x50000000 0x200 413 0x50000500 0x300>; 414 #gpio-cells = <2>; 415 status = "disabled"; 416 port = <0>; 417 gpiote-instance = <&gpiote>; 418 }; 419 }; 420}; 421 422&nvic { 423 arm,num-irq-priority-bits = <3>; 424}; 425 426&systick { 427 /* Use RTC for system clock, instead of SysTick. */ 428 status = "disabled"; 429}; 430
