1/* SPDX-License-Identifier: Apache-2.0 */ 2 3#include <arm/armv7-m.dtsi> 4#include <nordic/nrf_common.dtsi> 5#include <zephyr/dt-bindings/adc/nrf-saadc-v3.h> 6#include <zephyr/dt-bindings/regulator/nrf5x.h> 7 8/ { 9 chosen { 10 zephyr,bt-hci = &bt_hci_controller; 11 zephyr,entropy = &rng; 12 zephyr,flash-controller = &flash_controller; 13 }; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 device_type = "cpu"; 21 compatible = "arm,cortex-m4f"; 22 reg = <0>; 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 itm: itm@e0000000 { 27 compatible = "arm,armv7m-itm"; 28 reg = <0xe0000000 0x1000>; 29 swo-ref-frequency = <32000000>; 30 }; 31 }; 32 }; 33 34 soc { 35 ficr: ficr@10000000 { 36 compatible = "nordic,nrf-ficr"; 37 reg = <0x10000000 0x1000>; 38 #nordic,ficr-cells = <1>; 39 status = "okay"; 40 }; 41 42 uicr: uicr@10001000 { 43 compatible = "nordic,nrf-uicr"; 44 reg = <0x10001000 0x1000>; 45 status = "okay"; 46 }; 47 48 sram0: memory@20000000 { 49 compatible = "mmio-sram"; 50 }; 51 52 clock: clock@40000000 { 53 compatible = "nordic,nrf-clock"; 54 reg = <0x40000000 0x1000>; 55 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 56 status = "okay"; 57 }; 58 59 power: power@40000000 { 60 compatible = "nordic,nrf-power"; 61 reg = <0x40000000 0x1000>; 62 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 63 status = "okay"; 64 #address-cells = <1>; 65 #size-cells = <1>; 66 67 gpregret1: gpregret1@4000051c { 68 #address-cells = <1>; 69 #size-cells = <1>; 70 compatible = "nordic,nrf-gpregret"; 71 reg = <0x4000051c 0x1>; 72 status = "okay"; 73 }; 74 75 gpregret2: gpregret2@40000520 { 76 #address-cells = <1>; 77 #size-cells = <1>; 78 compatible = "nordic,nrf-gpregret"; 79 reg = <0x40000520 0x1>; 80 status = "okay"; 81 }; 82 83 reg1: regulator@40000578 { 84 compatible = "nordic,nrf5x-regulator"; 85 reg = <0x40000578 0x1>; 86 regulator-name = "REG1"; 87 regulator-initial-mode = <NRF5X_REG_MODE_LDO>; 88 }; 89 }; 90 91 radio: radio@40001000 { 92 compatible = "nordic,nrf-radio"; 93 reg = <0x40001000 0x1000>; 94 interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>; 95 status = "okay"; 96 ieee802154-supported; 97 ble-2mbps-supported; 98 ble-coded-phy-supported; 99 tx-high-power-supported; 100 101 ieee802154: ieee802154 { 102 compatible = "nordic,nrf-ieee802154"; 103 status = "disabled"; 104 }; 105 106 /* Note: In the nRF Connect SDK the SoftDevice Controller 107 * is added and set as the default Bluetooth Controller. 108 */ 109 bt_hci_controller: bt_hci_controller { 110 compatible = "zephyr,bt-hci-ll-sw-split"; 111 status = "okay"; 112 }; 113 }; 114 115 uart0: uart@40002000 { 116 /* uart can be either UART or UARTE, for the user to pick */ 117 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ 118 compatible = "nordic,nrf-uarte"; 119 reg = <0x40002000 0x1000>; 120 interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>; 121 status = "disabled"; 122 }; 123 124 i2c0: i2c@40003000 { 125 /* 126 * This i2c node can be TWI, TWIM, or TWIS, 127 * for the user to pick: 128 * compatible = "nordic,nrf-twi" or 129 * "nordic,nrf-twim" or 130 * "nordic,nrf-twis". 131 */ 132 compatible = "nordic,nrf-twim"; 133 #address-cells = <1>; 134 #size-cells = <0>; 135 reg = <0x40003000 0x1000>; 136 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 137 easydma-maxcnt-bits = <16>; 138 status = "disabled"; 139 zephyr,pm-device-runtime-auto; 140 }; 141 142 spi0: spi@40003000 { 143 /* 144 * This spi node can be SPI, SPIM, or SPIS, 145 * for the user to pick: 146 * compatible = "nordic,nrf-spi" or 147 * "nordic,nrf-spim" or 148 * "nordic,nrf-spis". 149 */ 150 compatible = "nordic,nrf-spim"; 151 #address-cells = <1>; 152 #size-cells = <0>; 153 reg = <0x40003000 0x1000>; 154 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 155 max-frequency = <DT_FREQ_M(8)>; 156 easydma-maxcnt-bits = <16>; 157 status = "disabled"; 158 }; 159 160 i2c1: i2c@40004000 { 161 /* 162 * This i2c node can be TWI, TWIM, or TWIS, 163 * for the user to pick: 164 * compatible = "nordic,nrf-twi" or 165 * "nordic,nrf-twim" or 166 * "nordic,nrf-twis". 167 */ 168 compatible = "nordic,nrf-twim"; 169 #address-cells = <1>; 170 #size-cells = <0>; 171 reg = <0x40004000 0x1000>; 172 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 173 easydma-maxcnt-bits = <16>; 174 status = "disabled"; 175 zephyr,pm-device-runtime-auto; 176 }; 177 178 spi1: spi@40004000 { 179 /* 180 * This spi node can be SPI, SPIM, or SPIS, 181 * for the user to pick: 182 * compatible = "nordic,nrf-spi" or 183 * "nordic,nrf-spim" or 184 * "nordic,nrf-spis". 185 */ 186 compatible = "nordic,nrf-spim"; 187 #address-cells = <1>; 188 #size-cells = <0>; 189 reg = <0x40004000 0x1000>; 190 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 191 max-frequency = <DT_FREQ_M(8)>; 192 easydma-maxcnt-bits = <16>; 193 status = "disabled"; 194 }; 195 196 nfct: nfct@40005000 { 197 compatible = "nordic,nrf-nfct"; 198 reg = <0x40005000 0x1000>; 199 interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; 200 status = "disabled"; 201 }; 202 203 gpiote: gpiote0: gpiote@40006000 { 204 compatible = "nordic,nrf-gpiote"; 205 reg = <0x40006000 0x1000>; 206 interrupts = <6 5>; 207 status = "disabled"; 208 instance = <0>; 209 }; 210 211 adc: adc@40007000 { 212 compatible = "nordic,nrf-saadc"; 213 reg = <0x40007000 0x1000>; 214 interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>; 215 status = "disabled"; 216 #io-channel-cells = <1>; 217 }; 218 219 timer0: timer@40008000 { 220 compatible = "nordic,nrf-timer"; 221 status = "disabled"; 222 reg = <0x40008000 0x1000>; 223 cc-num = <4>; 224 max-bit-width = <32>; 225 interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; 226 prescaler = <0>; 227 }; 228 229 timer1: timer@40009000 { 230 compatible = "nordic,nrf-timer"; 231 status = "disabled"; 232 reg = <0x40009000 0x1000>; 233 cc-num = <4>; 234 max-bit-width = <32>; 235 interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; 236 prescaler = <0>; 237 }; 238 239 timer2: timer@4000a000 { 240 compatible = "nordic,nrf-timer"; 241 status = "disabled"; 242 reg = <0x4000a000 0x1000>; 243 cc-num = <4>; 244 max-bit-width = <32>; 245 interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; 246 prescaler = <0>; 247 }; 248 249 rtc0: rtc@4000b000 { 250 compatible = "nordic,nrf-rtc"; 251 reg = <0x4000b000 0x1000>; 252 cc-num = <3>; 253 interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; 254 status = "disabled"; 255 clock-frequency = <32768>; 256 prescaler = <1>; 257 }; 258 259 temp: temp@4000c000 { 260 compatible = "nordic,nrf-temp"; 261 reg = <0x4000c000 0x1000>; 262 interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; 263 status = "okay"; 264 }; 265 266 rng: random@4000d000 { 267 compatible = "nordic,nrf-rng"; 268 reg = <0x4000d000 0x1000>; 269 interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; 270 status = "okay"; 271 }; 272 273 ecb: ecb@4000e000 { 274 compatible = "nordic,nrf-ecb"; 275 reg = <0x4000e000 0x1000>; 276 interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; 277 status = "okay"; 278 }; 279 280 ccm: ccm@4000f000 { 281 compatible = "nordic,nrf-ccm"; 282 reg = <0x4000f000 0x1000>; 283 interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>; 284 length-field-length-8-bits; 285 status = "okay"; 286 }; 287 288 wdt: wdt0: watchdog@40010000 { 289 compatible = "nordic,nrf-wdt"; 290 reg = <0x40010000 0x1000>; 291 interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; 292 status = "okay"; 293 }; 294 295 rtc1: rtc@40011000 { 296 compatible = "nordic,nrf-rtc"; 297 reg = <0x40011000 0x1000>; 298 cc-num = <4>; 299 interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; 300 status = "disabled"; 301 clock-frequency = <32768>; 302 prescaler = <1>; 303 }; 304 305 qdec: qdec0: qdec@40012000 { 306 compatible = "nordic,nrf-qdec"; 307 reg = <0x40012000 0x1000>; 308 interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; 309 status = "disabled"; 310 }; 311 312 comp: comparator@40013000 { 313 /* 314 * Use compatible "nordic,nrf-comp" to configure as COMP 315 * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP 316 */ 317 compatible = "nordic,nrf-comp"; 318 reg = <0x40013000 0x1000>; 319 interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; 320 status = "disabled"; 321 }; 322 323 egu0: swi0: egu@40014000 { 324 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 325 reg = <0x40014000 0x1000>; 326 interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; 327 status = "okay"; 328 }; 329 330 egu1: swi1: egu@40015000 { 331 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 332 reg = <0x40015000 0x1000>; 333 interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>; 334 status = "okay"; 335 }; 336 337 egu2: swi2: egu@40016000 { 338 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 339 reg = <0x40016000 0x1000>; 340 interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; 341 status = "okay"; 342 }; 343 344 egu3: swi3: egu@40017000 { 345 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 346 reg = <0x40017000 0x1000>; 347 interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>; 348 status = "okay"; 349 }; 350 351 egu4: swi4: egu@40018000 { 352 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 353 reg = <0x40018000 0x1000>; 354 interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; 355 status = "okay"; 356 }; 357 358 egu5: swi5: egu@40019000 { 359 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 360 reg = <0x40019000 0x1000>; 361 interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; 362 status = "okay"; 363 }; 364 365 timer3: timer@4001a000 { 366 compatible = "nordic,nrf-timer"; 367 status = "disabled"; 368 reg = <0x4001a000 0x1000>; 369 cc-num = <6>; 370 max-bit-width = <32>; 371 interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>; 372 prescaler = <0>; 373 }; 374 375 timer4: timer@4001b000 { 376 compatible = "nordic,nrf-timer"; 377 status = "disabled"; 378 reg = <0x4001b000 0x1000>; 379 cc-num = <6>; 380 max-bit-width = <32>; 381 interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>; 382 prescaler = <0>; 383 }; 384 385 pwm0: pwm@4001c000 { 386 compatible = "nordic,nrf-pwm"; 387 reg = <0x4001c000 0x1000>; 388 interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>; 389 status = "disabled"; 390 #pwm-cells = <3>; 391 }; 392 393 pdm0: pdm@4001d000 { 394 compatible = "nordic,nrf-pdm"; 395 reg = <0x4001d000 0x1000>; 396 interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>; 397 status = "disabled"; 398 }; 399 400 acl: acl@4001e000 { 401 compatible = "nordic,nrf-acl"; 402 reg = <0x4001e000 0x1000>; 403 status = "okay"; 404 }; 405 406 flash_controller: flash-controller@4001e000 { 407 compatible = "nordic,nrf52-flash-controller"; 408 reg = <0x4001e000 0x1000>; 409 partial-erase; 410 411 #address-cells = <1>; 412 #size-cells = <1>; 413 414 415 flash0: flash@0 { 416 compatible = "soc-nv-flash"; 417 erase-block-size = <4096>; 418 write-block-size = <4>; 419 }; 420 }; 421 422 ppi: ppi@4001f000 { 423 compatible = "nordic,nrf-ppi"; 424 reg = <0x4001f000 0x1000>; 425 status = "okay"; 426 }; 427 428 mwu: mwu@40020000 { 429 compatible = "nordic,nrf-mwu"; 430 reg = <0x40020000 0x1000>; 431 status = "okay"; 432 }; 433 434 pwm1: pwm@40021000 { 435 compatible = "nordic,nrf-pwm"; 436 reg = <0x40021000 0x1000>; 437 interrupts = <33 NRF_DEFAULT_IRQ_PRIORITY>; 438 status = "disabled"; 439 #pwm-cells = <3>; 440 }; 441 442 pwm2: pwm@40022000 { 443 compatible = "nordic,nrf-pwm"; 444 reg = <0x40022000 0x1000>; 445 interrupts = <34 NRF_DEFAULT_IRQ_PRIORITY>; 446 status = "disabled"; 447 #pwm-cells = <3>; 448 }; 449 450 spi2: spi@40023000 { 451 /* 452 * This spi node can be SPI, SPIM, or SPIS, 453 * for the user to pick: 454 * compatible = "nordic,nrf-spi" or 455 * "nordic,nrf-spim" or 456 * "nordic,nrf-spis". 457 */ 458 compatible = "nordic,nrf-spim"; 459 #address-cells = <1>; 460 #size-cells = <0>; 461 reg = <0x40023000 0x1000>; 462 interrupts = <35 NRF_DEFAULT_IRQ_PRIORITY>; 463 max-frequency = <DT_FREQ_M(8)>; 464 easydma-maxcnt-bits = <16>; 465 status = "disabled"; 466 }; 467 468 rtc2: rtc@40024000 { 469 compatible = "nordic,nrf-rtc"; 470 reg = <0x40024000 0x1000>; 471 cc-num = <4>; 472 interrupts = <36 NRF_DEFAULT_IRQ_PRIORITY>; 473 status = "disabled"; 474 clock-frequency = <32768>; 475 prescaler = <1>; 476 }; 477 478 i2s0: i2s@40025000 { 479 compatible = "nordic,nrf-i2s"; 480 #address-cells = <1>; 481 #size-cells = <0>; 482 reg = <0x40025000 0x1000>; 483 interrupts = <37 NRF_DEFAULT_IRQ_PRIORITY>; 484 status = "disabled"; 485 }; 486 487 usbd: usbd@40027000 { 488 compatible = "nordic,nrf-usbd"; 489 reg = <0x40027000 0x1000>; 490 interrupts = <39 NRF_DEFAULT_IRQ_PRIORITY>; 491 num-bidir-endpoints = <1>; 492 num-in-endpoints = <7>; 493 num-out-endpoints = <7>; 494 num-isoin-endpoints = <1>; 495 num-isoout-endpoints = <1>; 496 status = "disabled"; 497 }; 498 499 uart1: uart@40028000 { 500 compatible = "nordic,nrf-uarte"; 501 reg = <0x40028000 0x1000>; 502 interrupts = <40 NRF_DEFAULT_IRQ_PRIORITY>; 503 status = "disabled"; 504 }; 505 506 qspi: qspi@40029000 { 507 compatible = "nordic,nrf-qspi"; 508 #address-cells = <1>; 509 #size-cells = <0>; 510 reg = <0x40029000 0x1000>, <0x12000000 0x8000000>; 511 reg-names = "qspi", "qspi_mm"; 512 interrupts = <41 NRF_DEFAULT_IRQ_PRIORITY>; 513 status = "disabled"; 514 }; 515 516 pwm3: pwm@4002d000 { 517 compatible = "nordic,nrf-pwm"; 518 reg = <0x4002d000 0x1000>; 519 interrupts = <45 NRF_DEFAULT_IRQ_PRIORITY>; 520 status = "disabled"; 521 #pwm-cells = <3>; 522 }; 523 524 spi3: spi@4002f000 { 525 compatible = "nordic,nrf-spim"; 526 #address-cells = <1>; 527 #size-cells = <0>; 528 reg = <0x4002f000 0x1000>; 529 interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>; 530 max-frequency = <DT_FREQ_M(32)>; 531 easydma-maxcnt-bits = <16>; 532 rx-delay-supported; 533 rx-delay = <2>; 534 status = "disabled"; 535 }; 536 537 gpio0: gpio@50000000 { 538 compatible = "nordic,nrf-gpio"; 539 gpio-controller; 540 reg = <0x50000000 0x200 541 0x50000500 0x300>; 542 #gpio-cells = <2>; 543 status = "disabled"; 544 port = <0>; 545 gpiote-instance = <&gpiote>; 546 }; 547 548 gpio1: gpio@50000300 { 549 compatible = "nordic,nrf-gpio"; 550 gpio-controller; 551 reg = <0x50000300 0x200 552 0x50000800 0x300>; 553 #gpio-cells = <2>; 554 ngpios = <16>; 555 status = "disabled"; 556 port = <1>; 557 gpiote-instance = <&gpiote>; 558 }; 559 560 cryptocell: crypto@5002a000 { 561 compatible = "nordic,cryptocell", "arm,cryptocell-310"; 562 reg = <0x5002a000 0x1000>, <0x5002b000 0x1000>; 563 reg-names = "wrapper", "core"; 564 interrupts = <42 NRF_DEFAULT_IRQ_PRIORITY>; 565 status = "disabled"; 566 }; 567 }; 568}; 569 570&nvic { 571 arm,num-irq-priority-bits = <3>; 572}; 573 574&systick { 575 /* Use RTC for system clock, instead of SysTick. */ 576 status = "disabled"; 577}; 578
