1/* SPDX-License-Identifier: Apache-2.0 */ 2 3#include <arm/armv7-m.dtsi> 4#include <nordic/nrf_common.dtsi> 5#include <zephyr/dt-bindings/adc/nrf-saadc-v2.h> 6#include <zephyr/dt-bindings/regulator/nrf5x.h> 7 8/ { 9 chosen { 10 zephyr,bt-hci = &bt_hci_controller; 11 zephyr,entropy = &rng; 12 zephyr,flash-controller = &flash_controller; 13 }; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 device_type = "cpu"; 21 compatible = "arm,cortex-m4f"; 22 reg = <0>; 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 itm: itm@e0000000 { 27 compatible = "arm,armv7m-itm"; 28 reg = <0xe0000000 0x1000>; 29 swo-ref-frequency = <32000000>; 30 }; 31 }; 32 }; 33 34 soc { 35 ficr: ficr@10000000 { 36 compatible = "nordic,nrf-ficr"; 37 reg = <0x10000000 0x1000>; 38 #nordic,ficr-cells = <1>; 39 status = "okay"; 40 }; 41 42 uicr: uicr@10001000 { 43 compatible = "nordic,nrf-uicr"; 44 reg = <0x10001000 0x1000>; 45 status = "okay"; 46 }; 47 48 sram0: memory@20000000 { 49 compatible = "mmio-sram"; 50 }; 51 52 clock: clock@40000000 { 53 compatible = "nordic,nrf-clock"; 54 reg = <0x40000000 0x1000>; 55 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 56 status = "okay"; 57 }; 58 59 power: power@40000000 { 60 compatible = "nordic,nrf-power"; 61 reg = <0x40000000 0x1000>; 62 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 63 status = "okay"; 64 #address-cells = <1>; 65 #size-cells = <1>; 66 67 gpregret1: gpregret1@4000051c { 68 #address-cells = <1>; 69 #size-cells = <1>; 70 compatible = "nordic,nrf-gpregret"; 71 reg = <0x4000051c 0x1>; 72 status = "okay"; 73 }; 74 75 gpregret2: gpregret2@40000520 { 76 #address-cells = <1>; 77 #size-cells = <1>; 78 compatible = "nordic,nrf-gpregret"; 79 reg = <0x40000520 0x1>; 80 status = "okay"; 81 }; 82 83 reg: regulator@40000578 { 84 compatible = "nordic,nrf5x-regulator"; 85 reg = <0x40000578 0x1>; 86 regulator-name = "REG"; 87 regulator-initial-mode = <NRF5X_REG_MODE_LDO>; 88 }; 89 }; 90 91 bprot: bprot@40000000 { 92 compatible = "nordic,nrf-bprot"; 93 reg = <0x40000000 0x1000>; 94 status = "okay"; 95 }; 96 97 radio: radio@40001000 { 98 compatible = "nordic,nrf-radio"; 99 reg = <0x40001000 0x1000>; 100 interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>; 101 status = "okay"; 102 ble-2mbps-supported; 103 104 /* Note: In the nRF Connect SDK the SoftDevice Controller 105 * is added and set as the default Bluetooth Controller. 106 */ 107 bt_hci_controller: bt_hci_controller { 108 compatible = "zephyr,bt-hci-ll-sw-split"; 109 status = "okay"; 110 }; 111 }; 112 113 uart0: uart@40002000 { 114 /* uart can be either UART or UARTE, for the user to pick */ 115 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ 116 compatible = "nordic,nrf-uarte"; 117 reg = <0x40002000 0x1000>; 118 interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>; 119 status = "disabled"; 120 }; 121 122 i2c0: i2c@40003000 { 123 /* 124 * This i2c node can be TWI, TWIM, or TWIS, 125 * for the user to pick: 126 * compatible = "nordic,nrf-twi" or 127 * "nordic,nrf-twim" or 128 * "nordic,nrf-twis". 129 */ 130 compatible = "nordic,nrf-twim"; 131 #address-cells = <1>; 132 #size-cells = <0>; 133 reg = <0x40003000 0x1000>; 134 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 135 easydma-maxcnt-bits = <8>; 136 status = "disabled"; 137 zephyr,pm-device-runtime-auto; 138 }; 139 140 spi0: spi@40003000 { 141 /* 142 * This spi node can be SPI, SPIM, or SPIS, 143 * for the user to pick: 144 * compatible = "nordic,nrf-spi" or 145 * "nordic,nrf-spim" or 146 * "nordic,nrf-spis". 147 */ 148 compatible = "nordic,nrf-spi"; 149 #address-cells = <1>; 150 #size-cells = <0>; 151 reg = <0x40003000 0x1000>; 152 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 153 max-frequency = <DT_FREQ_M(8)>; 154 easydma-maxcnt-bits = <8>; 155 status = "disabled"; 156 }; 157 158 i2c1: i2c@40004000 { 159 /* 160 * This i2c node can be TWI, TWIM, or TWIS, 161 * for the user to pick: 162 * compatible = "nordic,nrf-twi" or 163 * "nordic,nrf-twim" or 164 * "nordic,nrf-twis". 165 */ 166 compatible = "nordic,nrf-twim"; 167 #address-cells = <1>; 168 #size-cells = <0>; 169 reg = <0x40004000 0x1000>; 170 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 171 easydma-maxcnt-bits = <8>; 172 status = "disabled"; 173 zephyr,pm-device-runtime-auto; 174 }; 175 176 spi1: spi@40004000 { 177 /* 178 * This spi node can be SPI, SPIM, or SPIS, 179 * for the user to pick: 180 * compatible = "nordic,nrf-spi" or 181 * "nordic,nrf-spim" or 182 * "nordic,nrf-spis". 183 */ 184 compatible = "nordic,nrf-spi"; 185 #address-cells = <1>; 186 #size-cells = <0>; 187 reg = <0x40004000 0x1000>; 188 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 189 max-frequency = <DT_FREQ_M(8)>; 190 easydma-maxcnt-bits = <8>; 191 status = "disabled"; 192 }; 193 194 nfct: nfct@40005000 { 195 compatible = "nordic,nrf-nfct"; 196 reg = <0x40005000 0x1000>; 197 interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; 198 status = "disabled"; 199 }; 200 201 gpiote: gpiote0: gpiote@40006000 { 202 compatible = "nordic,nrf-gpiote"; 203 reg = <0x40006000 0x1000>; 204 interrupts = <6 5>; 205 status = "disabled"; 206 instance = <0>; 207 }; 208 209 adc: adc@40007000 { 210 compatible = "nordic,nrf-saadc"; 211 reg = <0x40007000 0x1000>; 212 interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>; 213 status = "disabled"; 214 #io-channel-cells = <1>; 215 }; 216 217 timer0: timer@40008000 { 218 compatible = "nordic,nrf-timer"; 219 status = "disabled"; 220 reg = <0x40008000 0x1000>; 221 cc-num = <4>; 222 max-bit-width = <32>; 223 interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; 224 prescaler = <0>; 225 }; 226 227 timer1: timer@40009000 { 228 compatible = "nordic,nrf-timer"; 229 status = "disabled"; 230 reg = <0x40009000 0x1000>; 231 cc-num = <4>; 232 max-bit-width = <32>; 233 interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; 234 prescaler = <0>; 235 }; 236 237 timer2: timer@4000a000 { 238 compatible = "nordic,nrf-timer"; 239 status = "disabled"; 240 reg = <0x4000a000 0x1000>; 241 cc-num = <4>; 242 max-bit-width = <32>; 243 interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; 244 prescaler = <0>; 245 }; 246 247 rtc0: rtc@4000b000 { 248 compatible = "nordic,nrf-rtc"; 249 reg = <0x4000b000 0x1000>; 250 cc-num = <3>; 251 interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; 252 status = "disabled"; 253 clock-frequency = <32768>; 254 prescaler = <1>; 255 }; 256 257 temp: temp@4000c000 { 258 compatible = "nordic,nrf-temp"; 259 reg = <0x4000c000 0x1000>; 260 interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; 261 status = "okay"; 262 }; 263 264 rng: random@4000d000 { 265 compatible = "nordic,nrf-rng"; 266 reg = <0x4000d000 0x1000>; 267 interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; 268 status = "okay"; 269 }; 270 271 ecb: ecb@4000e000 { 272 compatible = "nordic,nrf-ecb"; 273 reg = <0x4000e000 0x1000>; 274 interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; 275 status = "okay"; 276 }; 277 278 ccm: ccm@4000f000 { 279 compatible = "nordic,nrf-ccm"; 280 reg = <0x4000f000 0x1000>; 281 interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>; 282 length-field-length-8-bits; 283 status = "okay"; 284 }; 285 286 wdt: wdt0: watchdog@40010000 { 287 compatible = "nordic,nrf-wdt"; 288 reg = <0x40010000 0x1000>; 289 interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; 290 status = "okay"; 291 }; 292 293 rtc1: rtc@40011000 { 294 compatible = "nordic,nrf-rtc"; 295 reg = <0x40011000 0x1000>; 296 cc-num = <4>; 297 interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; 298 status = "disabled"; 299 clock-frequency = <32768>; 300 prescaler = <1>; 301 }; 302 303 qdec: qdec0: qdec@40012000 { 304 compatible = "nordic,nrf-qdec"; 305 reg = <0x40012000 0x1000>; 306 interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; 307 status = "disabled"; 308 }; 309 310 comp: comparator@40013000 { 311 /* 312 * Use compatible "nordic,nrf-comp" to configure as COMP 313 * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP 314 */ 315 compatible = "nordic,nrf-comp"; 316 reg = <0x40013000 0x1000>; 317 interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; 318 status = "disabled"; 319 }; 320 321 egu0: swi0: egu@40014000 { 322 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 323 reg = <0x40014000 0x1000>; 324 interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; 325 status = "okay"; 326 }; 327 328 egu1: swi1: egu@40015000 { 329 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 330 reg = <0x40015000 0x1000>; 331 interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>; 332 status = "okay"; 333 }; 334 335 egu2: swi2: egu@40016000 { 336 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 337 reg = <0x40016000 0x1000>; 338 interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; 339 status = "okay"; 340 }; 341 342 egu3: swi3: egu@40017000 { 343 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 344 reg = <0x40017000 0x1000>; 345 interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>; 346 status = "okay"; 347 }; 348 349 egu4: swi4: egu@40018000 { 350 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 351 reg = <0x40018000 0x1000>; 352 interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; 353 status = "okay"; 354 }; 355 356 egu5: swi5: egu@40019000 { 357 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 358 reg = <0x40019000 0x1000>; 359 interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; 360 status = "okay"; 361 }; 362 363 timer3: timer@4001a000 { 364 compatible = "nordic,nrf-timer"; 365 status = "disabled"; 366 reg = <0x4001a000 0x1000>; 367 cc-num = <6>; 368 max-bit-width = <32>; 369 interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>; 370 prescaler = <0>; 371 }; 372 373 timer4: timer@4001b000 { 374 compatible = "nordic,nrf-timer"; 375 status = "disabled"; 376 reg = <0x4001b000 0x1000>; 377 cc-num = <6>; 378 max-bit-width = <32>; 379 interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>; 380 prescaler = <0>; 381 }; 382 383 pwm0: pwm@4001c000 { 384 compatible = "nordic,nrf-pwm"; 385 reg = <0x4001c000 0x1000>; 386 interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>; 387 status = "disabled"; 388 #pwm-cells = <3>; 389 }; 390 391 pdm0: pdm@4001d000 { 392 compatible = "nordic,nrf-pdm"; 393 reg = <0x4001d000 0x1000>; 394 interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>; 395 status = "disabled"; 396 }; 397 398 flash_controller: flash-controller@4001e000 { 399 compatible = "nordic,nrf52-flash-controller"; 400 reg = <0x4001e000 0x1000>; 401 402 #address-cells = <1>; 403 #size-cells = <1>; 404 405 406 flash0: flash@0 { 407 compatible = "soc-nv-flash"; 408 erase-block-size = <4096>; 409 write-block-size = <4>; 410 }; 411 }; 412 413 ppi: ppi@4001f000 { 414 compatible = "nordic,nrf-ppi"; 415 reg = <0x4001f000 0x1000>; 416 status = "okay"; 417 }; 418 419 mwu: mwu@40020000 { 420 compatible = "nordic,nrf-mwu"; 421 reg = <0x40020000 0x1000>; 422 status = "okay"; 423 }; 424 425 pwm1: pwm@40021000 { 426 compatible = "nordic,nrf-pwm"; 427 reg = <0x40021000 0x1000>; 428 interrupts = <33 NRF_DEFAULT_IRQ_PRIORITY>; 429 status = "disabled"; 430 #pwm-cells = <3>; 431 }; 432 433 pwm2: pwm@40022000 { 434 compatible = "nordic,nrf-pwm"; 435 reg = <0x40022000 0x1000>; 436 interrupts = <34 NRF_DEFAULT_IRQ_PRIORITY>; 437 status = "disabled"; 438 #pwm-cells = <3>; 439 }; 440 441 spi2: spi@40023000 { 442 /* 443 * This spi node can be SPI, SPIM, or SPIS, 444 * for the user to pick: 445 * compatible = "nordic,nrf-spi" or 446 * "nordic,nrf-spim" or 447 * "nordic,nrf-spis". 448 */ 449 compatible = "nordic,nrf-spi"; 450 #address-cells = <1>; 451 #size-cells = <0>; 452 reg = <0x40023000 0x1000>; 453 interrupts = <35 NRF_DEFAULT_IRQ_PRIORITY>; 454 max-frequency = <DT_FREQ_M(8)>; 455 easydma-maxcnt-bits = <8>; 456 status = "disabled"; 457 }; 458 459 rtc2: rtc@40024000 { 460 compatible = "nordic,nrf-rtc"; 461 reg = <0x40024000 0x1000>; 462 cc-num = <4>; 463 interrupts = <36 NRF_DEFAULT_IRQ_PRIORITY>; 464 status = "disabled"; 465 clock-frequency = <32768>; 466 prescaler = <1>; 467 }; 468 469 i2s0: i2s@40025000 { 470 compatible = "nordic,nrf-i2s"; 471 #address-cells = <1>; 472 #size-cells = <0>; 473 reg = <0x40025000 0x1000>; 474 interrupts = <37 NRF_DEFAULT_IRQ_PRIORITY>; 475 status = "disabled"; 476 }; 477 478 gpio0: gpio@50000000 { 479 compatible = "nordic,nrf-gpio"; 480 gpio-controller; 481 reg = <0x50000000 0x1000>; 482 #gpio-cells = <2>; 483 status = "disabled"; 484 port = <0>; 485 gpiote-instance = <&gpiote>; 486 }; 487 }; 488}; 489 490&nvic { 491 arm,num-irq-priority-bits = <3>; 492}; 493 494&systick { 495 /* Use RTC for system clock, instead of SysTick. */ 496 status = "disabled"; 497}; 498