1/* SPDX-License-Identifier: Apache-2.0 */
2
3#include <arm/armv7-m.dtsi>
4#include <nordic/nrf_common.dtsi>
5#include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
6#include <zephyr/dt-bindings/regulator/nrf5x.h>
7
8/ {
9	chosen {
10		zephyr,bt-hci = &bt_hci_controller;
11		zephyr,entropy = &rng;
12		zephyr,flash-controller = &flash_controller;
13	};
14
15	cpus {
16		#address-cells = <1>;
17		#size-cells = <0>;
18
19		cpu@0 {
20			device_type = "cpu";
21			compatible = "arm,cortex-m4";
22			reg = <0>;
23			#address-cells = <1>;
24			#size-cells = <1>;
25
26			itm: itm@e0000000 {
27				compatible = "arm,armv7m-itm";
28				reg = <0xe0000000 0x1000>;
29				swo-ref-frequency = <32000000>;
30			};
31		};
32	};
33
34	soc {
35		ficr: ficr@10000000 {
36			compatible = "nordic,nrf-ficr";
37			reg = <0x10000000 0x1000>;
38			#nordic,ficr-cells = <1>;
39			status = "okay";
40		};
41
42		uicr: uicr@10001000 {
43			compatible = "nordic,nrf-uicr";
44			reg = <0x10001000 0x1000>;
45			status = "okay";
46		};
47
48		sram0: memory@20000000 {
49			compatible = "mmio-sram";
50		};
51
52		clock: clock@40000000 {
53			compatible = "nordic,nrf-clock";
54			reg = <0x40000000 0x1000>;
55			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
56			status = "okay";
57		};
58
59		power: power@40000000 {
60			compatible = "nordic,nrf-power";
61			reg = <0x40000000 0x1000>;
62			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
63			status = "okay";
64			#address-cells = <1>;
65			#size-cells = <1>;
66
67			gpregret1: gpregret1@4000051c {
68				#address-cells = <1>;
69				#size-cells = <1>;
70				compatible = "nordic,nrf-gpregret";
71				reg = <0x4000051c 0x1>;
72				status = "okay";
73			};
74
75			gpregret2: gpregret2@40000520 {
76				#address-cells = <1>;
77				#size-cells = <1>;
78				compatible = "nordic,nrf-gpregret";
79				reg = <0x40000520 0x1>;
80				status = "okay";
81			};
82
83			reg: regulator@40000578 {
84				compatible = "nordic,nrf5x-regulator";
85				reg = <0x40000578 0x1>;
86				regulator-name = "REG";
87				regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
88			};
89		};
90
91		bprot: bprot@40000000 {
92			compatible = "nordic,nrf-bprot";
93			reg = <0x40000000 0x1000>;
94			status = "okay";
95		};
96
97		radio: radio@40001000 {
98			compatible = "nordic,nrf-radio";
99			reg = <0x40001000 0x1000>;
100			interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>;
101			status = "okay";
102			ble-2mbps-supported;
103
104			/* Note: In the nRF Connect SDK the SoftDevice Controller
105			 * is added and set as the default Bluetooth Controller.
106			 */
107			bt_hci_controller: bt_hci_controller {
108				compatible = "zephyr,bt-hci-ll-sw-split";
109				status = "okay";
110			};
111		};
112
113		uart0: uart@40002000 {
114			/* uart can be either UART or UARTE, for the user to pick */
115			/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
116			compatible = "nordic,nrf-uarte";
117			reg = <0x40002000 0x1000>;
118			interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>;
119			status = "disabled";
120		};
121
122		i2c0: i2c@40003000 {
123			/*
124			 * This i2c node can be TWI, TWIM, or TWIS,
125			 * for the user to pick:
126			 * compatible = "nordic,nrf-twi" or
127			 *              "nordic,nrf-twim" or
128			 *              "nordic,nrf-twis".
129			 */
130			compatible = "nordic,nrf-twim";
131			#address-cells = <1>;
132			#size-cells = <0>;
133			reg = <0x40003000 0x1000>;
134			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
135			easydma-maxcnt-bits = <10>;
136			status = "disabled";
137			zephyr,pm-device-runtime-auto;
138		};
139
140		spi0: spi@40004000 {
141			/*
142			 * This spi node can be SPI, SPIM, or SPIS,
143			 * for the user to pick:
144			 * compatible = "nordic,nrf-spi" or
145			 *              "nordic,nrf-spim" or
146			 *              "nordic,nrf-spis".
147			 */
148			compatible = "nordic,nrf-spim";
149			#address-cells = <1>;
150			#size-cells = <0>;
151			reg = <0x40004000 0x1000>;
152			interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
153			max-frequency = <DT_FREQ_M(8)>;
154			easydma-maxcnt-bits = <10>;
155			status = "disabled";
156		};
157
158		gpiote: gpiote0: gpiote@40006000 {
159			compatible = "nordic,nrf-gpiote";
160			reg = <0x40006000 0x1000>;
161			interrupts = <6 5>;
162			status = "disabled";
163			instance = <0>;
164		};
165
166		adc: adc@40007000 {
167			compatible = "nordic,nrf-saadc";
168			reg = <0x40007000 0x1000>;
169			interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>;
170			status = "disabled";
171			#io-channel-cells = <1>;
172		};
173		timer0: timer@40008000 {
174			compatible = "nordic,nrf-timer";
175			status = "disabled";
176			reg = <0x40008000 0x1000>;
177			cc-num = <4>;
178			max-bit-width = <32>;
179			interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
180			prescaler = <0>;
181		};
182
183		timer1: timer@40009000 {
184			compatible = "nordic,nrf-timer";
185			status = "disabled";
186			reg = <0x40009000 0x1000>;
187			cc-num = <4>;
188			max-bit-width = <32>;
189			interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
190			prescaler = <0>;
191		};
192
193		timer2: timer@4000a000 {
194			compatible = "nordic,nrf-timer";
195			status = "disabled";
196			reg = <0x4000a000 0x1000>;
197			cc-num = <4>;
198			max-bit-width = <32>;
199			interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
200			prescaler = <0>;
201		};
202
203		rtc0: rtc@4000b000 {
204			compatible = "nordic,nrf-rtc";
205			reg = <0x4000b000 0x1000>;
206			cc-num = <3>;
207			interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
208			status = "disabled";
209			clock-frequency = <32768>;
210			prescaler = <1>;
211		};
212
213		temp: temp@4000c000 {
214			compatible = "nordic,nrf-temp";
215			reg = <0x4000c000 0x1000>;
216			interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
217			status = "okay";
218		};
219
220		rng: random@4000d000 {
221			compatible = "nordic,nrf-rng";
222			reg = <0x4000d000 0x1000>;
223			interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
224			status = "okay";
225		};
226
227		ecb: ecb@4000e000 {
228			compatible = "nordic,nrf-ecb";
229			reg = <0x4000e000 0x1000>;
230			interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
231			status = "okay";
232		};
233
234		ccm: ccm@4000f000 {
235			compatible = "nordic,nrf-ccm";
236			reg = <0x4000f000 0x1000>;
237			interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>;
238			length-field-length-8-bits;
239			status = "okay";
240		};
241
242		wdt: wdt0: watchdog@40010000 {
243			compatible = "nordic,nrf-wdt";
244			reg = <0x40010000 0x1000>;
245			interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
246			status = "okay";
247		};
248
249		rtc1: rtc@40011000 {
250			compatible = "nordic,nrf-rtc";
251			reg = <0x40011000 0x1000>;
252			cc-num = <4>;
253			interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
254			status = "disabled";
255			clock-frequency = <32768>;
256			prescaler = <1>;
257		};
258
259		qdec: qdec0: qdec@40012000 {
260			compatible = "nordic,nrf-qdec";
261			reg = <0x40012000 0x1000>;
262			interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
263			status = "disabled";
264		};
265
266		comp: comparator@40013000 {
267			compatible = "nordic,nrf-comp";
268			reg = <0x40013000 0x1000>;
269			interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>;
270			status = "disabled";
271		};
272
273		egu0: swi0: egu@40014000 {
274			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
275			reg = <0x40014000 0x1000>;
276			interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
277			status = "okay";
278		};
279
280		egu1: swi1: egu@40015000 {
281			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
282			reg = <0x40015000 0x1000>;
283			interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>;
284			status = "okay";
285		};
286
287		swi2: swi@40016000 {
288			compatible = "nordic,nrf-swi";
289			reg = <0x40016000 0x1000>;
290			interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
291			status = "okay";
292		};
293
294		swi3: swi@40017000 {
295			compatible = "nordic,nrf-swi";
296			reg = <0x40017000 0x1000>;
297			interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>;
298			status = "okay";
299		};
300
301		swi4: swi@40018000 {
302			compatible = "nordic,nrf-swi";
303			reg = <0x40018000 0x1000>;
304			interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
305			status = "okay";
306		};
307
308		swi5: swi@40019000 {
309			compatible = "nordic,nrf-swi";
310			reg = <0x40019000 0x1000>;
311			interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
312			status = "okay";
313		};
314
315		pwm0: pwm@4001c000 {
316			compatible = "nordic,nrf-pwm";
317			reg = <0x4001c000 0x1000>;
318			interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>;
319			status = "disabled";
320			#pwm-cells = <3>;
321		};
322
323		pdm0: pdm@4001d000 {
324			compatible = "nordic,nrf-pdm";
325			reg = <0x4001d000 0x1000>;
326			interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>;
327			status = "disabled";
328		};
329
330		flash_controller: flash-controller@4001e000 {
331			compatible = "nordic,nrf52-flash-controller";
332			reg = <0x4001e000 0x1000>;
333			partial-erase;
334
335			#address-cells = <1>;
336			#size-cells = <1>;
337
338
339			flash0: flash@0 {
340				compatible = "soc-nv-flash";
341				erase-block-size = <4096>;
342				write-block-size = <4>;
343			};
344		};
345
346		ppi: ppi@4001f000 {
347			compatible = "nordic,nrf-ppi";
348			reg = <0x4001f000 0x1000>;
349			status = "okay";
350		};
351
352		gpio0: gpio@50000000 {
353			compatible = "nordic,nrf-gpio";
354			gpio-controller;
355			reg = <0x50000000 0x1000>;
356			#gpio-cells = <2>;
357			status = "disabled";
358			port = <0>;
359			gpiote-instance = <&gpiote>;
360		};
361	};
362};
363
364&nvic {
365	arm,num-irq-priority-bits = <3>;
366};
367
368&systick {
369	/* Use RTC for system clock, instead of SysTick. */
370	status = "disabled";
371};
372