1/*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <nordic/nrf_common.dtsi>
9#include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
10#include <zephyr/dt-bindings/regulator/nrf5x.h>
11
12/delete-node/ &sw_pwm;
13
14/* Domain IDs. Can be used to specify channel links in IPCT nodes. */
15#define NRF_DOMAIN_ID_APPLICATION 0
16#define NRF_DOMAIN_ID_FLPR 1
17
18/ {
19	#address-cells = <1>;
20	#size-cells = <1>;
21
22	cpus {
23		#address-cells = <1>;
24		#size-cells = <0>;
25
26		cpuapp: cpu@0 {
27			compatible = "arm,cortex-m33f";
28			reg = <0>;
29			device_type = "cpu";
30			clock-frequency = <DT_FREQ_M(128)>;
31			#address-cells = <1>;
32			#size-cells = <1>;
33			itm: itm@e0000000 {
34				compatible = "arm,armv8m-itm";
35				reg = <0xe0000000 0x1000>;
36				swo-ref-frequency = <DT_FREQ_M(128)>;
37			};
38		};
39
40		cpuflpr: cpu@1 {
41			compatible = "nordic,vpr";
42			reg = <1>;
43			device_type = "cpu";
44			clock-frequency = <DT_FREQ_M(128)>;
45			riscv,isa = "rv32emc";
46			nordic,bus-width = <32>;
47		};
48	};
49
50	clocks {
51		lfxo: lfxo {
52			compatible = "nordic,nrf-lfxo";
53			#clock-cells = <0>;
54			clock-frequency = <32768>;
55		};
56
57		hfxo: hfxo {
58			compatible = "nordic,nrf-hfxo";
59			#clock-cells = <0>;
60			clock-frequency = <DT_FREQ_M(32)>;
61		};
62
63		hfpll: hfpll {
64			compatible = "fixed-clock";
65			#clock-cells = <0>;
66			clock-frequency = <DT_FREQ_M(128)>;
67		};
68	};
69
70	soc {
71		#address-cells = <1>;
72		#size-cells = <1>;
73
74#ifdef USE_NON_SECURE_ADDRESS_MAP
75		/* intentionally empty because UICR is hardware fixed to Secure */
76#else
77		uicr: uicr@ffd000 {
78			compatible = "nordic,nrf-uicr";
79			reg = <0xffd000 0x1000>;
80		};
81#endif
82		ficr: ficr@ffc000 {
83			compatible = "nordic,nrf-ficr";
84			reg = <0xffc000 0x1000>;
85			#nordic,ficr-cells = <1>;
86		};
87
88		cpuapp_sram: memory@20000000 {
89			compatible = "mmio-sram";
90			#address-cells = <1>;
91			#size-cells = <1>;
92		};
93
94#ifdef USE_NON_SECURE_ADDRESS_MAP
95		global_peripherals: peripheral@40000000 {
96			#address-cells = <1>;
97			#size-cells = <1>;
98			ranges = <0x0 0x40000000 0x10000000>;
99#else
100		global_peripherals: peripheral@50000000 {
101			#address-cells = <1>;
102			#size-cells = <1>;
103			ranges = <0x0 0x50000000 0x10000000>;
104#endif
105
106			dppic00: dppic@42000 {
107				compatible = "nordic,nrf-dppic";
108				reg = <0x42000 0x808>;
109				status = "disabled";
110			};
111
112			ppib00: ppib@43000 {
113				compatible = "nordic,nrf-ppib";
114				reg = <0x43000 0x1000>;
115				status = "disabled";
116			};
117
118			ppib01: ppib@44000 {
119				compatible = "nordic,nrf-ppib";
120				reg = <0x44000 0x1000>;
121				status = "disabled";
122			};
123
124			spi00: spi@4a000 {
125				/*
126				 * This spi node can be either SPIM or SPIS,
127				 * for the user to pick:
128				 * compatible = "nordic,nrf-spim" or
129				 *              "nordic,nrf-spis".
130				 */
131				compatible = "nordic,nrf-spim";
132				#address-cells = <1>;
133				#size-cells = <0>;
134				reg = <0x4a000 0x1000>;
135				interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>;
136				max-frequency = <DT_FREQ_M(32)>;
137				easydma-maxcnt-bits = <16>;
138				rx-delay-supported;
139				rx-delay = <1>;
140				status = "disabled";
141			};
142
143			uart00: uart@4a000 {
144				compatible = "nordic,nrf-uarte";
145				reg = <0x4a000 0x1000>;
146				interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>;
147				clocks = <&hfpll>;
148				status = "disabled";
149				endtx-stoptx-supported;
150				frame-timeout-supported;
151			};
152
153			cpuflpr_vpr: vpr@4c000 {
154				compatible = "nordic,nrf-vpr-coprocessor";
155				reg = <0x4c000 0x1000>;
156				ranges = <0x0 0x4c000 0x1000>;
157				#address-cells = <1>;
158				#size-cells = <1>;
159				status = "disabled";
160
161				cpuflpr_clic: interrupt-controller@f0000000 {
162					compatible = "nordic,nrf-clic";
163					reg = <0xf0000000 0x1780>;
164					interrupt-controller;
165					#interrupt-cells = <2>;
166					#address-cells = <1>;
167					status = "disabled";
168				};
169			};
170
171			gpio2: gpio@50400 {
172				compatible = "nordic,nrf-gpio";
173				gpio-controller;
174				reg = <0x50400 0x300>;
175				#gpio-cells = <2>;
176				ngpios = <11>;
177				status = "disabled";
178				port = <2>;
179			};
180
181			timer00: timer@55000 {
182				compatible = "nordic,nrf-timer";
183				status = "disabled";
184				reg = <0x55000 0x1000>;
185				cc-num = <6>;
186				max-bit-width = <32>;
187				interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>;
188				max-frequency = <DT_FREQ_M(128)>;
189				prescaler = <0>;
190			};
191
192			dppic10: dppic@82000 {
193				compatible = "nordic,nrf-dppic";
194				reg = <0x82000 0x808>;
195				status = "disabled";
196			};
197
198			ppib10: ppib@83000 {
199				compatible = "nordic,nrf-ppib";
200				reg = <0x83000 0x1000>;
201				status = "disabled";
202			};
203
204			ppib11: ppib@84000 {
205				compatible = "nordic,nrf-ppib";
206				reg = <0x84000 0x1000>;
207				status = "disabled";
208			};
209
210			timer10: timer@85000 {
211				compatible = "nordic,nrf-timer";
212				status = "disabled";
213				reg = <0x85000 0x1000>;
214				cc-num = <8>;
215				max-bit-width = <32>;
216				interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>;
217				max-frequency = <DT_FREQ_M(32)>;
218				prescaler = <0>;
219			};
220
221			egu10: egu@87000 {
222				compatible = "nordic,nrf-egu";
223				reg = <0x87000 0x1000>;
224				interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>;
225				status = "disabled";
226			};
227
228			radio: radio@8a000 {
229				compatible = "nordic,nrf-radio";
230				reg = <0x8a000 0x1000>;
231				interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>;
232				status = "disabled";
233				dfe-supported;
234				ieee802154-supported;
235				ble-2mbps-supported;
236				ble-coded-phy-supported;
237				cs-supported;
238
239				ieee802154: ieee802154 {
240					compatible = "nordic,nrf-ieee802154";
241					status = "disabled";
242				};
243
244				/* Note: In the nRF Connect SDK the SoftDevice Controller
245				 * is added and set as the default Bluetooth Controller.
246				 */
247				bt_hci_controller: bt_hci_controller {
248					compatible = "zephyr,bt-hci-ll-sw-split";
249					status = "disabled";
250				};
251			};
252
253			dppic20: dppic@c2000 {
254				compatible = "nordic,nrf-dppic";
255				reg = <0xc2000 0x808>;
256				status = "disabled";
257			};
258
259			ppib20: ppib@c3000 {
260				compatible = "nordic,nrf-ppib";
261				reg = <0xc3000 0x1000>;
262				status = "disabled";
263			};
264
265			ppib21: ppib@c4000 {
266				compatible = "nordic,nrf-ppib";
267				reg = <0xc4000 0x1000>;
268				status = "disabled";
269			};
270
271			ppib22: ppib@c5000 {
272				compatible = "nordic,nrf-ppib";
273				reg = <0xc5000 0x1000>;
274				status = "disabled";
275			};
276
277			i2c20: i2c@c6000 {
278				compatible = "nordic,nrf-twim";
279				#address-cells = <1>;
280				#size-cells = <0>;
281				reg = <0xc6000 0x1000>;
282				interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
283				easydma-maxcnt-bits = <16>;
284				status = "disabled";
285				zephyr,pm-device-runtime-auto;
286			};
287
288			spi20: spi@c6000 {
289				/*
290				 * This spi node can be either SPIM or SPIS,
291				 * for the user to pick:
292				 * compatible = "nordic,nrf-spim" or
293				 *              "nordic,nrf-spis".
294				 */
295				compatible = "nordic,nrf-spim";
296				#address-cells = <1>;
297				#size-cells = <0>;
298				reg = <0xc6000 0x1000>;
299				interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
300				max-frequency = <DT_FREQ_M(8)>;
301				easydma-maxcnt-bits = <16>;
302				rx-delay-supported;
303				rx-delay = <1>;
304				status = "disabled";
305			};
306
307			uart20: uart@c6000 {
308				compatible = "nordic,nrf-uarte";
309				reg = <0xc6000 0x1000>;
310				interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
311				status = "disabled";
312				endtx-stoptx-supported;
313				frame-timeout-supported;
314			};
315
316			i2c21: i2c@c7000 {
317				compatible = "nordic,nrf-twim";
318				#address-cells = <1>;
319				#size-cells = <0>;
320				reg = <0xc7000 0x1000>;
321				interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
322				easydma-maxcnt-bits = <16>;
323				status = "disabled";
324				zephyr,pm-device-runtime-auto;
325			};
326
327			spi21: spi@c7000 {
328				/*
329				 * This spi node can be either SPIM or SPIS,
330				 * for the user to pick:
331				 * compatible = "nordic,nrf-spim" or
332				 *              "nordic,nrf-spis".
333				 */
334				compatible = "nordic,nrf-spim";
335				#address-cells = <1>;
336				#size-cells = <0>;
337				reg = <0xc7000 0x1000>;
338				interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
339				max-frequency = <DT_FREQ_M(8)>;
340				easydma-maxcnt-bits = <16>;
341				rx-delay-supported;
342				rx-delay = <1>;
343				status = "disabled";
344			};
345
346			uart21: uart@c7000 {
347				compatible = "nordic,nrf-uarte";
348				reg = <0xc7000 0x1000>;
349				interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
350				status = "disabled";
351				endtx-stoptx-supported;
352				frame-timeout-supported;
353			};
354
355			i2c22: i2c@c8000 {
356				compatible = "nordic,nrf-twim";
357				#address-cells = <1>;
358				#size-cells = <0>;
359				reg = <0xc8000 0x1000>;
360				interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
361				easydma-maxcnt-bits = <16>;
362				status = "disabled";
363				zephyr,pm-device-runtime-auto;
364			};
365
366			spi22: spi@c8000 {
367				/*
368				 * This spi node can be either SPIM or SPIS,
369				 * for the user to pick:
370				 * compatible = "nordic,nrf-spim" or
371				 *              "nordic,nrf-spis".
372				 */
373				compatible = "nordic,nrf-spim";
374				#address-cells = <1>;
375				#size-cells = <0>;
376				reg = <0xc8000 0x1000>;
377				interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
378				max-frequency = <DT_FREQ_M(8)>;
379				easydma-maxcnt-bits = <16>;
380				rx-delay-supported;
381				rx-delay = <1>;
382				status = "disabled";
383			};
384
385			uart22: uart@c8000 {
386				compatible = "nordic,nrf-uarte";
387				reg = <0xc8000 0x1000>;
388				interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
389				status = "disabled";
390				endtx-stoptx-supported;
391				frame-timeout-supported;
392			};
393
394			egu20: egu@c9000 {
395				compatible = "nordic,nrf-egu";
396				reg = <0xc9000 0x1000>;
397				interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>;
398				status = "disabled";
399			};
400
401			timer20: timer@ca000 {
402				compatible = "nordic,nrf-timer";
403				status = "disabled";
404				reg = <0xca000 0x1000>;
405				cc-num = <6>;
406				max-bit-width = <32>;
407				interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>;
408				prescaler = <0>;
409			};
410
411			timer21: timer@cb000 {
412				compatible = "nordic,nrf-timer";
413				status = "disabled";
414				reg = <0xcb000 0x1000>;
415				cc-num = <6>;
416				max-bit-width = <32>;
417				interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>;
418				prescaler = <0>;
419			};
420
421			timer22: timer@cc000 {
422				compatible = "nordic,nrf-timer";
423				status = "disabled";
424				reg = <0xcc000 0x1000>;
425				cc-num = <6>;
426				max-bit-width = <32>;
427				interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>;
428				prescaler = <0>;
429			};
430
431			timer23: timer@cd000 {
432				compatible = "nordic,nrf-timer";
433				status = "disabled";
434				reg = <0xcd000 0x1000>;
435				cc-num = <6>;
436				max-bit-width = <32>;
437				interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>;
438				prescaler = <0>;
439			};
440
441			timer24: timer@ce000 {
442				compatible = "nordic,nrf-timer";
443				status = "disabled";
444				reg = <0xce000 0x1000>;
445				cc-num = <6>;
446				max-bit-width = <32>;
447				interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>;
448				prescaler = <0>;
449			};
450
451			pdm20: pdm@d0000 {
452				compatible = "nordic,nrf-pdm";
453				status = "disabled";
454				reg = <0xd0000 0x1000>;
455				interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>;
456			};
457
458			pdm21: pdm@d1000 {
459				compatible = "nordic,nrf-pdm";
460				status = "disabled";
461				reg = <0xd1000 0x1000>;
462				interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>;
463			};
464
465			pwm20: pwm@d2000 {
466				compatible = "nordic,nrf-pwm";
467				status = "disabled";
468				reg = <0xd2000 0x1000>;
469				interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>;
470				#pwm-cells = <3>;
471			};
472
473			pwm21: pwm@d3000 {
474				compatible = "nordic,nrf-pwm";
475				status = "disabled";
476				reg = <0xd3000 0x1000>;
477				interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>;
478				#pwm-cells = <3>;
479			};
480
481			pwm22: pwm@d4000 {
482				compatible = "nordic,nrf-pwm";
483				status = "disabled";
484				reg = <0xd4000 0x1000>;
485				interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>;
486				#pwm-cells = <3>;
487			};
488
489			adc: adc@d5000 {
490				compatible = "nordic,nrf-saadc";
491				reg = <0xd5000 0x1000>;
492				interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>;
493				status = "disabled";
494				#io-channel-cells = <1>;
495			};
496
497			nfct: nfct@d6000 {
498				compatible = "nordic,nrf-nfct";
499				reg = <0xd6000 0x1000>;
500				interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>;
501				status = "disabled";
502			};
503
504			temp: temp@d7000 {
505				compatible = "nordic,nrf-temp";
506				reg = <0xd7000 0x1000>;
507				interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>;
508				status = "disabled";
509			};
510
511			gpio1: gpio@d8200 {
512				compatible = "nordic,nrf-gpio";
513				gpio-controller;
514				reg = <0xd8200 0x300>;
515				#gpio-cells = <2>;
516				ngpios = <16>;
517				status = "disabled";
518				port = <1>;
519				gpiote-instance = <&gpiote20>;
520			};
521
522			gpiote20: gpiote@da000 {
523				compatible = "nordic,nrf-gpiote";
524				reg = <0xda000 0x1000>;
525				status = "disabled";
526				instance = <20>;
527			};
528
529			i2s20: i2s@dd000 {
530				compatible = "nordic,nrf-i2s";
531				#address-cells = <1>;
532				#size-cells = <0>;
533				reg = <0xdd000 0x1000>;
534				interrupts = <221 NRF_DEFAULT_IRQ_PRIORITY>;
535				status = "disabled";
536			};
537
538			qdec20: qdec@e0000 {
539				compatible = "nordic,nrf-qdec";
540				reg = <0xe0000 0x1000>;
541				interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>;
542				status = "disabled";
543			};
544
545			qdec21: qdec@e1000 {
546				compatible = "nordic,nrf-qdec";
547				reg = <0xe1000 0x1000>;
548				interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>;
549				status = "disabled";
550			};
551
552			grtc: grtc@e2000 {
553				compatible = "nordic,nrf-grtc";
554				reg = <0xe2000 0x1000>;
555				cc-num = <12>;
556				status = "disabled";
557			};
558
559			dppic30: dppic@102000 {
560				compatible = "nordic,nrf-dppic";
561				reg = <0x102000 0x808>;
562				status = "disabled";
563			};
564
565			ppib30: ppib@103000 {
566				compatible = "nordic,nrf-ppib";
567				reg = <0x103000 0x1000>;
568				status = "disabled";
569			};
570
571			i2c30: i2c@104000 {
572				compatible = "nordic,nrf-twim";
573				#address-cells = <1>;
574				#size-cells = <0>;
575				reg = <0x104000 0x1000>;
576				interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
577				easydma-maxcnt-bits = <16>;
578				status = "disabled";
579				zephyr,pm-device-runtime-auto;
580			};
581
582			spi30: spi@104000 {
583				/*
584				 * This spi node can be either SPIM or SPIS,
585				 * for the user to pick:
586				 * compatible = "nordic,nrf-spim" or
587				 *              "nordic,nrf-spis".
588				 */
589				compatible = "nordic,nrf-spim";
590				#address-cells = <1>;
591				#size-cells = <0>;
592				reg = <0x104000 0x1000>;
593				interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
594				max-frequency = <DT_FREQ_M(8)>;
595				easydma-maxcnt-bits = <16>;
596				rx-delay-supported;
597				rx-delay = <1>;
598				status = "disabled";
599			};
600
601			uart30: uart@104000 {
602				compatible = "nordic,nrf-uarte";
603				reg = <0x104000 0x1000>;
604				interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
605				status = "disabled";
606				endtx-stoptx-supported;
607				frame-timeout-supported;
608			};
609
610			clock: clock@10e000 {
611				compatible = "nordic,nrf-clock";
612				reg = <0x10e000 0x1000>;
613				interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>;
614				status = "disabled";
615			};
616
617			power: power@10e000 {
618				compatible = "nordic,nrf-power";
619				reg = <0x10e000 0x1000>;
620				ranges = <0x0 0x10e000 0x1000>;
621				interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>;
622				status = "disabled";
623				#address-cells = <1>;
624				#size-cells = <1>;
625
626				gpregret1: gpregret1@51c {
627					#address-cells = <1>;
628					#size-cells = <1>;
629					compatible = "nordic,nrf-gpregret";
630					reg = <0x51c 0x1>;
631					status = "disabled";
632				};
633
634				gpregret2: gpregret2@520 {
635					#address-cells = <1>;
636					#size-cells = <1>;
637					compatible = "nordic,nrf-gpregret";
638					reg = <0x520 0x1>;
639					status = "disabled";
640				};
641			};
642
643			comp: comparator@106000 {
644				/*
645				 * Use compatible "nordic,nrf-comp" to configure as COMP
646				 * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP
647				 */
648				compatible = "nordic,nrf-comp";
649				reg = <0x106000 0x1000>;
650				status = "disabled";
651				interrupts = <262 NRF_DEFAULT_IRQ_PRIORITY>;
652			};
653
654#ifdef USE_NON_SECURE_ADDRESS_MAP
655			/* intentionally empty because WDT30 is hardware fixed to Secure */
656#else
657			wdt30: watchdog@108000 {
658				compatible = "nordic,nrf-wdt";
659				reg = <0x108000 0x620>;
660				interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>;
661				status = "disabled";
662			};
663#endif
664
665			wdt31: watchdog@109000 {
666				compatible = "nordic,nrf-wdt";
667				reg = <0x109000 0x620>;
668				interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>;
669				status = "disabled";
670			};
671
672			gpio0: gpio@10a000 {
673				compatible = "nordic,nrf-gpio";
674				gpio-controller;
675				reg = <0x10a000 0x300>;
676				#gpio-cells = <2>;
677				ngpios = <5>;
678				status = "disabled";
679				port = <0>;
680				gpiote-instance = <&gpiote30>;
681			};
682
683			gpiote30: gpiote@10c000 {
684				compatible = "nordic,nrf-gpiote";
685				reg = <0x10c000 0x1000>;
686				status = "disabled";
687				instance = <30>;
688			};
689
690			regulators: regulator@120000 {
691				compatible = "nordic,nrf54l-regulators";
692				reg = <0x120000 0x1000>;
693				status = "disabled";
694				#address-cells = <1>;
695				#size-cells = <1>;
696
697				vregmain: regulator@120600 {
698					compatible = "nordic,nrf5x-regulator";
699					reg = <0x120600 0x1>;
700					status = "disabled";
701					regulator-name = "VREGMAIN";
702					regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
703				};
704			};
705		};
706
707		rram_controller: rram-controller@5004b000 {
708			compatible = "nordic,rram-controller";
709			reg = <0x5004b000 0x1000>;
710			#address-cells = <1>;
711			#size-cells = <1>;
712			interrupts = <75 NRF_DEFAULT_IRQ_PRIORITY>;
713
714			cpuapp_rram: rram@0 {
715				compatible = "soc-nv-flash";
716				erase-block-size = <4096>;
717				write-block-size = <16>;
718			};
719		};
720
721		cpuapp_ppb: cpuapp-ppb-bus {
722			#address-cells = <1>;
723			#size-cells = <1>;
724
725			cpuapp_nvic: interrupt-controller@e000e100  {
726				#address-cells = <1>;
727				compatible = "arm,v8m-nvic";
728				reg = <0xe000e100 0xc00>;
729				arm,num-irq-priority-bits = <3>;
730				interrupt-controller;
731				#interrupt-cells = <2>;
732			};
733
734			cpuapp_systick: timer@e000e010 {
735				compatible = "arm,armv8m-systick";
736				reg = <0xe000e010 0x10>;
737				status = "disabled";
738			};
739		};
740	};
741};
742