Searched defs:pll (Results 1 – 25 of 49) sorted by relevance
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20 pll: pll { label
14 pll: pll { label
68 pll: pll { label
38 pll: pll { label
37 pll: pll { label
96 pll: pll { label
106 pll: pll { label
134 pll: pll { label
163 pll: pll { label
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86 pll: pll { label
118 pll: pll { label
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177 pll: pll { label
61 #define REF_DIV(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), clock_div) argument62 #define FB_DIV(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), fb_div) argument63 #define POST_DIV1(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), post_div1) argument64 #define POST_DIV2(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), post_div2) argument65 #define VCO_FREQ(pll) ((CLOCK_FREQ_xosc / REF_DIV(pll)) * FB_DIV(pll)) argument77 #define PLL_FREQ(pll) \ argument460 pll_hw_t *pll = (id == rpi_pico_clkid_pll_sys) ? config->pll_sys_regs in rpi_pico_is_clock_enabled() local513 pll_hw_t *pll = (id == rpi_pico_clkid_pll_sys) ? config->pll_sys_regs in rpi_pico_calc_clock_freq() local
24 SI32_PLL_A_Type *pll; member
66 pll: pll64m { label
54 pll: pll { label
178 void __soc_ram_code chip_run_pll_sequence(const struct pll_config_t *pll) in chip_run_pll_sequence()212 static void chip_configure_pll(const struct pll_config_t *pll) in chip_configure_pll()
47 pll: pll { label
77 pll: pll { label
