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Searched defs:pll (Results 1 – 25 of 44) sorted by relevance

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/Zephyr-latest/dts/arm/st/f1/
Dstm32f100Xb.dtsi20 pll: pll { label
Dstm32f105.dtsi14 pll: pll { label
Dstm32f1.dtsi68 pll: pll { label
/Zephyr-latest/dts/riscv/wch/
Dch32v00x.dtsi50 pll: pll { label
/Zephyr-latest/dts/arm/renesas/ra/ra6/
Dr7fa6m1ad3cfp.dtsi80 pll: pll { label
Dr7fa6m2ax.dtsi124 pll: pll { label
Dr7fa6e10x.dtsi158 pll: pll { label
Dr7fa6e2bx.dtsi131 pll: pll { label
Dr7fa6m3ax.dtsi178 pll: pll { label
Dr7fa6m4ax.dtsi267 pll: pll { label
/Zephyr-latest/dts/arm/renesas/ra/ra4/
Dr7fa4w1ad2cng.dtsi105 pll: pll { label
Dr7fa4e2b93cfm.dtsi122 pll: pll { label
Dr7fa4m2ax.dtsi180 pll: pll { label
Dr7fa4m3ax.dtsi193 pll: pll { label
/Zephyr-latest/drivers/clock_control/
Dclock_control_rpi_pico.c61 #define REF_DIV(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), clock_div) argument
62 #define FB_DIV(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), fb_div) argument
63 #define POST_DIV1(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), post_div1) argument
64 #define POST_DIV2(pll) DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, pll), post_div2) argument
65 #define VCO_FREQ(pll) ((CLOCK_FREQ_xosc / REF_DIV(pll)) * FB_DIV(pll)) argument
77 #define PLL_FREQ(pll) \ argument
460 pll_hw_t *pll = (id == rpi_pico_clkid_pll_sys) ? config->pll_sys_regs in rpi_pico_is_clock_enabled() local
513 pll_hw_t *pll = (id == rpi_pico_clkid_pll_sys) ? config->pll_sys_regs in rpi_pico_calc_clock_freq() local
Dclock_control_si32_pll.c24 SI32_PLL_A_Type *pll; member
/Zephyr-latest/dts/arm/st/wb0/
Dstm32wb0.dtsi66 pll: pll64m { label
/Zephyr-latest/soc/ite/ec/it8xxx2/
Dsoc.c178 void __soc_ram_code chip_run_pll_sequence(const struct pll_config_t *pll) in chip_run_pll_sequence()
212 static void chip_configure_pll(const struct pll_config_t *pll) in chip_configure_pll()
/Zephyr-latest/dts/arm/renesas/ra/
Dra-cm4-common.dtsi61 pll: pll { label
/Zephyr-latest/dts/arm/renesas/ra/ra8/
Dr7fa8t1xh.dtsi47 pll: pll { label
Dr7fa8m1xh.dtsi47 pll: pll { label
Dr7fa8d1xh.dtsi77 pll: pll { label
/Zephyr-latest/dts/arm/st/f0/
Dstm32f0.dtsi77 pll: pll { label
/Zephyr-latest/dts/arm/st/l0/
Dstm32l0.dtsi86 pll: pll { label
/Zephyr-latest/dts/arm/st/f3/
Dstm32f3.dtsi70 pll: pll { label

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