/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/include/ |
D | stm32c0xx_ll_dma.h | 160 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1214 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/include/ |
D | stm32f1xx_ll_dma.h | 151 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1440 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/ |
D | stm32l0xx_ll_dma.h | 173 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1595 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_ll_dma.h | 167 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1619 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/include/ |
D | stm32f3xx_ll_dma.h | 151 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1476 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/ |
D | stm32l1xx_ll_dma.h | 152 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1477 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/ |
D | stm32g0xx_ll_dma.h | 168 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1704 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/ |
D | stm32wlxx_ll_dma.h | 164 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1963 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_ll_dma.h | 199 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1881 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_ll_dma.h | 176 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1945 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32f0xx/drivers/include/ |
D | stm32f0xx_ll_dma.h | 174 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 1676 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_ll_dma.h | 158 #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag … 2309 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
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/hal_stm32-3.5.0/stm32cube/stm32f1xx/soc/ |
D | stm32f101x6.h | 2920 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32f101xb.h | 2982 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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/hal_stm32-3.5.0/stm32cube/stm32f0xx/soc/ |
D | stm32f030x6.h | 1024 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32f030x8.h | 1046 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32f070x6.h | 1069 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32f070xb.h | 1101 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32f030xc.h | 1065 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32f031x6.h | 1040 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32f038xx.h | 1039 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/soc/ |
D | stm32l031xx.h | 1178 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32l051xx.h | 1219 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32l010x4.h | 1061 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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D | stm32l010xb.h | 1077 #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF1_Msk /*!< Channel 1 Globa… macro
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