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/Zephyr-latest/dts/bindings/dma/
Dnxp,mcux-edma.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,mcux-edma"
8 include: dma-controller.yaml
11 reg:
14 Specifies base physical address(s) and size of DMA and respective DMAMUX register(s)
20 dma-channels:
23 dma-requests:
26 dmamux-reg-offset:
30 The offset value for obtaining DMAMUX register index from DMAMUX channel.
31 Default value means DMAMUX channel is identical with DMAMUX register index
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Dst,stm32-dmamux.yaml2 # SPDX-License-Identifier: Apache-2.0
5 STM32 DMAMUX controller
7 The STM32 DMAMUX is a direct memory access multiplexer
9 DMAMUX clients connected to the STM32 DMA ultiplexer must use a two-cell specifier
10 for each dmamux channel: a phandle to the DMA multiplexer plus the following 2 integer cells:
11 1. channel: the mux channel from 0 to <dma-channels> - 1
13 3. channel-config: A 32bit mask specifying the DMA channel configuration
15 -bit 6-7 : Direction (see dma.h)
20 -bit 9 : Peripheral Increment Address
23 -bit 10 : Memory Increment Address
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Dst,stm32-dma.yaml2 # SPDX-License-Identifier: Apache-2.0
7 The STM32 DMA is a general-purpose direct memory access controller
11 or V2 like stm32L4 soc or stm322WB, some also have DMAMUX controller
14 compatible: "st,stm32-dma"
16 include: dma-controller.yaml
19 reg:
29 dma-offset:
32 offset in the table of channels when mapping to a DMAMUX
33 for 1st dma instance, offset is 0,
34 for 2nd dma instance, offset is the nb of dma channels of the 1st dma,
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Dst,stm32-bdma.yaml2 # SPDX-License-Identifier: Apache-2.0
7 The STM32 BDMA is a general-purpose direct memory access controller
11 described in the dma.txt file, using a four-cell specifier for each
13 1. channel: the bdma stream from 0 to <bdma-requests>
15 3. channel-config: A 32bit mask specifying the BDMA channel configuration
17 -bit 6-7 : Direction (see dma.h)
22 -bit 9 : Peripheral Increment Address
25 -bit 10 : Memory Increment Address
28 -bit 11-12 : Peripheral data size
30 0x1: Half-word (16 bits)
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/Zephyr-latest/dts/arm/st/u0/
Dstm32u073.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32u073", "st,stm32u0", "simple-bus";
14 compatible = "st,stm32-i2c-v2";
15 clock-frequency = <I2C_BITRATE_STANDARD>;
16 #address-cells = <1>;
17 #size-cells = <0>;
18 reg = <0x4000a000 0x400>;
21 interrupt-names = "combined";
26 compatible = "st,stm32-lptim";
28 #address-cells = <1>;
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Dstm32u0.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32u0_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/adc/adc.h>
12 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/i2c/i2c.h>
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/Zephyr-latest/dts/arm/st/g4/
Dstm32g491.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32g491", "st,stm32g4", "simple-bus";
14 compatible = "st,stm32-fdcan";
15 reg = <0x40006800 0x400>, <0x4000a400 0x6a0>;
16 reg-names = "m_can", "message_ram";
18 interrupt-names = "int0", "int1";
20 bosch,mram-cfg = <0x350 28 8 3 3 0 3 3>;
25 compatible = "st,stm32-timers";
26 reg = <0x40015000 0x400>;
30 interrupt-names = "brk", "up", "trgcom", "cc";
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Dstm32g4.dtsi6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32g4_clock.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/adc/adc.h>
16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
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/Zephyr-latest/dts/arm/st/wb0/
Dstm32wb0.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv6-m.dtsi>
8 #include <zephyr/dt-bindings/i2c/i2c.h>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/clock/stm32wb0_clock.h>
13 #include <zephyr/dt-bindings/reset/stm32wb0_reset.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
21 * smallest size in the 'reg' property.
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/Zephyr-latest/dts/arm/st/g0/
Dstm32g0b0.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32g0b0", "st,stm32g0", "simple-bus";
13 pinctrl: pin-controller@50000000 {
15 compatible = "st,stm32-gpio";
16 gpio-controller;
17 #gpio-cells = <2>;
18 reg = <0x50001000 0x400>;
24 compatible = "st,stm32-usart", "st,stm32-uart";
25 reg = <0x40005000 0x400>;
33 compatible = "st,stm32-usart", "st,stm32-uart";
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Dstm32g0b1.dtsi3 * Copyright (c) 2021 G-Technologies Sdn. Bhd.
5 * SPDX-License-Identifier: Apache-2.0
13 clk_hsi48: clk-hsi48 {
14 #clock-cells = <0>;
15 compatible = "st,stm32-hsi48-clock";
16 clock-frequency = <DT_FREQ_M(48)>;
22 compatible = "st,stm32g0b1", "st,stm32g0", "simple-bus";
25 pinctrl: pin-controller@50000000 {
27 compatible = "st,stm32-gpio";
28 gpio-controller;
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Dstm32g0.dtsi3 * Copyright (c) 2019-2024 STMicroelectronics
6 * Copyright (c) 2021 G-Technologies Sdn. Bhd.
8 * SPDX-License-Identifier: Apache-2.0
11 #include <arm/armv6-m.dtsi>
12 #include <zephyr/dt-bindings/clock/stm32g0_clock.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/adc.h>
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/Zephyr-latest/dts/arm/st/mp1/
Dstm32mp157.dtsi5 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/clock/stm32_common_clocks.h>
13 #include <zephyr/dt-bindings/clock/stm32_clock.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
18 #include <zephyr/dt-bindings/reset/stm32mp1_reset.h>
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/Zephyr-latest/dts/arm/st/c0/
Dstm32c0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/stm32c0_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/dma/stm32_dma.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
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/Zephyr-latest/dts/arm/st/l4/
Dstm32l4p5.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/flash_controller/ospi.h>
11 /delete-node/ &quadspi;
16 reg = <0x20000000 DT_SIZE_K(128)>;
19 reg = <0x10000000 DT_SIZE_K(64)>;
22 reg = <0x20030000 DT_SIZE_K(128)>;
26 clk_hsi48: clk-hsi48 {
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <DT_FREQ_M(48)>;
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/Zephyr-latest/dts/arm/nxp/
Dnxp_s32z27x_r52.dtsi2 * Copyright 2022-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-r.dtsi>
9 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
10 #include <zephyr/dt-bindings/clock/nxp_s32z2_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-r52";
21 reg = <0>;
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Dnxp_s32k344_m7.dtsi2 * Copyright 2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/clock/nxp_s32k344_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-m7";
20 reg = <0>;
25 compatible = "arm,cortex-m7";
[all …]
/Zephyr-latest/dts/arm/st/wl/
Dstm32wl.dtsi2 * Copyright (c) 2020-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/clock/stm32wl_clock.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/lora/sx126x.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
[all …]
/Zephyr-latest/dts/arm/st/wb/
Dstm32wb.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32wb_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/adc/adc.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
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/Zephyr-latest/dts/arm/st/h7/
Dstm32h7.dtsi7 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32h7_clock.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32h7_adc.h>
18 #include <zephyr/dt-bindings/reset/stm32h7_reset.h>
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/Zephyr-latest/dts/arm/st/l5/
Dstm32l5.dtsi6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv8-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
18 #include <zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h>
[all …]
/Zephyr-latest/drivers/flash/
Dflash_stm32_ospi.c5 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/flash_controller/ospi.h>
125 DMA_TypeDef *reg; member
187 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_lock_thread()
189 k_sem_take(&dev_data->sem, K_FOREVER); in ospi_lock_thread()
194 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_unlock_thread()
196 k_sem_give(&dev_data->sem); in ospi_unlock_thread()
201 const struct flash_stm32_ospi_config *dev_cfg = dev->config; in ospi_send_cmd()
202 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_send_cmd()
205 LOG_DBG("Instruction 0x%x", cmd->Instruction); in ospi_send_cmd()
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Dflash_stm32_xspi.c4 * SPDX-License-Identifier: Apache-2.0
23 #include <zephyr/dt-bindings/flash_controller/xspi.h>
59 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_lock_thread()
61 k_sem_take(&dev_data->sem, K_FOREVER); in xspi_lock_thread()
66 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_unlock_thread()
68 k_sem_give(&dev_data->sem); in xspi_unlock_thread()
73 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_send_cmd()
76 LOG_DBG("Instruction 0x%x", cmd->Instruction); in xspi_send_cmd()
78 dev_data->cmd_status = 0; in xspi_send_cmd()
80 hal_ret = HAL_XSPI_Command(&dev_data->hxspi, cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE); in xspi_send_cmd()
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/Zephyr-latest/doc/releases/
Drelease-notes-3.5.rst38 * CVE-2023-3725 `Zephyr project bug tracker GHSA-2g3m-p6c7-8rr3
39 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-2g3m-p6c7-8rr3>`_
41 * CVE-2023-4257 `Zephyr project bug tracker GHSA-853q-q69w-gf5j
42 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-853q-q69w-gf5j>`_
44 * CVE-2023-4258 `Zephyr project bug tracker GHSA-m34c-cp63-rwh7
45 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-m34c-cp63-rwh7>`_
47 * CVE-2023-4259 `Zephyr project bug tracker GHSA-gghm-c696-f4j4
48 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-gghm-c696-f4j4>`_
50 * CVE-2023-4260 `Zephyr project bug tracker GHSA-gj27-862r-55wh
51 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-gj27-862r-55wh>`_
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Drelease-notes-2.5.rst27 * CVE-2021-3323: Under embargo until 2021-04-14
28 * CVE-2021-3321: Under embargo until 2021-04-14
29 * CVE-2021-3320: Under embargo until 2021-04-14
39 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
56 * Changed vcnl4040 dts binding default for property 'proximity-trigger'.
63 * The :c:func:`mqtt_keepalive_time_left` function now returns -1 if keep alive
67 timeout usage must use the new-style k_timeout_t type and not the
87 GPIO-only regulators a devicetree property ``supply-gpios`` is defined as a
101 * ARM Musca-A board and SoC support deprecated and planned to be removed in 2.6.0.
146 sys_heap/k_heaps. Note that the new-style heap is a general
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