1/*
2 * Copyright (c) 2024 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <st/u0/stm32u031.dtsi>
8
9/ {
10	soc {
11		compatible = "st,stm32u073", "st,stm32u0", "simple-bus";
12
13		i2c4: i2c@4000a000 {
14			compatible = "st,stm32-i2c-v2";
15			clock-frequency = <I2C_BITRATE_STANDARD>;
16			#address-cells = <1>;
17			#size-cells = <0>;
18			reg = <0x4000a000 0x400>;
19			clocks = <&rcc STM32_CLOCK(APB1, 25U)>;
20			interrupts = <24 0>;
21			interrupt-names = "combined";
22			status = "disabled";
23		};
24
25		lptim3: timers@40009000 {
26			compatible = "st,stm32-lptim";
27			clocks = <&rcc STM32_CLOCK(APB1, 26U)>;
28			#address-cells = <1>;
29			#size-cells = <0>;
30			reg = <0x40009000 0x400>;
31			interrupts = <19 1>;
32			interrupt-names = "combined";
33			status = "disabled";
34		};
35
36		dma2: dma@40020400 {
37			compatible = "st,stm32-dma-v2";
38			#dma-cells = <3>;
39			reg = <0x40020400 0x400>;
40			interrupts = <11 0 11 0 11 0 11 0 11 0>;
41			clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
42			dma-requests = <5>;
43			dma-offset = <7>;
44			status = "disabled";
45		};
46
47		dmamux1: dmamux@40020800 {
48			dma-channels = <12>;
49		};
50
51		usb: usb@40005c00 {
52			compatible = "st,stm32-usb";
53			reg = <0x40005c00 0x400>;
54			interrupts = <8 0>;
55			interrupt-names = "usb";
56			num-bidir-endpoints = <8>;
57			ram-size = <1024>;
58			phys = <&usb_fs_phy>;
59			clocks = <&rcc STM32_CLOCK(APB1, 13U)>;
60			status = "disabled";
61		};
62
63		usb_fs_phy: usbphy {
64			compatible = "usb-nop-xceiv";
65			#phy-cells = <0>;
66		};
67	};
68
69	sram1: memory@20000000 {
70		compatible = "zephyr,memory-region", "mmio-sram";
71		zephyr,memory-region = "SRAM1";
72	};
73
74	sram2: memory@20008000 {
75		compatible = "zephyr,memory-region", "mmio-sram";
76		zephyr,memory-region = "SRAM2";
77	};
78};
79