| /Zephyr-latest/tests/kernel/gen_isr_table/src/ |
| D | multilevel_irq.c | 11 static void test_multi_level_bit_masks_fn(uint32_t irq1, uint32_t irq2, uint32_t irq3) in test_multi_level_bit_masks_fn() argument
19 const uint32_t irqn = (irq3 << l3_shift) | irqn_l2; in test_multi_level_bit_masks_fn()
22 if (IS_ENABLED(CONFIG_3RD_LEVEL_INTERRUPTS) && (irq3 > 0)) { in test_multi_level_bit_masks_fn()
41 if (irq3 > 0) { in test_multi_level_bit_masks_fn()
42 const uint32_t hwirq3 = irq3 - 1; in test_multi_level_bit_masks_fn()
56 } else if (irq3 > 0) { in test_multi_level_bit_masks_fn()
117 uint32_t irq1, irq2, irq3; in ZTEST() local
123 irq3 = 1; in ZTEST()
124 test_multi_level_bit_masks_fn(irq1, irq2, irq3); in ZTEST()
129 irq3 = BIT_MASK(CONFIG_3RD_LEVEL_INTERRUPT_BITS) >> 1; in ZTEST()
[all …]
|
| /Zephyr-latest/dts/arm/renesas/ra/ra4/ |
| D | r7fa4w1ad2cng.dtsi | 179 port-irq-names = "port-irq3",
183 port-irq3-pins = <4>;
195 "port-irq3",
200 port-irq3-pins = <10>;
210 "port-irq3";
214 port-irq3-pins = <12>;
|
| D | r7fa4m1ax.dtsi | 245 "port-irq3",
251 port-irq3-pins = <4>;
264 "port-irq3",
269 port-irq3-pins = <10>;
279 "port-irq3";
283 port-irq3-pins = <12>;
|
| D | r7fa4e10x.dtsi | 216 "port-irq3",
221 port-irq3-pins = <10>;
231 "port-irq3";
235 port-irq3-pins = <12>;
|
| D | r7fa4e2b93cfm.dtsi | 259 "port-irq3",
264 port-irq3-pins = <10>;
274 "port-irq3";
278 port-irq3-pins = <12>;
|
| D | r7fa4m2ax.dtsi | 301 "port-irq3",
306 port-irq3-pins = <10>;
316 "port-irq3";
320 port-irq3-pins = <12>;
|
| D | r7fa4m3ax.dtsi | 311 "port-irq3",
316 port-irq3-pins = <10>;
326 "port-irq3";
330 port-irq3-pins = <2 12>;
|
| D | r7fa4l1bx.dtsi | 673 "port-irq3",
678 port-irq3-pins = <10>;
688 "port-irq3",
693 port-irq3-pins = <12>;
|
| /Zephyr-latest/dts/arm/renesas/ra/ra2/ |
| D | r7fa2a1xh.dtsi | 211 "port-irq3",
217 port-irq3-pins = <9>;
229 "port-irq3",
233 port-irq3-pins = <12>;
262 "port-irq3";
265 port-irq3-pins = <0>;
|
| /Zephyr-latest/tests/drivers/gpio/gpio_basic_api/boards/ |
| D | rzt2l_rsk.overlay | 23 &irq3 {
|
| /Zephyr-latest/dts/arm/renesas/ra/ra6/ |
| D | r7fa6m1ad3cfp.dtsi | 207 "port-irq3",
212 port-irq3-pins = <10>;
222 "port-irq3";
226 port-irq3-pins = <12>;
|
| D | r7fa6e2bx.dtsi | 257 "port-irq3",
262 port-irq3-pins = <10>;
272 "port-irq3";
276 port-irq3-pins = <12>;
|
| D | r7fa6m2ax.dtsi | 239 "port-irq3",
244 port-irq3-pins = <10>;
254 "port-irq3";
258 port-irq3-pins = <2 12>;
|
| D | r7fa6e10x.dtsi | 280 "port-irq3",
285 port-irq3-pins = <10>;
295 "port-irq3";
299 port-irq3-pins = <12>;
|
| D | r7fa6m5xh.dtsi | 483 "port-irq3",
488 port-irq3-pins = <10>;
498 "port-irq3";
502 port-irq3-pins = <2 12>;
580 "port-irq3";
584 port-irq3-pins = <2>;
|
| D | r7fa6m3ax.dtsi | 305 "port-irq3",
310 port-irq3-pins = <10>;
320 "port-irq3";
324 port-irq3-pins = <2 12>;
|
| D | r7fa6m4ax.dtsi | 406 "port-irq3",
411 port-irq3-pins = <10>;
421 "port-irq3";
425 port-irq3-pins = <2 12>;
|
| /Zephyr-latest/scripts/build/ |
| D | gen_isr_tables.py | 198 irq3 = (irq & self.int_lvl_masks[2]) >> (self.int_bits[0] + self.int_bits[1])
202 if irq3:
204 irq3_pos = self.get_irq_baseoffset(3) + self.__max_irq_per * list_index + irq3 - 1
206 self.__log.debug('IRQ_Indx = ' + str(irq3))
|
| /Zephyr-latest/dts/arm/renesas/ra/ra8/ |
| D | r7fa8t1xh.dtsi | 290 "port-irq3";
294 port-irq3-pins = <2 8 12>;
341 "port-irq3",
346 port-irq3-pins = <10>;
|
| D | r7fa8m1xh.dtsi | 309 "port-irq3";
313 port-irq3-pins = <2 8 12>;
360 "port-irq3",
365 port-irq3-pins = <10>;
|
| D | r7fa8d1xh.dtsi | 345 "port-irq3";
349 port-irq3-pins = <2 8 12>;
396 "port-irq3",
401 port-irq3-pins = <10>;
|
| /Zephyr-latest/drivers/mbox/ |
| D | mbox_nrf_bellboard_rx.c | 173 BELLBOARD_IRQ_CONFIGURE(irq3, 3); in bellboard_rx_init()
|
| /Zephyr-latest/dts/arm/renesas/rz/rzg/ |
| D | r9a08g045.dtsi | 794 irq3: irq3 { label
|
| /Zephyr-latest/dts/arm/renesas/rz/rzn/ |
| D | r9a07g084.dtsi | 124 irq3: irq@3 { label
|
| /Zephyr-latest/dts/arm/renesas/rz/rzt/ |
| D | r9a07g074.dtsi | 125 irq3: irq@3 { label
|
