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Searched refs:irq2 (Results 1 – 21 of 21) sorted by relevance

/Zephyr-latest/tests/kernel/gen_isr_table/src/
Dmultilevel_irq.c11 static void test_multi_level_bit_masks_fn(uint32_t irq1, uint32_t irq2, uint32_t irq3) in test_multi_level_bit_masks_fn() argument
16 const uint32_t hwirq2 = irq2 - 1; in test_multi_level_bit_masks_fn()
19 const bool has_l2 = irq2 > 0; in test_multi_level_bit_masks_fn()
22 const uint32_t irqn_l2 = (irq2 << l2_shift) | irqn_l1; in test_multi_level_bit_masks_fn()
80 uint32_t irq1, irq2; in ZTEST() local
85 irq2 = 1; in ZTEST()
86 test_multi_level_bit_masks_fn(irq1, irq2, 0); in ZTEST()
90 irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS) >> 1; in ZTEST()
91 test_multi_level_bit_masks_fn(irq1, irq2, 0); in ZTEST()
95 irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS); in ZTEST()
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/Zephyr-latest/tests/kernel/interrupt/src/
Ddynamic_shared_irq.c11 unsigned int irq2; member
40 arch_irq_disconnect_dynamic(fixture.irq2, fixture.irq_priority, in dynamic_shared_irq_suite_after()
89 fixture.irq2 = get_irq_slot(fixture.irq1 + 1); in dynamic_shared_irq_suite_setup()
90 zassert_true(fixture.irq2 != TEST_INVALID_IRQ, in dynamic_shared_irq_suite_setup()
95 fixture.irq2_table_idx = fixture.irq2 - CONFIG_GEN_IRQ_START_VECTOR; in dynamic_shared_irq_suite_setup()
138 arch_irq_connect_dynamic(fixture.irq2, fixture.irq_priority, in dynamic_shared_irq_suite_before()
165 irq_enable(fixture.irq2); in ZTEST()
168 trigger_irq(fixture.irq2); in ZTEST()
180 irq_disable(fixture.irq2); in ZTEST()
/Zephyr-latest/drivers/usb_c/ppc/
Dnxp_nx20p3483.c295 uint8_t irq1, irq2; in nx20p3483_irq_worker() local
304 ret = read_reg(dev, NX20P3483_REG_INT2, &irq2); in nx20p3483_irq_worker()
331 if (irq1 & NX20P3483_REG_INT1_OV_5VSRC || irq2 & NX20P3483_REG_INT2_OV_HVSRC) { in nx20p3483_irq_worker()
336 if (irq1 & NX20P3483_REG_INT1_RCP_5VSRC || irq2 & NX20P3483_REG_INT2_RCP_HVSRC) { in nx20p3483_irq_worker()
341 if (irq1 & NX20P3483_REG_INT1_OC_5VSRC || irq2 & NX20P3483_REG_INT2_OC_HVSRC) { in nx20p3483_irq_worker()
346 if (irq1 & NX20P3483_REG_INT1_SC_5VSRC || irq2 & NX20P3483_REG_INT2_SC_HVSRC) { in nx20p3483_irq_worker()
352 if (irq2 & NX20P3483_REG_INT2_RCP_HVSNK) { in nx20p3483_irq_worker()
357 if (irq2 & NX20P3483_REG_INT2_SC_HVSNK) { in nx20p3483_irq_worker()
362 if (irq2 & NX20P3483_REG_INT2_OV_HVSNK) { in nx20p3483_irq_worker()
/Zephyr-latest/dts/arm/renesas/ra/ra2/
Dr7fa2a1xh.dtsi197 port-irq-names = "port-irq2",
203 port-irq2-pins = <10>;
215 "port-irq2",
219 port-irq2-pins = <13>;
248 "port-irq2",
251 port-irq2-pins = <1>;
/Zephyr-latest/scripts/build/
Dgen_isr_tables.py199 irq2 = (irq & self.int_lvl_masks[1]) >> (self.int_bits[0])
203 list_index = self.get_irq_index(irq2 - 1, 3)
210 if irq2:
212 irq2_pos = self.get_irq_baseoffset(2) + self.__max_irq_per * list_index + irq2 - 1
214 self.__log.debug('IRQ_Indx = ' + str(irq2))
/Zephyr-latest/dts/arm/renesas/ra/ra4/
Dr7fa4w1ad2cng.dtsi202 "port-irq2",
207 port-irq2-pins = <0>;
217 "port-irq2",
221 port-irq2-pins = <13>;
Dr7fa4e2b93cfm.dtsi245 "port-irq2",
250 port-irq2-pins = <0>;
260 "port-irq2",
264 port-irq2-pins = <13>;
Dr7fa4m3ax.dtsi306 "port-irq2",
311 port-irq2-pins = <0>;
321 "port-irq2",
325 port-irq2-pins = <3 13>;
Dr7fa4m2ax.dtsi295 "port-irq2",
300 port-irq2-pins = <0>;
310 "port-irq2",
314 port-irq2-pins = <13>;
/Zephyr-latest/dts/arm/renesas/ra/
Dra-cm4-common.dtsi179 interrupt-names = "port-irq2", "port-irq3", "port-irq6",
181 port-irq2-pins = <2>;
200 interrupt-names = "port-irq0", "port-irq1", "port-irq2",
204 port-irq2-pins = <0>;
221 interrupt-names = "port-irq0", "port-irq1", "port-irq2",
225 port-irq2-pins = <13>;
/Zephyr-latest/dts/arm/renesas/ra/ra8/
Dr7fa8t1xh.dtsi277 "port-irq2";
280 port-irq2-pins = <0>;
288 "port-irq2",
292 port-irq2-pins = <3 13>;
339 "port-irq2",
344 port-irq2-pins = <9>;
Dr7fa8m1xh.dtsi295 "port-irq2";
298 port-irq2-pins = <0>;
306 "port-irq2",
310 port-irq2-pins = <3 13>;
357 "port-irq2",
362 port-irq2-pins = <9>;
Dr7fa8d1xh.dtsi331 "port-irq2";
334 port-irq2-pins = <0>;
342 "port-irq2",
346 port-irq2-pins = <3 13>;
393 "port-irq2",
398 port-irq2-pins = <9>;
/Zephyr-latest/dts/arm/renesas/ra/ra6/
Dr7fa6m1ad3cfp.dtsi199 "port-irq2",
204 port-irq2-pins = <0>;
214 "port-irq2",
218 port-irq2-pins = <13>;
Dr7fa6e2bx.dtsi254 "port-irq2",
259 port-irq2-pins = <0>;
269 "port-irq2",
273 port-irq2-pins = <13>;
Dr7fa6m2ax.dtsi243 "port-irq2",
248 port-irq2-pins = <0>;
258 "port-irq2",
262 port-irq2-pins = <3 13>;
Dr7fa6e10x.dtsi273 "port-irq2",
278 port-irq2-pins = <0>;
288 "port-irq2",
292 port-irq2-pins = <13>;
Dr7fa6m5xh.dtsi477 "port-irq2",
482 port-irq2-pins = <0>;
492 "port-irq2",
496 port-irq2-pins = <3 13>;
574 "port-irq2",
578 port-irq2-pins = <3>;
Dr7fa6m3ax.dtsi304 "port-irq2",
309 port-irq2-pins = <0>;
319 "port-irq2",
323 port-irq2-pins = <3 13>;
Dr7fa6m4ax.dtsi401 "port-irq2",
406 port-irq2-pins = <0>;
416 "port-irq2",
420 port-irq2-pins = <3 13>;
/Zephyr-latest/drivers/mbox/
Dmbox_nrf_bellboard_rx.c172 BELLBOARD_IRQ_CONFIGURE(irq2, 2); in bellboard_rx_init()