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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
D	stm32wlxx_hal_pwr.c	188 (+) The PVD is stopped in Standby mode. 193 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. 202 …(+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator … 204 …(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on. 205 …(+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, lo… 207 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. 208 …(+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulato… 209 …p 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, r… 211 …(+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, m… 212 …(+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regu… [all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
D	stm32wbxx_hal_pwr.c	203 (+) The PVD is stopped in Standby mode. 208 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. 217 …(+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator … 219 …(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on. 220 …(+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, lo… 222 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. 223 …(+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulato… 224 …p 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, r… 226 …(+) Standby mode with SRAM2a: all clocks are stopped except LSI and LSE, SRAM2a content preserved,… 228 …(+) Standby mode without SRAM2a: all clocks are stopped except LSI and LSE, main and low power reg… [all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
D	stm32l0xx_hal_pwr.c	42 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 115 internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode 122 (+) The PVD is stopped in Standby mode. 128 (+) WakeUp pin is used to wake up the system from Standby mode. This pin is 144 …WR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and 146 …WR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and 148 …WR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and 157 (+) Low power run mode: regulator in low power mode, limited clock frequency, 159 (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running. 160 (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency, [all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
D	stm32l1xx_hal_pwr.c	135 internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode 142 (+) The PVD is stopped in Standby mode. 147 (+) WakeUp pin is used to wake up the system from Standby mode. This pin is 162 (++) When this bit is set (Regulator voltage output Scale 1 mode selected) 164 (++) When this bit is reset (Regulator voltage output Scale 2 mode selected) 166 (++) When this bit is reset (Regulator voltage output Scale 3 mode selected) 175 (+) Low power run mode: regulator in low power mode, limited clock frequency, 177 (+) Sleep mode: Cortex-M3 core stopped, peripherals kept running. 178 (+) Low power sleep mode: Cortex-M3 core stopped, limited clock frequency, 179 limited number of peripherals running, regulator in low power mode. [all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
D	stm32h7xx_hal_pwr_ex.c	51 main internal regulator output voltage in STOP mode. The voltage scaling 52 in STOP mode could be one of the following scales : 58 output voltage applied to the main regulator in STOP mode. 60 (#) Call HAL_PWREx_EnterSTOP2Mode() function to enter the system in STOP mode 61 with core domain in D2STOP mode. This API is used only for STM32H7Axxx 65 in DEEP-SLEEP mode with __WFE() entry. 68 DSTOP mode. Call this API with all available power domains to enter the 69 system in STOP mode. 72 in DEEP-SLEEP mode with __WFE() entry. 75 Cortex-Mx in any low power mode (SLEEP/DEEP-SLEEP) using WFE entry. [all …]
D	stm32h7xx_hal_pwr.c	50 (#) Every entity have low power mode as described below : 60 (+) RUN* : The Run* mode is entered after a POR reset and a wakeup from 61 Standby. In Run* mode, the performance is limited and the 63 enters Run mode only when the ACTVOSRDY bit in PWR control 81 mode and voltage threshold) in order to set up the Power Voltage Detector, 99 mode. Wake-up from SLEEP mode could be following to an event or an 100 interrupt according to low power mode intrinsic request called (__WFI() 104 in SLEEP mode with __WFE() entry. 107 mode for single core devices. For dual core devices, this API will enter 109 mode. According to the used parameter, user could select the regulator to [all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
D	stm32u0xx_hal_pwr.c	45 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 151 (+) The PVD is stopped in Standby mode. 157 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. 167 …(+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator … 168 …(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on. 169 … (+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, 171 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. 172 …(+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulato… 173 …(+) Stop 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulato… 174 reduced set of waking up IPs compared to Stop 1 mode. [all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
D	stm32l4xx_hal_pwr.c	45 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 148 (+) The PVD is stopped in Standby mode. 154 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. 164 …(+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator … 165 …(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on. 166 …(+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, lo… 167 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. 168 …(+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulato… 169 …p 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, r… 170 …(+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, m… [all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
D	stm32g4xx_hal_pwr.c	45 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 148 (+) The PVD is stopped in Standby mode. 154 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. 164 …(+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator … 165 …(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on. 166 …(+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, lo… 167 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. 168 …(+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulato… 169 …(+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, m… 170 …(+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regu… [all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
D	stm32l5xx_hal_pwr.c	44 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 147 (+) The PVD is stopped in Standby mode. 153 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. 163 …(+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator … 164 …(+) Sleep mode: Cortex-M33 core clock stopped, peripherals kept running, main and low power regula… 165 …(+) Low-power Sleep mode: Cortex-M33 core clock stopped, peripherals kept running, main regulator … 166 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. 167 …(+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulato… 168 …p 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, r… 169 …(+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, m… [all …]
D	stm32l5xx_hal_pwr_ex.c	46 /** @defgroup PWREx_PVM_Mode_Mask PWR PVM Mode Mask 64 …ODE_CHANGE_DELAY_VALUE 1000UL /!< Time out for step down converter operating mode / 111 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE0 Regulator voltage output range 0 mode, 114 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, 117 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, 127 * @note The VOS shall NOT be changed in LP Mode of if LP mode is asked. 128 * @note The function shall not be called in Low-power run mode (meaningless and misleading). 139 /* VOS shall not be changed in LP Mode / in HAL_PWREx_ControlVoltageScaling() 140 / or if LP Mode is asked but not yet established / in HAL_PWREx_ControlVoltageScaling() 253 @note The configuration is lost when exiting the Shutdown mode due to the [all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
D	stm32l5xx_hal_ospi.h	54 …uint32_t DualQuad; /!< It enables or not the dual-quad mode which allow to acces… 55 … quad mode on two different devices to increase the throughput. 133 used for memory-mapped mode). 140 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 144 uint32_t InstructionDtrMode; /!< It enables or not the DTR mode for the instruction phase. 148 uint32_t AddressMode; /!< It indicates the mode of the address. 152 uint32_t AddressDtrMode; /!< It enables or not the DTR mode for the address phase. 156 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 160 …uint32_t AlternateBytesDtrMode; /!< It enables or not the DTR mode for the alternate bytes ph… 162 uint32_t DataMode; /!< It indicates the mode of the data. [all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
D	stm32l4xx_hal_ospi.h	54 …uint32_t DualQuad; /!< It enables or not the dual-quad mode which allow to acces… 55 … quad mode on two different devices to increase the throughput. 139 used for memory-mapped mode). 146 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 150 uint32_t InstructionDtrMode; /!< It enables or not the DTR mode for the instruction phase. 154 uint32_t AddressMode; /!< It indicates the mode of the address. 158 uint32_t AddressDtrMode; /!< It enables or not the DTR mode for the address phase. 162 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 166 …uint32_t AlternateBytesDtrMode; /!< It enables or not the DTR mode for the alternate bytes ph… 168 uint32_t DataMode; /!< It indicates the mode of the data. [all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
D	stm32g0xx_hal_pwr.c	96 (+) WakeUp pins are used to wakeup the system from Standby mode or 97 Shutdown mode. WakeUp pins polarity can be set to configure event 100 * Low Power mode configuration * 104 (+) Low-power run mode: core and peripherals are running at low frequency. 105 Regulator is in low power mode. 106 (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running, 107 regulator is main mode. 108 (+) Low-power Sleep mode: Cortex-M0+ core stopped, peripherals kept running 109 and regulator in low power mode. 110 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, regulator is [all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_pwr.h	103 /** @defgroup PWR_LL_EC_LOW_POWER_MODE_SELCTION Low Power Mode Selection 106 #define LL_PWR_STOP0_MODE (0U) /!< Stop 0 mode / 107 #define LL_PWR_STOP1_MODE PWR_CR1_LPMS_0 /!< Stop 1 mode / 108 #define LL_PWR_STOP2_MODE PWR_CR1_LPMS_1 /!< Stop 2 mode / 109 #define LL_PWR_STOP3_MODE (PWR_CR1_LPMS_0 \| PWR_CR1_LPMS_1) /!< Stop 3 mode / 110 #define LL_PWR_STANDBY_MODE PWR_CR1_LPMS_2 /!< Standby mode / 111 #define LL_PWR_SHUTDOWN_MODE (PWR_CR1_LPMS_2 \| PWR_CR1_LPMS_1) /!< Shutdown mode / 116 /** @defgroup PWR_LL_EC_SRAM2_SB_CONTENTS_RETENTION PWR SRAM2 Content Retention in Standby Mode 118 * the SRAM2 content is preserved based on the same defines in Stop 3 mode. 121 … 0U /!< SRAM2 no retention in Stop 3 and Standby mode / [all …]
D	stm32u5xx_hal_ospi.h	56 …uint32_t DualQuad; /!< It enables or not the dual-quad mode which allow to acces… 57 … quad mode on two different devices to increase the throughput. 139 used for memory-mapped mode). 146 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 150 uint32_t InstructionDtrMode; /!< It enables or not the DTR mode for the instruction phase. 154 uint32_t AddressMode; /!< It indicates the mode of the address. 158 uint32_t AddressDtrMode; /!< It enables or not the DTR mode for the address phase. 162 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 166 …uint32_t AlternateBytesDtrMode; /!< It enables or not the DTR mode for the alternate bytes ph… 168 uint32_t DataMode; /!< It indicates the mode of the data. [all …]
D	stm32u5xx_hal_xspi.h	57 uint32_t MemoryMode; /!< It Specifies the memory mode. 140 used for memory-mapped mode). 146 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 150 uint32_t InstructionDTRMode; /!< It enables or not the DTR mode for the instruction phase. 154 …uint32_t AddressMode; /!< It indicates the address mode. Address mode precises numb… 159 uint32_t AddressDTRMode; /!< It enables or not the DTR mode for the address phase. 163 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 167 …uint32_t AlternateBytesDTRMode; /!< It enables or not the DTR mode for the alternate bytes ph… 169 …uint32_t DataMode; /!< It indicates the data mode. Data mode precises number of … 173 This field is only used for indirect mode. [all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
D	stm32h7xx_hal_ospi.h	54 …uint32_t DualQuad; /!< It enables or not the dual-quad mode which allow to acces… 55 … quad mode on two different devices to increase the throughput. 137 used for memory-mapped mode). 144 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 148 uint32_t InstructionDtrMode; /!< It enables or not the DTR mode for the instruction phase. 152 uint32_t AddressMode; /!< It indicates the mode of the address. 156 uint32_t AddressDtrMode; /!< It enables or not the DTR mode for the address phase. 160 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 164 …uint32_t AlternateBytesDtrMode; /!< It enables or not the DTR mode for the alternate bytes ph… 166 uint32_t DataMode; /!< It indicates the mode of the data. [all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
D	stm32f4xx_hal_pwr_ex.c	71 the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is 72 retained even in Standby or VBAT mode when the low power backup regulator 101 down mode when the device enters Stop mode. When the Flash memory 102 is in power down mode, an additional startup delay is incurred when 103 waking up from Stop mode. 114 (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has 116 (++) Normal mode: The CPU and core logic operate at maximum frequency at a given 118 (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a 119 higher frequency than the normal mode for a given voltage scaling (scale 1, 120 … scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and [all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_hal_xspi.h	56 uint32_t MemoryMode; /!< It Specifies the memory mode. 135 used for memory-mapped mode). 141 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 145 uint32_t InstructionDTRMode; /!< It enables or not the DTR mode for the instruction phase. 149 …uint32_t AddressMode; /!< It indicates the address mode. Address mode precises numb… 154 uint32_t AddressDTRMode; /!< It enables or not the DTR mode for the address phase. 158 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 162 …uint32_t AlternateBytesDTRMode; /!< It enables or not the DTR mode for the alternate bytes ph… 164 …uint32_t DataMode; /!< It indicates the data mode. Data mode precises number of … 168 This field is only used for indirect mode. [all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
D	stm32h7rsxx_hal_pwr.c	33 (+) Sleep (CPU clock stopped and still in RUN mode) 48 mode and voltage threshold) in order to set up the Programmed Voltage 66 (#) Call HAL_PWR_EnterSLEEPMode() function to enter the CPU in Sleep mode. 67 Wake-up from Sleep mode could be following to an event or an 68 interrupt according to low power mode intrinsic request called (__WFI() 72 mode. Wake-up from Stop mode could be following to an event or an 73 interrupt according to low power mode intrinsic request called (__WFI() 77 Standby mode. Wake-up from Standby mode can be following only by an 81 enable and disable the Cortex-M7 re-entry in Sleep mode after an 121 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask [all …]
/hal_stm32-latest/scripts/genpinctrl/
D	stm32f1-pinctrl-config.yaml	`16 # - mode (mandatory): Mode setting (analog, alternate, input). Mode needs to 24 # only applies to "input" mode. Equivalent to "disable" (a.k.a floating) if 41 mode: analog 45 mode: analog 49 mode: input 53 mode: alternate 57 mode: analog 61 mode: input 65 mode: input 69 mode: input [all …]`
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
D	stm32h7rsxx_hal_xspi.h	54 uint32_t MemoryMode; /!< It Specifies the memory mode. 136 used for memory-mapped mode). 142 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 146 uint32_t InstructionDTRMode; /!< It enables or not the DTR mode for the instruction phase. 150 …uint32_t AddressMode; /!< It indicates the address mode. Address mode precises numb… 155 uint32_t AddressDTRMode; /!< It enables or not the DTR mode for the address phase. 159 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 163 …uint32_t AlternateBytesDTRMode; /!< It enables or not the DTR mode for the alternate bytes ph… 165 …uint32_t DataMode; /!< It indicates the data mode. Data mode precises number of … 169 This field is only used for indirect mode. [all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_hal_xspi.h	54 uint32_t MemoryMode; /!< It Specifies the memory mode. 140 used for memory-mapped mode). 146 uint32_t InstructionMode; /!< It indicates the mode of the instruction. 150 uint32_t InstructionDTRMode; /!< It enables or not the DTR mode for the instruction phase. 154 …uint32_t AddressMode; /!< It indicates the address mode. Address mode precises numb… 159 uint32_t AddressDTRMode; /!< It enables or not the DTR mode for the address phase. 163 uint32_t AlternateBytesMode; /!< It indicates the mode of the alternate bytes. 167 …uint32_t AlternateBytesDTRMode; /!< It enables or not the DTR mode for the alternate bytes ph… 169 …uint32_t DataMode; /!< It indicates the data mode. Data mode precises number of … 173 This field is only used for indirect mode. [all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
D	stm32f1xx_hal_pwr.c	46 / @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 209 (+) The PVD is stopped in Standby mode. 214 (+) WakeUp pin is used to wake up the system from Standby mode. This pin is 225 (+) Sleep mode: CPU clock off, all peripherals including Cortex-M3 core peripherals like 227 (+) Stop mode: All clocks are stopped 228 (+) Standby mode: 1.8V domain powered off 231 * Sleep mode *** 235 …The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY… 237 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction 238 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction [all …]

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Zephyr-2.7.6
Zephyr-3.6.0
Zephyr-3.7.1
Zephyr-4.0.0
Zephyr-4.1.0
Zephyr-latest
acpica-latest
babblesim_base-latest
babblesim_ext_2G4_channel_NtNcable-latest
babblesim_ext_2G4_channel_multiatt-latest
babblesim_ext_2G4_device_WLAN_actmod-latest
babblesim_ext_2G4_device_burst_interferer-latest
babblesim_ext_2G4_device_playback-latest
babblesim_ext_2G4_libPhyComv1-latest
babblesim_ext_2G4_modem_BLE_simple-latest
babblesim_ext_2G4_modem_magic-latest
babblesim_ext_2G4_phy_v1-latest
babblesim_ext_libCryptov1-latest
bsim-latest
cmsis-latest
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cmsis-nn-latest
cmsis_6-latest
edtt-latest
fatfs-latest
hal_adi-latest
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hal_ti-latest
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hostap-latest
liblc3-latest
libmctp-latest
libmetal-latest
littlefs-latest
loramac-node-latest
lvgl-latest
mbedtls-latest
mcuboot-latest
mipi-sys-t-latest
net-tools-latest
nrf_hw_models-latest
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open-amp-latest
openthread-latest
percepio-latest
picolibc-latest
segger-latest
tinycrypt-latest
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