/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_ll_mdma.c | 66 #define IS_LL_MDMA_BLK_DATALENGTH(__VALUE__) ((__VALUE__) <= 0x00010000U) argument 68 #define IS_LL_MDMA_BLK_REPEATCOUNT(__VALUE__) ((__VALUE__) <= 0x00000FFFU) argument 70 #define IS_LL_MDMA_WORDENDIANESS(__VALUE__) (((__VALUE__) == LL_MDMA_WORD_ENDIANNESS_… argument 71 … ((__VALUE__) == LL_MDMA_WORD_ENDIANNESS_EXCHANGE)) 73 #define IS_LL_MDMA_HALFWORDENDIANESS(__VALUE__) (((__VALUE__) == LL_MDMA_HALFWORD_ENDIANN… argument 74 … ((__VALUE__) == LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE)) 76 #define IS_LL_MDMA_BYTEENDIANESS(__VALUE__) (((__VALUE__) == LL_MDMA_BYTE_ENDIANNESS_… argument 77 … ((__VALUE__) == LL_MDMA_BYTE_ENDIANNESS_EXCHANGE)) 79 #define IS_LL_MDMA_PRIORITY(__VALUE__) (((__VALUE__) == LL_MDMA_PRIORITY_LOW) … argument 80 … ((__VALUE__) == LL_MDMA_PRIORITY_MEDIUM) || \ [all …]
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D | stm32h7xx_ll_spi.c | 48 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) ||… argument 49 ((__VALUE__) == LL_SPI_MODE_SLAVE)) 51 #define IS_LL_SPI_SS_IDLENESS(__VALUE__) (((__VALUE__) == LL_SPI_SS_IDLENESS_00CYCLE) ||… argument 52 … ((__VALUE__) == LL_SPI_SS_IDLENESS_01CYCLE) || \ 53 … ((__VALUE__) == LL_SPI_SS_IDLENESS_02CYCLE) || \ 54 … ((__VALUE__) == LL_SPI_SS_IDLENESS_03CYCLE) || \ 55 … ((__VALUE__) == LL_SPI_SS_IDLENESS_04CYCLE) || \ 56 … ((__VALUE__) == LL_SPI_SS_IDLENESS_05CYCLE) || \ 57 … ((__VALUE__) == LL_SPI_SS_IDLENESS_06CYCLE) || \ 58 … ((__VALUE__) == LL_SPI_SS_IDLENESS_07CYCLE) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_ll_spi.c | 48 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) ||… argument 49 ((__VALUE__) == LL_SPI_MODE_SLAVE)) 51 #define IS_LL_SPI_SS_IDLENESS(__VALUE__) (((__VALUE__) == LL_SPI_SS_IDLENESS_00CYCLE) ||… argument 52 … ((__VALUE__) == LL_SPI_SS_IDLENESS_01CYCLE) || \ 53 … ((__VALUE__) == LL_SPI_SS_IDLENESS_02CYCLE) || \ 54 … ((__VALUE__) == LL_SPI_SS_IDLENESS_03CYCLE) || \ 55 … ((__VALUE__) == LL_SPI_SS_IDLENESS_04CYCLE) || \ 56 … ((__VALUE__) == LL_SPI_SS_IDLENESS_05CYCLE) || \ 57 … ((__VALUE__) == LL_SPI_SS_IDLENESS_06CYCLE) || \ 58 … ((__VALUE__) == LL_SPI_SS_IDLENESS_07CYCLE) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/src/ |
D | stm32mp1xx_ll_spi.c | 51 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) ||… argument 52 ((__VALUE__) == LL_SPI_MODE_SLAVE)) 54 #define IS_LL_SPI_SS_IDLENESS(__VALUE__) (((__VALUE__) == LL_SPI_SS_IDLENESS_00CYCLE) ||… argument 55 … ((__VALUE__) == LL_SPI_SS_IDLENESS_01CYCLE) || \ 56 … ((__VALUE__) == LL_SPI_SS_IDLENESS_02CYCLE) || \ 57 … ((__VALUE__) == LL_SPI_SS_IDLENESS_03CYCLE) || \ 58 … ((__VALUE__) == LL_SPI_SS_IDLENESS_04CYCLE) || \ 59 … ((__VALUE__) == LL_SPI_SS_IDLENESS_05CYCLE) || \ 60 … ((__VALUE__) == LL_SPI_SS_IDLENESS_06CYCLE) || \ 61 … ((__VALUE__) == LL_SPI_SS_IDLENESS_07CYCLE) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_ll_spi.c | 47 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) ||… argument 48 ((__VALUE__) == LL_SPI_MODE_SLAVE)) 50 #define IS_LL_SPI_SS_IDLENESS(__VALUE__) (((__VALUE__) == LL_SPI_SS_IDLENESS_00CYCLE) ||… argument 51 … ((__VALUE__) == LL_SPI_SS_IDLENESS_01CYCLE) || \ 52 … ((__VALUE__) == LL_SPI_SS_IDLENESS_02CYCLE) || \ 53 … ((__VALUE__) == LL_SPI_SS_IDLENESS_03CYCLE) || \ 54 … ((__VALUE__) == LL_SPI_SS_IDLENESS_04CYCLE) || \ 55 … ((__VALUE__) == LL_SPI_SS_IDLENESS_05CYCLE) || \ 56 … ((__VALUE__) == LL_SPI_SS_IDLENESS_06CYCLE) || \ 57 … ((__VALUE__) == LL_SPI_SS_IDLENESS_07CYCLE) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/src/ |
D | stm32wbaxx_ll_spi.c | 47 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) ||… argument 48 ((__VALUE__) == LL_SPI_MODE_SLAVE)) 50 #define IS_LL_SPI_SS_IDLENESS(__VALUE__) (((__VALUE__) == LL_SPI_SS_IDLENESS_00CYCLE) ||… argument 51 … ((__VALUE__) == LL_SPI_SS_IDLENESS_01CYCLE) || \ 52 … ((__VALUE__) == LL_SPI_SS_IDLENESS_02CYCLE) || \ 53 … ((__VALUE__) == LL_SPI_SS_IDLENESS_03CYCLE) || \ 54 … ((__VALUE__) == LL_SPI_SS_IDLENESS_04CYCLE) || \ 55 … ((__VALUE__) == LL_SPI_SS_IDLENESS_05CYCLE) || \ 56 … ((__VALUE__) == LL_SPI_SS_IDLENESS_06CYCLE) || \ 57 … ((__VALUE__) == LL_SPI_SS_IDLENESS_07CYCLE) || \ [all …]
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D | stm32wbaxx_ll_dma.c | 89 #define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_MEMORY_… argument 90 … ((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY) || \ 91 … ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)) 93 #define IS_LL_DMA_DATA_ALIGNMENT(__VALUE__) (((__VALUE__) == LL_DMA_DATA_ALIGN_ZEROPA… argument 94 … ((__VALUE__) == LL_DMA_DATA_ALIGN_SIGNEXTPADD) || \ 95 ((__VALUE__) == LL_DMA_DATA_PACK_UNPACK)) 97 #define IS_LL_DMA_BURST_LENGTH(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= 64… argument 99 #define IS_LL_DMA_SRC_DATA_WIDTH(__VALUE__) (((__VALUE__) == LL_DMA_SRC_DATAWIDTH_BYT… argument 100 … ((__VALUE__) == LL_DMA_SRC_DATAWIDTH_HALFWORD) || \ 101 … ((__VALUE__) == LL_DMA_SRC_DATAWIDTH_WORD)) [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/src/ |
D | stm32f2xx_ll_utils.c | 67 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument 68 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ 69 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ 70 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ 71 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 72 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 73 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ 74 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ 75 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) 77 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/src/ |
D | stm32f4xx_ll_utils.c | 111 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument 112 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ 113 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ 114 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ 115 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 116 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 117 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ 118 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ 119 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) 121 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_ll_utils.c | 82 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument 83 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ 84 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ 85 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ 86 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 87 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 88 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ 89 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ 90 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) 92 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument [all …]
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_tsc.h | 651 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 652 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 653 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 654 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 655 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 656 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 657 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 658 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 659 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 660 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/include/ |
D | stm32f3xx_hal_tsc.h | 629 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 630 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 631 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 632 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 633 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 634 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 635 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 636 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 637 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 638 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f0xx/drivers/include/ |
D | stm32f0xx_hal_tsc.h | 630 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 631 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 632 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 633 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 634 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 635 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 636 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 637 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 638 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 639 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/ |
D | stm32l0xx_hal_tsc.h | 630 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 631 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 632 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 633 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 634 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 635 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 636 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 637 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 638 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 639 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_hal_tsc.h | 629 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 630 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 631 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 632 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 633 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 634 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 635 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 636 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 637 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 638 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_hal_tsc.h | 679 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 680 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 681 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 682 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 683 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 684 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 685 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 686 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 687 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 688 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/src/ |
D | stm32f1xx_ll_utils.c | 67 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument 68 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ 69 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ 70 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ 71 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 72 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 73 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ 74 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ 75 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) 77 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_hal_flash.h | 894 #define IS_FLASH_MAIN_MEM_ADDRESS(__VALUE__) (((__VALUE__) >= FLASH_BASE) &&\ argument 895 … ((__VALUE__) <= (FLASH_BASE + FLASH_SIZE - 1UL))) 897 #define IS_FLASH_FAST_PROGRAM_ADDRESS(__VALUE__) (((__VALUE__) >= FLASH_BASE) &&\ argument 898 … ((__VALUE__) <= (FLASH_BASE + FLASH_SIZE - 256UL)) && (((__VALUE__) % 256UL) == 0UL)) 900 #define IS_FLASH_PROGRAM_MAIN_MEM_ADDRESS(__VALUE__) (((__VALUE__) >= FLASH_BASE) &&\ argument 901 … ((__VALUE__) <= (FLASH_BASE + FLASH_SIZE - 8UL)) && (((__VALUE__) % 8UL) == 0UL)) 903 #define IS_FLASH_PROGRAM_OTP_ADDRESS(__VALUE__) (((__VALUE__) >= OTP_AREA_BASE) &&\ argument 904 … ((__VALUE__) <= (OTP_AREA_END_ADDR + 1UL - 8UL)) && (((__VALUE__) % 8UL) == 0UL)) 906 #define IS_FLASH_PROGRAM_ADDRESS(__VALUE__) (IS_FLASH_PROGRAM_MAIN_MEM_ADDRESS(__VALUE__) |… argument 907 IS_FLASH_PROGRAM_OTP_ADDRESS(__VALUE__)) [all …]
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D | stm32wbxx_hal_tsc.h | 623 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 624 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 625 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 626 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 627 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 628 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 629 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 630 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 631 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 632 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_hal_tsc.h | 613 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \ argument 614 ((__VALUE__) == TSC_CTPH_2CYCLES) || \ 615 ((__VALUE__) == TSC_CTPH_3CYCLES) || \ 616 ((__VALUE__) == TSC_CTPH_4CYCLES) || \ 617 ((__VALUE__) == TSC_CTPH_5CYCLES) || \ 618 ((__VALUE__) == TSC_CTPH_6CYCLES) || \ 619 ((__VALUE__) == TSC_CTPH_7CYCLES) || \ 620 ((__VALUE__) == TSC_CTPH_8CYCLES) || \ 621 ((__VALUE__) == TSC_CTPH_9CYCLES) || \ 622 ((__VALUE__) == TSC_CTPH_10CYCLES) || \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/ |
D | stm32wlxx_hal_flash.h | 911 #define IS_FLASH_MAIN_MEM_ADDRESS(__VALUE__) (((__VALUE__) >= FLASH_BASE) && ((__VALUE__) <=… argument 913 …AST_PROGRAM_ADDRESS(__VALUE__) (((__VALUE__) >= FLASH_BASE) && ((__VALUE__) <= (FLASH_BASE + FL… argument 915 …GRAM_MAIN_MEM_ADDRESS(__VALUE__) (((__VALUE__) >= FLASH_BASE) && ((__VALUE__) <= (FLASH_BASE + F… argument 917 …ROGRAM_OTP_ADDRESS(__VALUE__) (((__VALUE__) >= OTP_AREA_BASE) && ((__VALUE__) <= (OTP_AREA_END… argument 919 …_FLASH_PROGRAM_ADDRESS(__VALUE__) (IS_FLASH_PROGRAM_MAIN_MEM_ADDRESS(__VALUE__) || IS_FLAS… argument 921 #define IS_FLASH_PAGE(__VALUE__) ((__VALUE__) < FLASH_PAGE_NB) argument 923 #define IS_ADDR_ALIGNED_64BITS(__VALUE__) (((__VALUE__) & 0x7U) == (0x00UL)) argument 925 #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES) || \ argument 926 ((__VALUE__) == FLASH_TYPEERASE_MASSERASE)) 928 #define IS_FLASH_TYPEPROGRAM(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAM_DOUBLEWORD) … argument [all …]
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/src/ |
D | stm32g0xx_ll_spi.c | 62 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument 63 || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 64 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 65 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 67 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument 68 || ((__VALUE__) == LL_SPI_MODE_SLAVE)) 70 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \ argument 71 || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \ 72 || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \ 73 || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/src/ |
D | stm32wlxx_ll_spi.c | 62 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument 63 || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 64 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 65 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 67 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument 68 || ((__VALUE__) == LL_SPI_MODE_SLAVE)) 70 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \ argument 71 || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \ 72 || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \ 73 || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f0xx/drivers/src/ |
D | stm32f0xx_ll_spi.c | 62 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument 63 || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 64 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 65 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 67 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument 68 || ((__VALUE__) == LL_SPI_MODE_SLAVE)) 70 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \ argument 71 || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \ 72 || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \ 73 || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \ [all …]
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/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/src/ |
D | stm32c0xx_ll_spi.c | 62 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument 63 || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 64 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 65 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 67 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument 68 || ((__VALUE__) == LL_SPI_MODE_SLAVE)) 70 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \ argument 71 || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \ 72 || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \ 73 || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \ [all …]
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