Searched +full:port +full:- +full:irq12 +full:- +full:pins (Results 1 – 16 of 16) sorted by relevance
/Zephyr-latest/dts/bindings/gpio/ |
D | renesas,ra-gpio.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 compatible: "renesas,ra-gpio" 8 include: [gpio-controller.yaml, base.yaml] 14 port-irq0-pins: 16 description: Pins allow to assign port-irq0 18 port-irq1-pins: 20 description: Pins allow to assign port-irq1 22 port-irq2-pins: 24 description: Pins allow to assign port-irq2 26 port-irq3-pins: [all …]
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D | renesas,ra-gpio-ioport.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Renesas RA GPIO IO port 6 compatible: "renesas,ra-gpio-ioport" 8 include: [gpio-controller.yaml, base.yaml] 14 port: 20 description: Array of vbatt pin on port 22 port-irqs: 23 type: phandle-array 24 description: Port irq which this port can be use 26 port-irq-names: [all …]
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/Zephyr-latest/dts/arm/renesas/ra/ra6/ |
D | r7fa6m1ad3cfp.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <zephyr/dt-bindings/clock/ra_clock.h> 8 #include <arm/renesas/ra/ra6/ra6-cm4-common.dtsi> 13 compatible = "mmio-sram"; 17 flash-controller@407e0000 { 19 #address-cells = <1>; 20 #size-cells = <1>; 23 compatible = "soc-nv-flash"; 29 compatible = "renesas,ra-sce7-rng"; 34 channel-count = <11>; [all …]
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D | r7fa6m2ax.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra6/ra6-cm4-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 9 #include <zephyr/dt-bindings/pwm/ra_pwm.h> 14 compatible = "mmio-sram"; 19 compatible = "renesas,ra-sci"; 21 interrupt-names = "rxi", "txi", "tei", "eri"; 26 compatible = "renesas,ra-sci-uart"; 33 compatible = "renesas,ra-sci"; 35 interrupt-names = "rxi", "txi", "tei", "eri"; [all …]
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D | r7fa6m3ax.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra6/ra6-cm4-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 9 #include <zephyr/dt-bindings/pwm/ra_pwm.h> 14 compatible = "mmio-sram"; 19 compatible = "renesas,ra-gpio-ioport"; 21 port = <8>; 22 gpio-controller; 23 #gpio-cells = <2>; 29 compatible = "renesas,ra-gpio-ioport"; [all …]
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D | r7fa6e10x.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra6/ra6-cm33-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 9 #include <zephyr/dt-bindings/pwm/ra_pwm.h> 11 /delete-node/ &adc1; 16 compatible = "mmio-sram"; 21 compatible = "renesas,ra-gpio-ioport"; 23 port = <6>; 24 gpio-controller; 25 #gpio-cells = <2>; [all …]
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D | r7fa6m4ax.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra6/ra6-cm33-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 9 #include <zephyr/dt-bindings/pwm/ra_pwm.h> 14 compatible = "mmio-sram"; 19 compatible = "renesas,ra-sci"; 21 interrupt-names = "rxi", "txi", "tei", "eri"; 26 compatible = "renesas,ra-sci-uart"; 33 compatible = "renesas,ra-sci"; 35 interrupt-names = "rxi", "txi", "tei", "eri"; [all …]
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D | r7fa6m5xh.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra6/ra6-cm33-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 9 #include <zephyr/dt-bindings/pwm/ra_pwm.h> 14 compatible = "mmio-sram"; 19 compatible = "renesas,ra-gpio-ioport"; 21 port = <6>; 22 gpio-controller; 23 #gpio-cells = <2>; 29 compatible = "renesas,ra-gpio-ioport"; [all …]
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D | r7fa6e2bx.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra6/ra6-cm33-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 10 /delete-node/ &agt0; 11 /delete-node/ &agt1; 12 /delete-node/ &agt2; 13 /delete-node/ &agt3; 14 /delete-node/ &agt4; 15 /delete-node/ &agt5; 16 #include <zephyr/dt-bindings/pwm/ra_pwm.h> [all …]
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/Zephyr-latest/dts/arm/renesas/ra/ra4/ |
D | r7fa4m3ax.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 9 #include <zephyr/dt-bindings/pwm/ra_pwm.h> 11 /delete-node/ &spi1; 16 compatible = "mmio-sram"; 21 compatible = "renesas,ra-gpio-ioport"; 23 port = <6>; 24 gpio-controller; 25 #gpio-cells = <2>; [all …]
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D | r7fa4m2ax.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi> 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 9 #include <zephyr/dt-bindings/pwm/ra_pwm.h> 11 /delete-node/ &spi1; 13 /delete-node/ &adc1; 18 compatible = "mmio-sram"; 23 compatible = "renesas,ra-gpio-ioport"; 25 port = <6>; 26 gpio-controller; [all …]
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D | r7fa4e2b93cfm.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <zephyr/dt-bindings/clock/ra_clock.h> 8 #include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi> 10 /delete-node/ &agt0; 11 /delete-node/ &agt1; 12 /delete-node/ &agt2; 13 /delete-node/ &agt3; 14 /delete-node/ &agt4; 15 /delete-node/ &agt5; 16 /delete-node/ &iic0; [all …]
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/Zephyr-latest/dts/arm/renesas/ra/ra8/ |
D | r7fa8m1xh.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 xtal: clock-main-osc { 16 compatible = "renesas,ra-cgc-external-clock"; 17 clock-frequency = <DT_FREQ_M(20)>; 18 #clock-cells = <0>; 22 hoco: clock-hoco { 23 compatible = "fixed-clock"; [all …]
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D | r7fa8t1xh.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 xtal: clock-main-osc { 16 compatible = "renesas,ra-cgc-external-clock"; 17 clock-frequency = <DT_FREQ_M(24)>; 18 #clock-cells = <0>; 22 hoco: clock-hoco { 23 compatible = "fixed-clock"; [all …]
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D | r7fa8d1xh.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/clock/ra_clock.h> 12 sdram: sdram-controller@40002000 { 13 compatible = "renesas,ra-sdram"; 14 #address-cells = <1>; 15 #size-cells = <0>; 20 lcdif: display-controller@40342000 { 21 compatible = "renesas,ra-glcdc"; 25 interrupt-names = "line"; 30 compatible = "renesas,ra-mipi-dsi"; [all …]
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/Zephyr-latest/dts/arm/renesas/ra/ |
D | ra-cm4-common.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/interrupt-controller/renesas-ra-icu.h> 11 #include <zephyr/dt-bindings/clock/ra_clock.h> 15 #address-cells = <1>; 16 #size-cells = <0>; 20 compatible = "arm,cortex-m4"; 26 xtal: clock-main-osc { 27 compatible = "renesas,ra-cgc-external-clock"; 28 clock-frequency = <1200000>; [all …]
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