Home
last modified time | relevance | path

Searched +full:100 +full:mhz (Results 1 – 25 of 258) sorted by relevance

1234567891011

/Zephyr-latest/boards/nxp/mimxrt1024_evk/
Dmimxrt1024_evk-pinctrl.dtsi19 nxp,speed = "100-mhz";
29 nxp,speed = "50-mhz";
41 bias-pull-up-value = "100k";
43 nxp,speed = "200-mhz";
49 nxp,speed = "100-mhz";
59 bias-pull-up-value = "100k";
61 nxp,speed = "200-mhz";
67 bias-pull-up-value = "100k";
69 nxp,speed = "100-mhz";
75 bias-pull-up-value = "100k";
[all …]
/Zephyr-latest/boards/pjrc/teensy4/
Dteensy4-pinctrl.dtsi20 nxp,speed = "100-mhz";
33 bias-pull-up-value = "100k";
35 nxp,speed = "200-mhz";
47 bias-pull-up-value = "100k";
49 nxp,speed = "200-mhz";
60 nxp,speed = "100-mhz";
72 nxp,speed = "100-mhz";
84 nxp,speed = "100-mhz";
97 nxp,speed = "100-mhz";
110 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1020_evk/
Dmimxrt1020_evk-pinctrl.dtsi19 nxp,speed = "100-mhz";
30 nxp,speed = "50-mhz";
42 bias-pull-up-value = "100k";
44 nxp,speed = "200-mhz";
50 nxp,speed = "100-mhz";
60 bias-pull-up-value = "100k";
62 nxp,speed = "200-mhz";
68 bias-pull-up-value = "100k";
70 nxp,speed = "100-mhz";
76 bias-pull-up-value = "100k";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1064_evk/
Dmimxrt1064_evk-pinctrl.dtsi20 nxp,speed = "100-mhz";
30 bias-pull-down-value = "100k";
32 nxp,speed = "100-mhz";
49 nxp,speed = "100-mhz";
59 nxp,speed = "50-mhz";
72 bias-pull-up-value = "100k";
74 nxp,speed = "200-mhz";
86 bias-pull-up-value = "100k";
88 nxp,speed = "200-mhz";
98 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1062_fmurt6/
Dmimxrt1062_fmurt6-pinctrl.dtsi19 nxp,speed = "100-mhz";
28 nxp,speed = "50-mhz";
29 bias-pull-down-value = "100k";
41 bias-pull-up-value = "100k";
43 nxp,speed = "200-mhz";
47 bias-pull-down-value = "100k";
50 nxp,speed = "200-mhz";
56 bias-pull-up-value = "100k";
58 nxp,speed = "50-mhz";
68 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1015_evk/
Dmimxrt1015_evk-pinctrl.dtsi19 nxp,speed = "100-mhz";
30 nxp,speed = "100-mhz";
43 nxp,speed = "100-mhz";
53 nxp,speed = "100-mhz";
62 bias-pull-up-value = "100k";
64 nxp,speed = "100-mhz";
70 nxp,speed = "100-mhz";
80 nxp,speed = "100-mhz";
89 bias-pull-up-value = "100k";
91 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1060_evk/
Dmimxrt1060_evk-pinctrl.dtsi20 nxp,speed = "100-mhz";
30 bias-pull-down-value = "100k";
32 nxp,speed = "100-mhz";
49 nxp,speed = "100-mhz";
59 nxp,speed = "50-mhz";
72 bias-pull-up-value = "100k";
74 nxp,speed = "200-mhz";
86 bias-pull-up-value = "100k";
88 nxp,speed = "200-mhz";
98 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1050_evk/
Dmimxrt1050_evk-pinctrl.dtsi20 nxp,speed = "100-mhz";
30 bias-pull-down-value = "100k";
32 nxp,speed = "100-mhz";
49 nxp,speed = "100-mhz";
59 nxp,speed = "50-mhz";
72 bias-pull-up-value = "100k";
74 nxp,speed = "200-mhz";
86 bias-pull-up-value = "100k";
88 nxp,speed = "200-mhz";
98 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/madmachine/mm_swiftio/
Dmm_swiftio-pinctrl.dtsi28 nxp,speed = "100-mhz";
39 nxp,speed = "100-mhz";
51 nxp,speed = "100-mhz";
61 nxp,speed = "100-mhz";
70 bias-pull-up-value = "100k";
72 nxp,speed = "100-mhz";
78 nxp,speed = "100-mhz";
89 nxp,speed = "100-mhz";
103 nxp,speed = "100-mhz";
112 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1010_evk/
Dmimxrt1010_evk-pinctrl.dtsi19 nxp,speed = "100-mhz";
29 nxp,speed = "100-mhz";
42 nxp,speed = "100-mhz";
53 nxp,speed = "100-mhz";
62 bias-pull-up-value = "100k";
64 nxp,speed = "100-mhz";
70 nxp,speed = "100-mhz";
81 nxp,speed = "100-mhz";
91 bias-pull-up-value = "100k";
93 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/madmachine/mm_feather/
Dmm_feather-pinctrl.dtsi19 nxp,speed = "100-mhz";
31 nxp,speed = "100-mhz";
41 nxp,speed = "100-mhz";
50 bias-pull-up-value = "100k";
52 nxp,speed = "100-mhz";
58 nxp,speed = "100-mhz";
69 nxp,speed = "100-mhz";
83 nxp,speed = "100-mhz";
92 nxp,speed = "100-mhz";
98 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/nxp/mimxrt1040_evk/
Dmimxrt1040_evk-pinctrl.dtsi19 nxp,speed = "100-mhz";
29 nxp,speed = "100-mhz";
41 nxp,speed = "100-mhz";
53 nxp,speed = "100-mhz";
66 nxp,speed = "100-mhz";
76 nxp,speed = "100-mhz";
85 bias-pull-up-value = "100k";
87 nxp,speed = "50-mhz";
93 nxp,speed = "100-mhz";
105 nxp,speed = "100-mhz";
[all …]
/Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/
Dcy8ckit_062s2_ai.dts61 /* CM4 core clock = 100MHz
62 * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
68 /* CM0+ core clock = 50MHz
69 * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
75 /* PERI core clock = 100MHz
76 * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
/Zephyr-latest/boards/infineon/cy8cproto_063_ble/
Dcy8cproto_063_ble.dts103 /* CM4 core clock = 100MHz
104 * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
110 /* CM0+ core clock = 50MHz
111 * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
117 /* PERI core clock = 100MHz
118 * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
/Zephyr-latest/dts/bindings/clock/
Dnuvoton,npcm-pcc.yaml14 clock-frequency = <DT_FREQ_M(96)>; /* OFMCLK runs at 96MHz */
15 core-prescaler = <1>; /* CORE_CLK runs at 96MHz */
16 apb1-prescaler = <8>; /* APB1_CLK runs at 12MHz */
17 apb2-prescaler = <1>; /* APB2_CLK runs at 96MHz */
18 apb3-prescaler = <1>; /* APB3_CLK runs at 96MHz */
19 apb6-prescaler = <1>; /* APB6_CLK runs at 96MHz */
20 fiu-prescaler = <1>; /* FIU_CLK runs at 96MHz */
21 i3c-prescaler = <1>; /* I3C_CLK runs at 96MHz */
38 100000000, 100 MHz
39 96000000, 96 MHz
[all …]
Dnuvoton,npcx-pcc.yaml14 clock-frequency = <DT_FREQ_M(100)>; /* OFMCLK runs at 100MHz */
15 core-prescaler = <5>; /* CORE_CLK runs at 20MHz */
16 apb1-prescaler = <5>; /* APB1_CLK runs at 20MHz */
17 apb2-prescaler = <5>; /* APB2_CLK runs at 20MHz */
18 apb3-prescaler = <5>; /* APB3_CLK runs at 20MHz */
35 120000000, 120 MHz
36 100000000, 100 MHz
37 96000000, 96 MHz
38 90000000, 90 MHz
39 80000000, 80 MHz
[all …]
Dst,stm32u5-msi-clock.yaml22 - 0 # range 0 around 48 MHz
23 - 1 # range 1 around 24 MHz
24 - 2 # range 2 around 16 MHz
25 - 3 # range 3 around 12 MHz
26 - 4 # range 4 around 4 MHz (reset value)
27 - 5 # range 5 around 2 MHz
28 - 6 # range 6 around 1.33 MHz
29 - 7 # range 7 around 1 MHz
30 - 8 # range 8 around 3.072 MHz
31 - 9 # range 9 around 1.536 MHz
[all …]
Dst,stm32-msi-clock.yaml18 - 0 # range 0 around 100 kHz
23 - 5 # range 5 around 2 MHz
24 - 6 # range 6 around 4 MHz (reset value)
25 - 7 # range 7 around 8 MHz
26 - 8 # range 8 around 16 MHz
27 - 9 # range 9 around 24 MHz
28 - 10 # range 10 around 32 MHz
29 - 11 # range 11 around 48 MHz
/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,mcux-rt-pinctrl.yaml17 nxp,speed = "100-mhz";
22 slow slew rate, and 100 MHZ speed.
97 100 DSE_4_R0_4 — 39 Ohm @3.3V, 65 Ohm @1.8V
107 - "100k"
116 10 PUS_2_100K_Ohm_Pull_Up — 100K Ohm Pull Up
121 default: "100k"
123 - "100k"
126 Corresponds to the PUS field in the IOMUXC peripheral. 100k is
128 00 PUS_0_100K_Ohm_Pull_Down - 100K Ohm Pull Down
142 - "50-mhz"
[all …]
Dnxp,s32ze-pinctrl.yaml102 0: FMAX_3318 = 208 MHz (at 1.8 V), 166 MHz (at 3.3 V)
103 4: FMAX_3318 = 166 MHz (at 1.8 V), 150 MHz (at 3.3 V)
104 5: FMAX_3318 = 150 MHz (at 1.8 V), 133 MHz (at 3.3 V)
105 6: FMAX_3318 = 133 MHz (at 1.8 V), 100 MHz (at 3.3 V)
106 7: FMAX_3318 = 100 MHz (at 1.8 V), 83 MHz (at 3.3 V)
108 0: FMAX_18 = 208 MHz
109 4: FMAX_18 = 150 MHz
110 5: FMAX_18 = 133 MHz
111 6: FMAX_18 = 100 MHz
112 7: FMAX_18 = 50 MHz
[all …]
/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/
Dcy8cproto_062_4343w.dts110 /* CM4 core clock = 100MHz
111 * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
117 /* CM0+ core clock = 50MHz
118 * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
124 /* PERI core clock = 100MHz
125 * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
/Zephyr-latest/boards/shields/st_b_lcd40_dsi1_mb1166/boards/
Dstm32h747i_disco_stm32h747xx_m7.overlay28 div-r = <24>; /* 27.5 MHz */
37 * = 25 MHz / 5 * 2 * 100 / 2 / (1<<0) / 8 = 62.5 MHz
39 pll-ndiv = <100>;
/Zephyr-latest/boards/intel/ish/
DKconfig.defconfig13 default 2000 if APIC_TIMER_TSC # APIC timer's frequency is 19.2 MHZ or 100 MHZ
/Zephyr-latest/soc/snps/arc_iot/
Dsysconf.c11 #define SYSCLK_DEFAULT_IOSC_HZ MHZ(16)
30 /* the following configuration is based on Fin = 16 Mhz */
32 {100, PLL_CONF_VAL(1, 25, 2)}, /* 100 Mhz */
33 {50, PLL_CONF_VAL(1, 25, 3)}, /* 50 Mhz */
34 {150, PLL_CONF_VAL(4, 75, 1)}, /* 150 Mhz */
35 {75, PLL_CONF_VAL(4, 75, 2)}, /* 75 Mhz */
36 {25, PLL_CONF_VAL(2, 25, 3)}, /* 25 Mhz */
37 {72, PLL_CONF_VAL(8, 144, 2)}, /* 72 Mhz */
38 {144, PLL_CONF_VAL(8, 144, 1)}, /* 144 Mhz */
51 * 1 Mhz <= Fref <= 50 Mhz
[all …]
/Zephyr-latest/soc/xlnx/zynq7000/xc7zxxxs/
DKconfig.soc20 1 ARM Cortex-A9 core up to 766 MHz, Artix-7 programmable logic,
21 23k logic cells, 1.8 Mb block RAM, 60 DSP slices, up to 100 I/O pins.
27 1 ARM Cortex-A9 core up to 766 MHz, Artix-7 programmable logic,
35 1 ARM Cortex-A9 core up to 766 MHz, Artix-7 programmable logic,

1234567891011