1/*
2 * SPDX-License-Identifier: Apache-2.0
3 * Copyright 2023 NXP
4 *
5 */
6
7#include <nxp/nxp_imx/rt/mimxrt1062dvl6a-pinctrl.dtsi>
8
9/* Flash RESET pin is DNP here unlike RT1050 */
10
11&pinctrl {
12	/* ADC1 inputs 0 and 15 */
13	pinmux_adc1: pinmux_adc1 {
14		group0 {
15			pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>;
16			bias-disable;
17			drive-strength = "r0-6";
18			slew-rate = "slow";
19			nxp,speed = "100-mhz";
20		};
21	};
22
23	pinmux_enet: pinmux_enet {
24		group0 {
25			pinmux = <&iomuxc_gpio_b0_15_enet2_ref_clk2>;
26			drive-strength = "r0-6";
27			slew-rate = "fast";
28			nxp,speed = "50-mhz";
29			bias-pull-down-value = "100k";
30			input-enable;
31		};
32		group1 {
33			pinmux = <&iomuxc_gpio_b1_01_enet2_rx_data0>,
34				<&iomuxc_gpio_b1_02_enet2_rx_data1>,
35				<&iomuxc_gpio_b1_03_enet2_rx_en>,
36				<&iomuxc_gpio_b0_12_enet2_tx_data0>,
37				<&iomuxc_gpio_b0_13_enet2_tx_data1>,
38				<&iomuxc_gpio_b0_14_enet2_tx_en>,
39				<&iomuxc_gpio_b0_00_enet2_mdc>;
40			drive-strength = "r0-5";
41			bias-pull-up-value = "100k";
42			slew-rate = "fast";
43			nxp,speed = "200-mhz";
44		};
45		group2 {
46			pinmux = <&iomuxc_gpio_b1_00_enet2_rx_er>;
47			bias-pull-down-value = "100k";
48			drive-strength = "r0-5";
49			slew-rate = "fast";
50			nxp,speed = "200-mhz";
51		};
52		group3 {
53			pinmux = <&iomuxc_gpio_b0_01_enet2_mdio>;
54			drive-strength = "r0-5";
55			drive-open-drain;
56			bias-pull-up-value = "100k";
57			slew-rate = "fast";
58			nxp,speed = "50-mhz";
59		};
60	};
61
62	pinmux_flexcan1: pinmux_flexcan1 {
63		group0 {
64			pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>,
65				<&iomuxc_gpio_b0_03_flexcan1_rx>;
66			drive-strength = "r0-6";
67			slew-rate = "slow";
68			nxp,speed = "100-mhz";
69		};
70	};
71
72	pinmux_flexcan2: pinmux_flexcan2 {
73		group0 {
74			pinmux = <&iomuxc_gpio_ad_b0_02_flexcan2_tx>,
75				<&iomuxc_gpio_ad_b0_03_flexcan2_rx>;
76			drive-strength = "r0-6";
77			slew-rate = "slow";
78			nxp,speed = "100-mhz";
79		};
80	};
81
82	pinmux_flexcan3: pinmux_flexcan3 {
83		group0 {
84			pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>,
85				<&iomuxc_gpio_ad_b0_11_flexcan3_rx>;
86			drive-strength = "r0-6";
87			slew-rate = "slow";
88			nxp,speed = "100-mhz";
89		};
90	};
91
92	/* pwm pins for fmu and io ports */
93	pinmux_flexpwm_fmu_ch1: pinmux_flexpwm_fmu_ch1 {
94		group0 {
95			pinmux = <&iomuxc_gpio_b0_06_flexpwm2_pwma0>;
96
97			drive-strength = "r0-7";
98			slew-rate = "fast";
99			nxp,speed = "200-mhz";
100		};
101	};
102
103	pinmux_flexpwm_fmu_ch2: pinmux_flexpwm_fmu_ch2 {
104		group0 {
105			pinmux = <&iomuxc_gpio_emc_08_flexpwm2_pwma1>;
106
107			drive-strength = "r0-7";
108			slew-rate = "fast";
109			nxp,speed = "200-mhz";
110		};
111	};
112
113	pinmux_flexpwm_fmu_ch3: pinmux_flexpwm_fmu_ch3 {
114		group0 {
115			pinmux = <&iomuxc_gpio_emc_10_flexpwm2_pwma2>;
116
117			drive-strength = "r0-7";
118			slew-rate = "fast";
119			nxp,speed = "200-mhz";
120		};
121	};
122
123	pinmux_flexpwm_fmu_ch4: pinmux_flexpwm_fmu_ch4 {
124		group0 {
125			pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>;
126
127			drive-strength = "r0-7";
128			slew-rate = "fast";
129			nxp,speed = "200-mhz";
130		};
131	};
132
133	pinmux_flexpwm_fmu_ch5: pinmux_flexpwm_fmu_ch5 {
134		group0 {
135			pinmux = <&iomuxc_gpio_emc_33_flexpwm3_pwma2>;
136
137			drive-strength = "r0-7";
138			slew-rate = "fast";
139			nxp,speed = "200-mhz";
140		};
141	};
142
143	pinmux_flexpwm_fmu_ch6: pinmux_flexpwm_fmu_ch6 {
144		group0 {
145			pinmux = <&iomuxc_gpio_emc_30_flexpwm3_pwmb0>;
146
147			drive-strength = "r0-7";
148			slew-rate = "fast";
149			nxp,speed = "200-mhz";
150		};
151	};
152
153	pinmux_flexpwm_fmu_ch7: pinmux_flexpwm_fmu_ch7 {
154		group0 {
155			pinmux = <&iomuxc_gpio_emc_04_flexpwm4_pwma2>;
156
157			drive-strength = "r0-7";
158			slew-rate = "fast";
159			nxp,speed = "200-mhz";
160		};
161	};
162
163	pinmux_flexpwm_fmu_ch8: pinmux_flexpwm_fmu_ch8 {
164		group0 {
165			pinmux = <&iomuxc_gpio_emc_01_flexpwm4_pwmb0>;
166
167			drive-strength = "r0-7";
168			slew-rate = "fast";
169			nxp,speed = "200-mhz";
170		};
171	};
172
173	pinmux_fmu_ppm_rc: pinmux_fmu_ppm_rc {
174		group0 {
175			pinmux = <&iomuxc_gpio_b1_06_gpt1_capture2>;
176
177			drive-strength = "disabled";
178			bias-pull-up;
179			bias-pull-up-value = "47k";
180			slew-rate = "fast";
181			input-enable;
182		};
183	};
184
185	pinmux_flexspi1: pinmux_flexspi1 {
186		group0 {
187			pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>;
188			drive-strength = "r0-6";
189			input-schmitt-enable;
190			bias-pull-down;
191			bias-pull-down-value = "100k";
192			slew-rate = "fast";
193			nxp,speed = "200-mhz";
194			input-enable;
195		};
196		group1 {
197			pinmux = <&iomuxc_gpio_sd_b1_03_flexspi_b_data0>,
198				<&iomuxc_gpio_sd_b1_00_flexspi_b_data3>,
199				<&iomuxc_gpio_sd_b1_01_flexspi_b_data2>,
200				<&iomuxc_gpio_sd_b1_02_flexspi_b_data1>,
201				<&iomuxc_gpio_sd_b1_04_flexspi_b_sclk>,
202				<&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>,
203				<&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>,
204				<&iomuxc_gpio_sd_b1_08_flexspi_a_data0>,
205				<&iomuxc_gpio_sd_b1_09_flexspi_a_data1>,
206				<&iomuxc_gpio_sd_b1_10_flexspi_a_data2>,
207				<&iomuxc_gpio_sd_b1_11_flexspi_a_data3>;
208			drive-strength = "r0-6";
209			slew-rate = "fast";
210			nxp,speed = "200-mhz";
211			input-enable;
212		};
213	};
214
215	/* Configures pin routing and optionally pin electrical features. */
216	pinmux_lpi2c1: pinmux_lpi2c1 {
217		group0 {
218			pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
219				<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
220			drive-strength = "r0-6";
221			drive-open-drain;
222			slew-rate = "slow";
223			nxp,speed = "100-mhz";
224			input-enable;
225		};
226	};
227
228	pinmux_lpi2c2: pinmux_lpi2c2 {
229		group0 {
230			pinmux = <&iomuxc_gpio_b0_05_lpi2c2_sda>,
231				<&iomuxc_gpio_b0_04_lpi2c2_scl>;
232			drive-strength = "r0-7";
233			drive-open-drain;
234			slew-rate = "slow";
235			nxp,speed = "100-mhz";
236			input-enable;
237		};
238	};
239
240	pinmux_lpi2c3: pinmux_lpi2c3 {
241		group0 {
242			pinmux = <&iomuxc_gpio_emc_21_lpi2c3_sda>,
243				<&iomuxc_gpio_emc_22_lpi2c3_scl>;
244			drive-strength = "r0-7";
245			drive-open-drain;
246			slew-rate = "slow";
247			nxp,speed = "100-mhz";
248			input-enable;
249		};
250	};
251
252	pinmux_lpi2c4: pinmux_lpi2c4 {
253		group0 {
254			pinmux = <&iomuxc_gpio_ad_b0_13_lpi2c4_sda>,
255				<&iomuxc_gpio_ad_b0_12_lpi2c4_scl>;
256			drive-strength = "r0-6";
257			drive-open-drain;
258			slew-rate = "slow";
259			nxp,speed = "100-mhz";
260			input-enable;
261		};
262	};
263
264	/* SPI1 SENSOR - ICM20602 */
265	pinmux_lpspi1: pinmux_lpspi1 {
266		group0 {
267			pinmux = <&iomuxc_gpio_emc_37_gpio3_io23>,
268				<&iomuxc_gpio_emc_27_lpspi1_sck>,
269				<&iomuxc_gpio_emc_29_lpspi1_sdi>,
270				<&iomuxc_gpio_emc_28_lpspi1_sdo>,
271				<&iomuxc_gpio_emc_12_gpio4_io12>;
272			drive-strength = "r0-7";
273			slew-rate = "fast";
274			nxp,speed = "100-mhz";
275			bias-pull-up-value = "47k";
276		};
277	};
278
279	/* SPI2 SENSOR - ISM330 */
280	pinmux_lpspi2: pinmux_lpspi2 {
281		group0 {
282			pinmux = <&iomuxc_gpio_emc_34_gpio3_io20>,
283				<&iomuxc_gpio_emc_00_lpspi2_sck>,
284				<&iomuxc_gpio_emc_03_lpspi2_sdi>,
285				<&iomuxc_gpio_emc_02_lpspi2_sdo>;
286			drive-strength = "r0-6";
287			slew-rate = "slow";
288			nxp,speed = "100-mhz";
289		};
290	};
291
292	/* SPI3 SENSOR - BMI088 */
293	pinmux_lpspi3: pinmux_lpspi3 {
294		group0 {
295			pinmux = <&iomuxc_gpio_b1_15_gpio2_io31>,
296				<&iomuxc_gpio_b1_10_gpio2_io26>,
297				<&iomuxc_gpio_ad_b1_15_lpspi3_sck>,
298				<&iomuxc_gpio_ad_b1_13_lpspi3_sdi>,
299				<&iomuxc_gpio_ad_b1_14_lpspi3_sdo>,
300				<&iomuxc_gpio_emc_16_gpio4_io16>;
301			drive-strength = "r0-6";
302			slew-rate = "slow";
303			nxp,speed = "100-mhz";
304		};
305	};
306
307	/* FRAM */
308	pinmux_lpspi4: pinmux_lpspi4 {
309		group0 {
310			pinmux = <&iomuxc_gpio_b1_14_gpio2_io30>,
311				<&iomuxc_gpio_b1_07_lpspi4_sck>,
312				<&iomuxc_gpio_b1_05_lpspi4_sdi>,
313				<&iomuxc_gpio_b0_02_lpspi4_sdo>;
314			drive-strength = "r0-6";
315			slew-rate = "slow";
316			nxp,speed = "200-mhz";
317		};
318	};
319
320	/* FMU CONSOLE */
321	pinmux_lpuart7: pinmux_lpuart7 {
322		group0 {
323			pinmux = <&iomuxc_gpio_emc_32_lpuart7_rx>,
324				<&iomuxc_gpio_emc_31_lpuart7_tx>;
325			drive-strength = "r0-6";
326			bias-pull-up;
327			bias-pull-up-value = "100k";
328			slew-rate = "slow";
329			nxp,speed = "100-mhz";
330		};
331	};
332
333	pinmux_lpuart7_sleep: pinmux_lpuart7_sleep {
334		group0 {
335			pinmux = <&iomuxc_gpio_emc_32_lpuart7_rx>,
336				<&iomuxc_gpio_emc_31_lpuart7_tx>;
337			drive-strength = "r0";
338			bias-pull-up;
339			bias-pull-up-value = "100k";
340			slew-rate = "slow";
341			nxp,speed = "50-mhz";
342		};
343	};
344
345	pinmux_lpuart2: pinmux_lpuart2 {
346		group0 {
347			pinmux = <&iomuxc_gpio_ad_b1_02_lpuart2_tx>,
348				<&iomuxc_gpio_ad_b1_03_lpuart2_rx>;
349			drive-strength = "r0-6";
350			slew-rate = "slow";
351			nxp,speed = "100-mhz";
352		};
353	};
354
355	pinmux_lpuart2_sleep: pinmux_lpuart2_sleep {
356		group0 {
357			pinmux = <&iomuxc_gpio_ad_b1_03_lpuart2_rx>;
358			drive-strength = "r0";
359			bias-pull-up;
360			bias-pull-up-value = "100k";
361			slew-rate = "slow";
362			nxp,speed = "100-mhz";
363		};
364		group1 {
365			pinmux = <&iomuxc_gpio_ad_b1_02_lpuart2_tx>;
366			drive-strength = "r0-6";
367			slew-rate = "slow";
368			nxp,speed = "100-mhz";
369		};
370	};
371
372	pinmux_lpuart3: pinmux_lpuart3 {
373		group0 {
374			pinmux = <&iomuxc_gpio_b0_08_lpuart3_tx>,
375				<&iomuxc_gpio_b0_09_lpuart3_rx>;
376			drive-strength = "r0-6";
377			slew-rate = "slow";
378			nxp,speed = "100-mhz";
379		};
380	};
381
382	/* Flow control for lpuart3 */
383	pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control {
384		group0 {
385			pinmux = <&iomuxc_gpio_b0_08_lpuart3_tx>,
386				<&iomuxc_gpio_b0_09_lpuart3_rx>,
387				<&iomuxc_gpio_sd_b1_04_gpio3_io04>,
388				<&iomuxc_gpio_emc_24_gpio4_io24>;
389			drive-strength = "r0-6";
390			slew-rate = "slow";
391			nxp,speed = "100-mhz";
392		};
393	};
394
395	pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
396		group0 {
397			pinmux = <&iomuxc_gpio_b0_09_lpuart3_rx>;
398			drive-strength = "r0";
399			bias-pull-up;
400			bias-pull-up-value = "100k";
401			slew-rate = "slow";
402			nxp,speed = "100-mhz";
403		};
404		group1 {
405			pinmux = <&iomuxc_gpio_b0_08_lpuart3_tx>;
406			drive-strength = "r0-6";
407			slew-rate = "slow";
408			nxp,speed = "100-mhz";
409		};
410	};
411
412	pinmux_lpuart5: pinmux_lpuart5 {
413		group0 {
414			pinmux = <&iomuxc_gpio_emc_23_lpuart5_tx>,
415				<&iomuxc_gpio_b1_13_lpuart5_rx>;
416			drive-strength = "r0-6";
417			slew-rate = "slow";
418			nxp,speed = "100-mhz";
419		};
420	};
421
422	pinmux_lpuart5_sleep: pinmux_lpuart5_sleep {
423		group0 {
424			pinmux = <&iomuxc_gpio_b1_13_lpuart5_rx>;
425			drive-strength = "r0";
426			bias-pull-up;
427			bias-pull-up-value = "100k";
428			slew-rate = "slow";
429			nxp,speed = "100-mhz";
430		};
431		group1 {
432			pinmux = <&iomuxc_gpio_emc_23_lpuart5_tx>;
433			drive-strength = "r0-6";
434			slew-rate = "slow";
435			nxp,speed = "100-mhz";
436		};
437	};
438
439	pinmux_ptp: pinmux_ptp {
440		group0 {
441			pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
442				<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
443			drive-strength = "r0-6";
444			slew-rate = "slow";
445			nxp,speed = "100-mhz";
446		};
447	};
448
449	/* Note SWO is configured with a cpu frequency of 132MHz and SWO frequency of 7500KHz */
450	pinmux_swo: pinmux_swo {
451		group0 {
452			pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>;
453			bias-disable;
454			drive-strength = "r0-7";
455			slew-rate = "fast";
456			nxp,speed = "200-mhz";
457		};
458	};
459
460	pinmux_usdhc1: pinmux_usdhc1 {
461		group0 {
462			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
463			bias-disable;
464			drive-strength = "r0";
465			input-schmitt-enable;
466			slew-rate = "fast";
467			nxp,speed = "100-mhz";
468		};
469		group1 {
470			pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
471				<&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
472				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
473				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
474				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
475				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
476			drive-strength = "r0";
477			input-schmitt-enable;
478			bias-pull-up;
479			bias-pull-up-value = "47k";
480			slew-rate = "fast";
481			nxp,speed = "100-mhz";
482		};
483		group2 {
484			pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
485			drive-strength = "r0-4";
486			input-schmitt-enable;
487			bias-pull-up;
488			bias-pull-up-value = "47k";
489			slew-rate = "fast";
490			nxp,speed = "100-mhz";
491		};
492		group3 {
493			pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
494			drive-strength = "r0-6";
495			slew-rate = "slow";
496			nxp,speed = "100-mhz";
497		};
498	};
499
500	/* fast pinmux settings for USDHC (over 100 Mhz) */
501	pinmux_usdhc1_fast: pinmux_usdhc1_fast {
502		group0 {
503			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
504			bias-disable;
505			drive-strength = "r0-7";
506			input-schmitt-enable;
507			slew-rate = "fast";
508			nxp,speed = "200-mhz";
509		};
510		group1 {
511			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
512				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
513				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
514				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
515				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
516			drive-strength = "r0-7";
517			input-schmitt-enable;
518			bias-pull-up;
519			bias-pull-up-value = "47k";
520			slew-rate = "fast";
521			nxp,speed = "200-mhz";
522		};
523	};
524
525	/* medium pinmux settings for USDHC (under 100 Mhz) */
526	pinmux_usdhc1_med: pinmux_usdhc1_med {
527		group0 {
528			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
529			bias-disable;
530			drive-strength = "r0-7";
531			input-schmitt-enable;
532			slew-rate = "fast";
533			nxp,speed = "100-mhz";
534		};
535		group1 {
536			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
537				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
538				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
539				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
540				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
541			drive-strength = "r0-7";
542			input-schmitt-enable;
543			bias-pull-up;
544			bias-pull-up-value = "47k";
545			slew-rate = "fast";
546			nxp,speed = "100-mhz";
547		};
548	};
549
550	/* slow pinmux settings for USDHC (under 50 Mhz) */
551	pinmux_usdhc1_slow: pinmux_usdhc1_slow {
552		group0 {
553			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
554			bias-disable;
555			drive-strength = "r0-7";
556			input-schmitt-enable;
557			slew-rate = "fast";
558			nxp,speed = "50-mhz";
559		};
560		group1 {
561			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
562				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
563				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
564				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
565				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
566			drive-strength = "r0-7";
567			input-schmitt-enable;
568			bias-pull-up;
569			bias-pull-up-value = "47k";
570			slew-rate = "fast";
571			nxp,speed = "50-mhz";
572		};
573	};
574
575	/* Wakeup Input Source */
576	pinmux_wakeup: pinmux_wakeup {
577		group0 {
578			pinmux = <&iomuxc_snvs_wakeup_gpio5_io00>;
579			drive-strength = "disabled";
580			input-schmitt-enable;
581			bias-pull-up;
582			bias-pull-up-value = "22k";
583			slew-rate = "slow";
584		};
585	};
586};
587