1/*
2 * Copyright (c) 2023 Cypress Semiconductor Corporation (an Infineon company) or
3 * an affiliate of Cypress Semiconductor Corporation
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <infineon/cat1a/mpns/CYBLE_416045_02.dtsi>
10#include <infineon/cat1a/system_clocks.dtsi>
11#include "cy8cproto_063_ble-pinctrl.dtsi"
12#include <zephyr/dt-bindings/input/input-event-codes.h>
13
14/ {
15	model = "CY8CPROTO-063-BLE PSOC™ 6 BLE Prototyping Kit";
16	compatible = "cypress,cy8cproto_063_ble", "cypress,PSOC6";
17
18	aliases {
19		uart-5 = &uart5;
20		led0 = &user_led;
21		sw0 = &user_bt;
22		watchdog0 = &watchdog0;
23	};
24
25	chosen {
26		zephyr,sram = &sram0;
27		zephyr,flash = &flash0;
28		zephyr,console = &uart5;
29		zephyr,shell-uart = &uart5;
30		zephyr,bt-hci = &bluetooth;
31	};
32
33	/delete-node/ cpu@0;
34
35	leds {
36		compatible = "gpio-leds";
37		user_led: led_0 {
38			label = "LED_0";
39			gpios = <&gpio_prt6 3 GPIO_ACTIVE_LOW>;
40		};
41	};
42
43	gpio_keys {
44		compatible = "gpio-keys";
45
46		user_bt: button_0 {
47			label = "SW_0";
48			gpios = <&gpio_prt0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
49			zephyr,code = <INPUT_KEY_0>;
50		};
51	};
52};
53
54&gpio_prt0 {
55	status = "okay";
56};
57
58&gpio_prt5 {
59	status = "okay";
60};
61
62&gpio_prt6 {
63	status = "okay";
64};
65
66&gpio_prt7 {
67	status = "okay";
68};
69
70&gpio_prt9 {
71	status = "okay";
72};
73
74&gpio_prt10 {
75	status = "okay";
76};
77
78&gpio_prt12 {
79	status = "okay";
80};
81
82uart5: &scb5 {
83	compatible = "infineon,cat1-uart";
84	status = "okay";
85	current-speed = <115200>;
86
87	/* UART pins */
88	pinctrl-0 = <&p5_1_scb5_uart_tx &p5_0_scb5_uart_rx>;
89	pinctrl-names = "default";
90};
91
92/* System clock configuration */
93&fll0 {
94	status = "okay";
95	clock-frequency = <100000000>;
96};
97
98&clk_hf0 {
99	clock-div = <1>;
100	clocks = <&fll0>;
101};
102
103/* CM4 core clock = 100MHz
104 * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
105 */
106&clk_fast {
107	clock-div = <1>;
108};
109
110/* CM0+ core clock = 50MHz
111 * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
112 */
113&clk_slow {
114	clock-div = <2>;
115};
116
117/* PERI core clock = 100MHz
118 * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
119 */
120&clk_peri {
121	clock-div = <1>;
122};
123
124&bluetooth {
125	status = "okay";
126};
127
128&watchdog0 {
129	status = "okay";
130};
131