1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by gen_board_pinctrl.py
6 * from mimxrt1064_evk.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1064dvl6a-pinctrl.dtsi>
10
11&pinctrl {
12	/* ADC1 inputs 0 and 15 */
13	pinmux_adc1: pinmux_adc1 {
14		group0 {
15			pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>,
16				<&iomuxc_gpio_ad_b1_10_adc1_in15>;
17			bias-disable;
18			drive-strength = "r0-6";
19			slew-rate = "slow";
20			nxp,speed = "100-mhz";
21		};
22	};
23
24	/* conflicts with lpuart3 and flexcan1 */
25	pinmux_csi: pinmux_csi {
26		group0 {
27			pinmux = <&iomuxc_gpio_ad_b1_02_gpio1_io18>;
28			drive-strength = "r0-6";
29			bias-pull-down;
30			bias-pull-down-value = "100k";
31			slew-rate = "slow";
32			nxp,speed = "100-mhz";
33		};
34		group1 {
35			pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>,
36				<&iomuxc_gpio_ad_b1_05_csi_mclk>,
37				<&iomuxc_gpio_ad_b1_06_csi_vsync>,
38				<&iomuxc_gpio_ad_b1_07_csi_hsync>,
39				<&iomuxc_gpio_ad_b1_08_csi_data09>,
40				<&iomuxc_gpio_ad_b1_09_csi_data08>,
41				<&iomuxc_gpio_ad_b1_10_csi_data07>,
42				<&iomuxc_gpio_ad_b1_11_csi_data06>,
43				<&iomuxc_gpio_ad_b1_12_csi_data05>,
44				<&iomuxc_gpio_ad_b1_13_csi_data04>,
45				<&iomuxc_gpio_ad_b1_14_csi_data03>,
46				<&iomuxc_gpio_ad_b1_15_csi_data02>;
47			drive-strength = "r0-6";
48			slew-rate = "slow";
49			nxp,speed = "100-mhz";
50		};
51	};
52
53	pinmux_enet: pinmux_enet {
54		group0 {
55			pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
56			bias-disable;
57			drive-strength = "r0-6";
58			slew-rate = "fast";
59			nxp,speed = "50-mhz";
60			input-enable;
61		};
62		group1 {
63			pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
64				<&iomuxc_gpio_b1_05_enet_rx_data1>,
65				<&iomuxc_gpio_b1_06_enet_rx_en>,
66				<&iomuxc_gpio_b1_07_enet_tx_data0>,
67				<&iomuxc_gpio_b1_08_enet_tx_data1>,
68				<&iomuxc_gpio_b1_09_enet_tx_en>,
69				<&iomuxc_gpio_b1_11_enet_rx_er>;
70			drive-strength = "r0-5";
71			bias-pull-up;
72			bias-pull-up-value = "100k";
73			slew-rate = "fast";
74			nxp,speed = "200-mhz";
75		};
76	};
77
78	pinmux_enet_mdio: pinmux_enet_mdio {
79		group0 {
80			pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
81				<&iomuxc_gpio_emc_41_enet_mdio>,
82				<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
83				<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
84			drive-strength = "r0-5";
85			bias-pull-up;
86			bias-pull-up-value = "100k";
87			slew-rate = "fast";
88			nxp,speed = "200-mhz";
89		};
90	};
91
92	pinmux_ptp: pinmux_ptp {
93		group0 {
94			pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
95				<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
96			drive-strength = "r0-6";
97			slew-rate = "slow";
98			nxp,speed = "100-mhz";
99		};
100	};
101
102	/* conflicts with SAI1 */
103	pinmux_flexcan1: pinmux_flexcan1 {
104		group0 {
105			pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>,
106				<&iomuxc_gpio_ad_b1_09_flexcan1_rx>;
107			drive-strength = "r0-6";
108			slew-rate = "slow";
109			nxp,speed = "100-mhz";
110		};
111	};
112
113	pinmux_flexcan2: pinmux_flexcan2 {
114		group0 {
115			pinmux = <&iomuxc_gpio_ad_b0_14_flexcan2_tx>,
116				<&iomuxc_gpio_ad_b0_15_flexcan2_rx>;
117			drive-strength = "r0-6";
118			slew-rate = "slow";
119			nxp,speed = "100-mhz";
120		};
121	};
122
123	pinmux_flexcan3: pinmux_flexcan3 {
124		group0 {
125			pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>,
126				<&iomuxc_gpio_emc_37_flexcan3_rx>;
127			drive-strength = "r0-6";
128			slew-rate = "slow";
129			nxp,speed = "100-mhz";
130		};
131	};
132
133	/* flexpwm output for board LED */
134	pinmux_flexpwm2: pinmux_flexpwm2 {
135		group0 {
136			pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>;
137			drive-strength = "r0-4";
138			bias-pull-up;
139			bias-pull-up-value = "47k";
140			slew-rate = "slow";
141			nxp,speed = "100-mhz";
142		};
143	};
144
145	/* FLEXSPI1 is connected to external flash */
146	pinmux_flexspi1: pinmux_flexspi1 {
147		group0 {
148			pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>,
149				<&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>,
150				<&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>,
151				<&iomuxc_gpio_sd_b1_08_flexspi_a_data0>,
152				<&iomuxc_gpio_sd_b1_09_flexspi_a_data1>,
153				<&iomuxc_gpio_sd_b1_10_flexspi_a_data2>,
154				<&iomuxc_gpio_sd_b1_11_flexspi_a_data3>;
155			drive-strength = "r0-6";
156			slew-rate = "fast";
157			nxp,speed = "200-mhz";
158			input-enable;
159		};
160	};
161
162	/* Configures pin routing and optionally pin electrical features. */
163	pinmux_lcdif: pinmux_lcdif {
164		group0 {
165			pinmux = <&iomuxc_gpio_b0_00_lcdif_clk>,
166				<&iomuxc_gpio_b0_01_lcdif_enable>,
167				<&iomuxc_gpio_b0_02_lcdif_hsync>,
168				<&iomuxc_gpio_b0_03_lcdif_vsync>,
169				<&iomuxc_gpio_b0_04_lcdif_data00>,
170				<&iomuxc_gpio_b0_05_lcdif_data01>,
171				<&iomuxc_gpio_b0_06_lcdif_data02>,
172				<&iomuxc_gpio_b0_07_lcdif_data03>,
173				<&iomuxc_gpio_b0_08_lcdif_data04>,
174				<&iomuxc_gpio_b0_09_lcdif_data05>,
175				<&iomuxc_gpio_b0_10_lcdif_data06>,
176				<&iomuxc_gpio_b0_11_lcdif_data07>,
177				<&iomuxc_gpio_b0_12_lcdif_data08>,
178				<&iomuxc_gpio_b0_13_lcdif_data09>,
179				<&iomuxc_gpio_b0_14_lcdif_data10>,
180				<&iomuxc_gpio_b0_15_lcdif_data11>,
181				<&iomuxc_gpio_b1_00_lcdif_data12>,
182				<&iomuxc_gpio_b1_01_lcdif_data13>,
183				<&iomuxc_gpio_b1_02_lcdif_data14>,
184				<&iomuxc_gpio_b1_03_lcdif_data15>;
185			drive-strength = "r0-6";
186			input-schmitt-enable;
187			bias-pull-up;
188			bias-pull-up-value = "100k";
189			slew-rate = "slow";
190			nxp,speed = "100-mhz";
191		};
192		group1 {
193			pinmux = <&iomuxc_gpio_ad_b0_02_gpio1_io02>,
194				<&iomuxc_gpio_b1_15_gpio2_io31>;
195			drive-strength = "r0-6";
196			slew-rate = "slow";
197			nxp,speed = "100-mhz";
198		};
199	};
200
201	pinmux_lpi2c1: pinmux_lpi2c1 {
202		group0 {
203			pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
204				<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
205			drive-strength = "r0-6";
206			drive-open-drain;
207			slew-rate = "slow";
208			nxp,speed = "100-mhz";
209			input-enable;
210		};
211	};
212
213	/* Conflicts with USDHC pins. Connect R278, R279, R280, and R281 on evk board */
214	pinmux_lpspi1: pinmux_lpspi1 {
215		group0 {
216			pinmux = <&iomuxc_gpio_sd_b0_01_lpspi1_pcs0>,
217				<&iomuxc_gpio_sd_b0_00_lpspi1_sck>,
218				<&iomuxc_gpio_sd_b0_03_lpspi1_sdi>,
219				<&iomuxc_gpio_sd_b0_02_lpspi1_sdo>;
220			drive-strength = "r0-6";
221			slew-rate = "slow";
222			nxp,speed = "100-mhz";
223		};
224	};
225
226	/* conflicts with lcdif pins */
227	pinmux_lpspi3: pinmux_lpspi3 {
228		group0 {
229			pinmux = <&iomuxc_gpio_ad_b0_03_lpspi3_pcs0>,
230				<&iomuxc_gpio_ad_b0_00_lpspi3_sck>,
231				<&iomuxc_gpio_ad_b0_02_lpspi3_sdi>,
232				<&iomuxc_gpio_ad_b0_01_lpspi3_sdo>;
233			drive-strength = "r0-6";
234			slew-rate = "slow";
235			nxp,speed = "100-mhz";
236		};
237	};
238
239	pinmux_lpuart1: pinmux_lpuart1 {
240		group0 {
241			pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
242				<&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
243			drive-strength = "r0-6";
244			slew-rate = "slow";
245			nxp,speed = "100-mhz";
246		};
247	};
248
249	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
250		group0 {
251			pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
252			drive-strength = "r0";
253			bias-pull-up;
254			bias-pull-up-value = "100k";
255			slew-rate = "slow";
256			nxp,speed = "50-mhz";
257		};
258		group1 {
259			pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
260			drive-strength = "r0-6";
261			slew-rate = "slow";
262			nxp,speed = "100-mhz";
263		};
264	};
265
266	pinmux_lpuart3: pinmux_lpuart3 {
267		group0 {
268			pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
269				<&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
270			drive-strength = "r0-6";
271			slew-rate = "slow";
272			nxp,speed = "100-mhz";
273		};
274	};
275
276	/* Flow control for lpuart3 */
277	pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control {
278		group0 {
279			pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
280				<&iomuxc_gpio_ad_b1_07_lpuart3_rx>,
281				<&iomuxc_gpio_ad_b1_04_lpuart3_cts_b>,
282				<&iomuxc_gpio_ad_b1_05_lpuart3_rts_b>;
283			drive-strength = "r0-6";
284			slew-rate = "slow";
285			nxp,speed = "100-mhz";
286		};
287	};
288
289	pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
290		group0 {
291			pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
292			drive-strength = "r0";
293			bias-pull-up;
294			bias-pull-up-value = "100k";
295			slew-rate = "slow";
296			nxp,speed = "100-mhz";
297		};
298		group1 {
299			pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
300			drive-strength = "r0-6";
301			slew-rate = "slow";
302			nxp,speed = "100-mhz";
303		};
304	};
305
306	pinmux_sai1: pinmux_sai1 {
307		group0 {
308			pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,
309				<&iomuxc_gpio_ad_b1_13_sai1_tx_data0>,
310				<&iomuxc_gpio_ad_b1_12_sai1_rx_data0>,
311				<&iomuxc_gpio_ad_b1_14_sai1_tx_bclk>,
312				<&iomuxc_gpio_ad_b1_15_sai1_tx_sync>;
313			drive-strength = "r0-6";
314			slew-rate = "slow";
315			nxp,speed = "100-mhz";
316		};
317	};
318
319	/* note swo is configured with a cpu frequency of 132mhz and swo frequency of 7500khz */
320	pinmux_swo: pinmux_swo {
321		group0 {
322			pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>;
323			drive-strength = "r0-6";
324			slew-rate = "fast";
325			nxp,speed = "100-mhz";
326		};
327	};
328
329	pinmux_usdhc1: pinmux_usdhc1 {
330		group0 {
331			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
332			bias-disable;
333			drive-strength = "r0";
334			input-schmitt-enable;
335			slew-rate = "fast";
336			nxp,speed = "100-mhz";
337		};
338		group1 {
339			pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
340				<&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
341				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
342				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
343				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
344				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
345			drive-strength = "r0";
346			input-schmitt-enable;
347			bias-pull-up;
348			bias-pull-up-value = "47k";
349			slew-rate = "fast";
350			nxp,speed = "100-mhz";
351		};
352		group2 {
353			pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
354			drive-strength = "r0-4";
355			input-schmitt-enable;
356			bias-pull-up;
357			bias-pull-up-value = "47k";
358			slew-rate = "fast";
359			nxp,speed = "100-mhz";
360		};
361		group3 {
362			pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
363			drive-strength = "r0-6";
364			slew-rate = "slow";
365			nxp,speed = "100-mhz";
366		};
367	};
368
369	/* fast pinmux settings for USDHC (over 100 Mhz) */
370	pinmux_usdhc1_fast: pinmux_usdhc1_fast {
371		group0 {
372			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
373			bias-disable;
374			drive-strength = "r0-7";
375			input-schmitt-enable;
376			slew-rate = "fast";
377			nxp,speed = "200-mhz";
378		};
379		group1 {
380			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
381				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
382				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
383				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
384				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
385			drive-strength = "r0-7";
386			input-schmitt-enable;
387			bias-pull-up;
388			bias-pull-up-value = "47k";
389			slew-rate = "fast";
390			nxp,speed = "200-mhz";
391		};
392	};
393
394	/* medium pinmux settings for USDHC (under 100 Mhz) */
395	pinmux_usdhc1_med: pinmux_usdhc1_med {
396		group0 {
397			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
398			bias-disable;
399			drive-strength = "r0-7";
400			input-schmitt-enable;
401			slew-rate = "fast";
402			nxp,speed = "100-mhz";
403		};
404		group1 {
405			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
406				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
407				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
408				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
409				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
410			drive-strength = "r0-7";
411			input-schmitt-enable;
412			bias-pull-up;
413			bias-pull-up-value = "47k";
414			slew-rate = "fast";
415			nxp,speed = "100-mhz";
416		};
417	};
418
419	/* slow pinmux settings for USDHC (under 50 Mhz) */
420	pinmux_usdhc1_slow: pinmux_usdhc1_slow {
421		group0 {
422			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
423			bias-disable;
424			drive-strength = "r0-7";
425			input-schmitt-enable;
426			slew-rate = "fast";
427			nxp,speed = "50-mhz";
428		};
429		group1 {
430			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
431				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
432				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
433				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
434				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
435			drive-strength = "r0-7";
436			input-schmitt-enable;
437			bias-pull-up;
438			bias-pull-up-value = "47k";
439			slew-rate = "fast";
440			nxp,speed = "50-mhz";
441		};
442	};
443
444};
445
446