1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by gen_board_pinctrl.py
6 * from mimxrt1010_evk.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1011dae5a-pinctrl.dtsi>
10
11&pinctrl {
12	/* ADC Channels 1 and 2, exposed as pins 10 and 12 on J26 of EVK */
13	pinmux_adc1: pinmux_adc1 {
14		group0 {
15			pinmux = <&iomuxc_gpio_ad_01_adc1_in1>,
16				<&iomuxc_gpio_ad_02_adc1_in2>;
17			drive-strength = "r0-4";
18			slew-rate = "slow";
19			nxp,speed = "100-mhz";
20		};
21	};
22
23	pinmux_lpi2c1: pinmux_lpi2c1 {
24		group0 {
25			pinmux = <&iomuxc_gpio_01_lpi2c1_sda>, <&iomuxc_gpio_02_lpi2c1_scl>;
26			drive-strength = "r0-4";
27			drive-open-drain;
28			slew-rate = "slow";
29			nxp,speed = "100-mhz";
30			input-enable;
31		};
32	};
33
34	pinmux_lpspi1: pinmux_lpspi1 {
35		group0 {
36			pinmux = <&iomuxc_gpio_ad_06_lpspi1_sck>,
37				<&iomuxc_gpio_ad_05_lpspi1_pcs0>,
38				<&iomuxc_gpio_ad_04_lpspi1_sdo>,
39				<&iomuxc_gpio_ad_03_lpspi1_sdi>;
40			drive-strength = "r0-4";
41			slew-rate = "slow";
42			nxp,speed = "100-mhz";
43		};
44	};
45
46	/* MCUX SDK sets the drive strength of pins on RT1010 to 4 by default */
47	pinmux_lpuart1: pinmux_lpuart1 {
48		group0 {
49			pinmux = <&iomuxc_gpio_09_lpuart1_rxd>,
50				<&iomuxc_gpio_10_lpuart1_txd>;
51			drive-strength = "r0-4";
52			slew-rate = "slow";
53			nxp,speed = "100-mhz";
54		};
55	};
56
57	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
58		group0 {
59			pinmux = <&iomuxc_gpio_09_gpiomux_io09>;
60			drive-strength = "r0-4";
61			bias-pull-up;
62			bias-pull-up-value = "100k";
63			slew-rate = "slow";
64			nxp,speed = "100-mhz";
65		};
66		group1 {
67			pinmux = <&iomuxc_gpio_10_lpuart1_txd>;
68			drive-strength = "r0-4";
69			slew-rate = "slow";
70			nxp,speed = "100-mhz";
71		};
72	};
73
74	/* conflicts with adc1 */
75	pinmux_lpuart4: pinmux_lpuart4 {
76		group0 {
77			pinmux = <&iomuxc_gpio_ad_01_lpuart4_rxd>,
78				<&iomuxc_gpio_ad_02_lpuart4_txd>;
79			drive-strength = "r0-4";
80			slew-rate = "slow";
81			nxp,speed = "100-mhz";
82		};
83	};
84
85	/* conflicts with adc1 */
86	pinmux_lpuart4_sleep: pinmux_lpuart4_sleep {
87		group0 {
88			pinmux = <&iomuxc_gpio_ad_01_gpiomux_io15>;
89			drive-strength = "r0-4";
90			bias-pull-up;
91			bias-pull-up-value = "100k";
92			slew-rate = "slow";
93			nxp,speed = "100-mhz";
94		};
95		group1 {
96			pinmux = <&iomuxc_gpio_ad_02_lpuart4_txd>;
97			drive-strength = "r0-4";
98			slew-rate = "slow";
99			nxp,speed = "100-mhz";
100		};
101	};
102
103	pinmux_sai1: pinmux_sai1 {
104		group0 {
105			pinmux = <&iomuxc_gpio_08_sai1_mclk>,
106				<&iomuxc_gpio_03_sai1_rx_data0>,
107				<&iomuxc_gpio_04_sai1_tx_data0>,
108				<&iomuxc_gpio_07_sai1_tx_sync>,
109				<&iomuxc_gpio_06_sai1_tx_bclk>;
110			drive-strength = "r0-4";
111			slew-rate = "slow";
112			nxp,speed = "100-mhz";
113		};
114	};
115
116};
117
118