1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by gen_board_pinctrl.py
6 * from mimxrt1015_evk.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1015daf5a-pinctrl.dtsi>
10
11&pinctrl {
12	/* adc1 inputs 1 and 13 */
13	pinmux_adc1: pinmux_adc1 {
14		group0 {
15			pinmux = <&iomuxc_gpio_ad_b0_14_adc1_in1>,
16				<&iomuxc_gpio_ad_b1_13_adc1_in13>;
17			drive-strength = "r0-6";
18			slew-rate = "slow";
19			nxp,speed = "100-mhz";
20		};
21	};
22
23	pinmux_lpi2c1: pinmux_lpi2c1 {
24		group0 {
25			pinmux = <&iomuxc_gpio_ad_b1_14_lpi2c1_scl>,
26				<&iomuxc_gpio_ad_b1_15_lpi2c1_sda>;
27			drive-strength = "r0-6";
28			drive-open-drain;
29			slew-rate = "slow";
30			nxp,speed = "100-mhz";
31			input-enable;
32		};
33	};
34
35	pinmux_lpspi1: pinmux_lpspi1 {
36		group0 {
37			pinmux = <&iomuxc_gpio_ad_b0_10_lpspi1_sck>,
38				<&iomuxc_gpio_ad_b0_11_lpspi1_pcs0>,
39				<&iomuxc_gpio_ad_b0_12_lpspi1_sdo>,
40				<&iomuxc_gpio_ad_b0_13_lpspi1_sdi>;
41			drive-strength = "r0-6";
42			slew-rate = "slow";
43			nxp,speed = "100-mhz";
44		};
45	};
46
47	pinmux_lpuart1: pinmux_lpuart1 {
48		group0 {
49			pinmux = <&iomuxc_gpio_ad_b0_07_lpuart1_rx>,
50				<&iomuxc_gpio_ad_b0_06_lpuart1_tx>;
51			drive-strength = "r0-6";
52			slew-rate = "slow";
53			nxp,speed = "100-mhz";
54		};
55	};
56
57	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
58		group0 {
59			pinmux = <&iomuxc_gpio_ad_b0_07_gpio1_io07>;
60			drive-strength = "r0-6";
61			bias-pull-up;
62			bias-pull-up-value = "100k";
63			slew-rate = "slow";
64			nxp,speed = "100-mhz";
65		};
66		group1 {
67			pinmux = <&iomuxc_gpio_ad_b0_06_lpuart1_tx>;
68			drive-strength = "r0-6";
69			slew-rate = "slow";
70			nxp,speed = "100-mhz";
71		};
72	};
73
74	pinmux_lpuart4: pinmux_lpuart4 {
75		group0 {
76			pinmux = <&iomuxc_gpio_emc_33_lpuart4_rx>,
77				<&iomuxc_gpio_emc_32_lpuart4_tx>;
78			drive-strength = "r0-6";
79			slew-rate = "slow";
80			nxp,speed = "100-mhz";
81		};
82	};
83
84	pinmux_lpuart4_sleep: pinmux_lpuart4_sleep {
85		group0 {
86			pinmux = <&iomuxc_gpio_emc_33_gpio3_io01>;
87			drive-strength = "r0-6";
88			bias-pull-up;
89			bias-pull-up-value = "100k";
90			slew-rate = "slow";
91			nxp,speed = "100-mhz";
92		};
93		group1 {
94			pinmux = <&iomuxc_gpio_emc_32_lpuart4_tx>;
95			drive-strength = "r0-6";
96			slew-rate = "slow";
97			nxp,speed = "100-mhz";
98		};
99	};
100
101	pinmux_sai1: pinmux_sai1 {
102		group0 {
103			pinmux = <&iomuxc_gpio_emc_20_sai1_mclk>,
104				<&iomuxc_gpio_emc_26_sai1_tx_bclk>,
105				<&iomuxc_gpio_emc_25_sai1_tx_data0>,
106				<&iomuxc_gpio_emc_21_sai1_rx_data0>,
107				<&iomuxc_gpio_emc_27_sai1_tx_sync>;
108			drive-strength = "r0-6";
109			slew-rate = "slow";
110			nxp,speed = "100-mhz";
111		};
112	};
113
114	/* user led and board SW4 */
115	pinmux_user: pinmux_user {
116		group0 {
117			pinmux = <&iomuxc_gpio_emc_09_gpio2_io09>;
118			drive-strength = "r0-4";
119			slew-rate = "slow";
120			nxp,speed = "100-mhz";
121		};
122		group1 {
123			pinmux = <&iomuxc_gpio_sd_b1_01_gpio3_io21>;
124			drive-strength = "r0-6";
125			slew-rate = "slow";
126			nxp,speed = "100-mhz";
127		};
128	};
129
130};
131
132